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irqchip/xilinx: Switch to GENERIC_IRQ_MULTI_HANDLER

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Register the Xilinx driver as the root interrupt controller using
the GENERIC_IRQ_MULTI_HANDLER API, instead of the arch-specific hack.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Asserhall <stefan.asserhall@xilinx.com>
[maz: repainted commit message]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/e6c6595a81f662bf839cee3109d0fa58a596ea47.1646380284.git.michal.simek@xilinx.com
This commit is contained in:
Michal Simek 2022-03-04 08:51:29 +01:00 • committed by Marc Zyngier
parent e414c25e33
commit 1e364921b0
4 changed files with 19 additions and 32 deletions
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2
arch/microblaze/Kconfig
View file

@ -45,6 +45,8 @@ config MICROBLAZE
select SET_FS select SET_FS
select ZONE_DMA select ZONE_DMA
select TRACE_IRQFLAGS_SUPPORT select TRACE_IRQFLAGS_SUPPORT
select GENERIC_IRQ_MULTI_HANDLER
select HANDLE_DOMAIN_IRQ
# Endianness selection # Endianness selection
choice choice

3
arch/microblaze/include/asm/irq.h
View file

@ -11,7 +11,4 @@
struct pt_regs; struct pt_regs;
extern void do_IRQ(struct pt_regs *regs); extern void do_IRQ(struct pt_regs *regs);
/* should be defined in each interrupt controller driver */
extern unsigned int xintc_get_irq(void);
#endif /* _ASM_MICROBLAZE_IRQ_H */ #endif /* _ASM_MICROBLAZE_IRQ_H */

16
arch/microblaze/kernel/irq.c
View file

@ -20,27 +20,13 @@
#include <linux/irqchip.h> #include <linux/irqchip.h>
#include <linux/of_irq.h> #include <linux/of_irq.h>
static u32 concurrent_irq;
void __irq_entry do_IRQ(struct pt_regs *regs) void __irq_entry do_IRQ(struct pt_regs *regs)
{ {
unsigned int irq;
struct pt_regs *old_regs = set_irq_regs(regs); struct pt_regs *old_regs = set_irq_regs(regs);
trace_hardirqs_off(); trace_hardirqs_off();
irq_enter(); irq_enter();
irq = xintc_get_irq(); handle_arch_irq(regs);
next_irq:
BUG_ON(!irq);
generic_handle_irq(irq);
irq = xintc_get_irq();
if (irq != -1U) {
pr_debug("next irq: %d\n", irq);
++concurrent_irq;
goto next_irq;
}
irq_exit(); irq_exit();
set_irq_regs(old_regs); set_irq_regs(old_regs);
trace_hardirqs_on(); trace_hardirqs_on();

30
drivers/irqchip/irq-xilinx-intc.c
View file

@ -32,6 +32,8 @@
#define MER_ME (1<<0) #define MER_ME (1<<0)
#define MER_HIE (1<<1) #define MER_HIE (1<<1)
#define SPURIOUS_IRQ (-1U)
static DEFINE_STATIC_KEY_FALSE(xintc_is_be); static DEFINE_STATIC_KEY_FALSE(xintc_is_be);
struct xintc_irq_chip { struct xintc_irq_chip {
@ -110,20 +112,6 @@ static struct irq_chip intc_dev = {
.irq_mask_ack = intc_mask_ack, .irq_mask_ack = intc_mask_ack,
}; };
unsigned int xintc_get_irq(void)
{
unsigned int irq = -1;
u32 hwirq;
hwirq = xintc_read(primary_intc, IVR);
if (hwirq != -1U)
irq = irq_find_mapping(primary_intc->root_domain, hwirq);
pr_debug("irq-xilinx: hwirq=%d, irq=%d\n", hwirq, irq);
return irq;
}
static int xintc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) static int xintc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
{ {
struct xintc_irq_chip *irqc = d->host_data; struct xintc_irq_chip *irqc = d->host_data;
@ -164,6 +152,19 @@ static void xil_intc_irq_handler(struct irq_desc *desc)
chained_irq_exit(chip, desc); chained_irq_exit(chip, desc);
} }
static void xil_intc_handle_irq(struct pt_regs *regs)
{
u32 hwirq;
do {
hwirq = xintc_read(primary_intc, IVR);
if (unlikely(hwirq == SPURIOUS_IRQ))
break;
generic_handle_domain_irq(primary_intc->root_domain, hwirq);
} while (true);
}
static int __init xilinx_intc_of_init(struct device_node *intc, static int __init xilinx_intc_of_init(struct device_node *intc,
struct device_node *parent) struct device_node *parent)
{ {
@ -233,6 +234,7 @@ static int __init xilinx_intc_of_init(struct device_node *intc,
} else { } else {
primary_intc = irqc; primary_intc = irqc;
irq_set_default_host(primary_intc->root_domain); irq_set_default_host(primary_intc->root_domain);
set_handle_irq(xil_intc_handle_irq);
} }
return 0; return 0;