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drm/nouveau/gr/tu102-: use sw_veid_bundle_init from firmware

Browse source 
NVIDIA provided this on Turing, but we kept using the hardcoded version
from Volta (where they didn't).

Switch to the firmware version prior to Ampere.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs 2022-06-01 20:48:20 +10:00
parent edc6938f7b
commit 1cd97b5490
8 changed files with 44 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c
View file

@ -1381,12 +1381,17 @@ gf100_grctx_generate_main(struct gf100_gr_chan *chan)
gf100_gr_wait_idle(gr);
if (grctx->r400088) grctx->r400088(gr, false);
if (gr->bundle)
gf100_gr_icmd(gr, gr->bundle);
else
gf100_gr_icmd(gr, grctx->icmd);
if (gr->bundle_veid)
gf100_gr_icmd(gr, gr->bundle_veid);
if (grctx->sw_veid_bundle_init)
gf100_gr_icmd(gr, grctx->sw_veid_bundle_init);
if (grctx->r400088) grctx->r400088(gr, true);
nvkm_wr32(device, 0x404154, idle_timeout);

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h
View file

@ -153,7 +153,6 @@ extern const struct gf100_grctx_func gv100_grctx;
extern const struct gf100_grctx_func tu102_grctx;
void gv100_grctx_unkn88c(struct gf100_gr *, bool);
void gv100_grctx_generate_unkn(struct gf100_gr *);
extern const struct gf100_gr_init gv100_grctx_init_sw_veid_bundle_init_0[];
void gv100_grctx_generate_attrib_cb(struct gf100_gr_chan *, u64, u32);
void gv100_grctx_generate_attrib(struct gf100_gr_chan *);
void gv100_grctx_generate_rop_mapping(struct gf100_gr *);

2
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c
View file

@ -25,7 +25,7 @@
* PGRAPH context implementation
******************************************************************************/
const struct gf100_gr_init
static const struct gf100_gr_init
gv100_grctx_init_sw_veid_bundle_init_0[] = {
{ 0x00001000, 64, 0x00100000, 0x00000008 },
{ 0x00000941, 64, 0x00100000, 0x00000000 },

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxtu102.c
View file

@ -51,7 +51,6 @@ tu102_grctx_init_unknown_bundle_init_0[] = {
static const struct gf100_gr_pack
tu102_grctx_pack_sw_veid_bundle_init[] = {
{ gv100_grctx_init_sw_veid_bundle_init_0 },
{ tu102_grctx_init_unknown_bundle_init_0 },
{}
};

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
View file

@ -2139,6 +2139,7 @@ gf100_gr_dtor(struct nvkm_gr *base)
nvkm_blob_dtor(&gr->gpccs.inst);
nvkm_blob_dtor(&gr->gpccs.data);
vfree(gr->bundle_veid);
vfree(gr->bundle);
vfree(gr->method);
vfree(gr->sw_ctx);

4
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
View file

@ -90,6 +90,7 @@ struct gf100_gr {
struct gf100_gr_pack *sw_nonctx;
struct gf100_gr_pack *sw_ctx;
struct gf100_gr_pack *bundle;
struct gf100_gr_pack *bundle_veid;
struct gf100_gr_pack *method;
struct gf100_gr_zbc_color zbc_color[NVKM_LTC_MAX_ZBC_COLOR_CNT];
@ -224,6 +225,7 @@ void gm107_gr_init_shader_exceptions(struct gf100_gr *, int, int);
void gm107_gr_init_400054(struct gf100_gr *);
int gk20a_gr_init(struct gf100_gr *);
int gk20a_gr_av_to_init_(struct nvkm_blob *, u8 count, u32 pitch, struct gf100_gr_pack **);
int gk20a_gr_av_to_init(struct nvkm_blob *, struct gf100_gr_pack **);
int gk20a_gr_aiv_to_init(struct nvkm_blob *, struct gf100_gr_pack **);
int gk20a_gr_av_to_method(struct nvkm_blob *, struct gf100_gr_pack **);
@ -253,6 +255,8 @@ void gv100_gr_init_504430(struct gf100_gr *, int, int);
void gv100_gr_init_shader_exceptions(struct gf100_gr *, int, int);
void gv100_gr_trap_mp(struct gf100_gr *, int, int);
int tu102_gr_av_to_init_veid(struct nvkm_blob *, struct gf100_gr_pack **);
#define gf100_gr_chan(p) container_of((p), struct gf100_gr_chan, object)
#include <core/object.h>

12
drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c
View file

@ -34,7 +34,7 @@ struct gk20a_fw_av
};
int
gk20a_gr_av_to_init(struct nvkm_blob *blob, struct gf100_gr_pack **ppack)
gk20a_gr_av_to_init_(struct nvkm_blob *blob, u8 count, u32 pitch, struct gf100_gr_pack **ppack)
{
struct gf100_gr_init *init;
struct gf100_gr_pack *pack;
@ -55,14 +55,20 @@ gk20a_gr_av_to_init(struct nvkm_blob *blob, struct gf100_gr_pack **ppack)
ent->addr = av->addr;
ent->data = av->data;
ent->count = 1;
ent->pitch = 1;
ent->count = ((ent->addr & 0xffff) != 0xe100) ? count : 1;
ent->pitch = pitch;
}
*ppack = pack;
return 0;
}
int
gk20a_gr_av_to_init(struct nvkm_blob *blob, struct gf100_gr_pack **ppack)
{
return gk20a_gr_av_to_init_(blob, 1, 1, ppack);
}
struct gk20a_fw_aiv
{
u32 addr;

24
drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c
View file

@ -141,6 +141,7 @@ MODULE_FIRMWARE("nvidia/tu102/gr/sw_ctx.bin");
MODULE_FIRMWARE("nvidia/tu102/gr/sw_nonctx.bin");
MODULE_FIRMWARE("nvidia/tu102/gr/sw_bundle_init.bin");
MODULE_FIRMWARE("nvidia/tu102/gr/sw_method_init.bin");
MODULE_FIRMWARE("nvidia/tu102/gr/sw_veid_bundle_init.bin");
MODULE_FIRMWARE("nvidia/tu104/gr/fecs_bl.bin");
MODULE_FIRMWARE("nvidia/tu104/gr/fecs_inst.bin");
@ -154,6 +155,7 @@ MODULE_FIRMWARE("nvidia/tu104/gr/sw_ctx.bin");
MODULE_FIRMWARE("nvidia/tu104/gr/sw_nonctx.bin");
MODULE_FIRMWARE("nvidia/tu104/gr/sw_bundle_init.bin");
MODULE_FIRMWARE("nvidia/tu104/gr/sw_method_init.bin");
MODULE_FIRMWARE("nvidia/tu104/gr/sw_veid_bundle_init.bin");
MODULE_FIRMWARE("nvidia/tu106/gr/fecs_bl.bin");
MODULE_FIRMWARE("nvidia/tu106/gr/fecs_inst.bin");
@ -167,6 +169,7 @@ MODULE_FIRMWARE("nvidia/tu106/gr/sw_ctx.bin");
MODULE_FIRMWARE("nvidia/tu106/gr/sw_nonctx.bin");
MODULE_FIRMWARE("nvidia/tu106/gr/sw_bundle_init.bin");
MODULE_FIRMWARE("nvidia/tu106/gr/sw_method_init.bin");
MODULE_FIRMWARE("nvidia/tu106/gr/sw_veid_bundle_init.bin");
MODULE_FIRMWARE("nvidia/tu117/gr/fecs_bl.bin");
MODULE_FIRMWARE("nvidia/tu117/gr/fecs_inst.bin");
@ -180,6 +183,7 @@ MODULE_FIRMWARE("nvidia/tu117/gr/sw_ctx.bin");
MODULE_FIRMWARE("nvidia/tu117/gr/sw_nonctx.bin");
MODULE_FIRMWARE("nvidia/tu117/gr/sw_bundle_init.bin");
MODULE_FIRMWARE("nvidia/tu117/gr/sw_method_init.bin");
MODULE_FIRMWARE("nvidia/tu117/gr/sw_veid_bundle_init.bin");
MODULE_FIRMWARE("nvidia/tu116/gr/fecs_bl.bin");
MODULE_FIRMWARE("nvidia/tu116/gr/fecs_inst.bin");
@ -193,6 +197,26 @@ MODULE_FIRMWARE("nvidia/tu116/gr/sw_ctx.bin");
MODULE_FIRMWARE("nvidia/tu116/gr/sw_nonctx.bin");
MODULE_FIRMWARE("nvidia/tu116/gr/sw_bundle_init.bin");
MODULE_FIRMWARE("nvidia/tu116/gr/sw_method_init.bin");
MODULE_FIRMWARE("nvidia/tu116/gr/sw_veid_bundle_init.bin");
int
tu102_gr_av_to_init_veid(struct nvkm_blob *blob, struct gf100_gr_pack **ppack)
{
return gk20a_gr_av_to_init_(blob, 64, 0x00100000, ppack);
}
int
tu102_gr_load(struct gf100_gr *gr, int ver, const struct gf100_gr_fwif *fwif)
{
int ret;
ret = gm200_gr_load(gr, ver, fwif);
if (ret)
return ret;
return gk20a_gr_load_net(gr, "gr/", "sw_veid_bundle_init", ver, tu102_gr_av_to_init_veid,
&gr->bundle_veid);
}
static const struct gf100_gr_fwif
tu102_gr_fwif[] = {