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ALSA: hda/tegra: Add Tegra264 support
Update HDA driver to support Tegra264 differences from legacy HDA, which includes: clocks/resets, always power on, and hardware-managed FPCI/IPFS initialization. The driver retrieves this chip-specific information from soc_data. Signed-off-by: Mohan Kumar D <mkumard@nvidia.com> Signed-off-by: Sheetal <sheetal@nvidia.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20250512064258.1028331-4-sheetal@nvidia.com
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parent
3bc2f3ba7b
commit
1c4193917e
2 changed files with 46 additions and 6 deletions
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@ -72,6 +72,10 @@
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struct hda_tegra_soc {
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bool has_hda2codec_2x_reset;
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bool has_hda2hdmi;
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bool has_hda2codec_2x;
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bool input_stream;
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bool always_on;
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bool requires_init;
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};
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struct hda_tegra {
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@ -187,7 +191,9 @@ static int hda_tegra_runtime_resume(struct device *dev)
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if (rc != 0)
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return rc;
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if (chip->running) {
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hda_tegra_init(hda);
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if (hda->soc->requires_init)
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hda_tegra_init(hda);
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azx_init_chip(chip, 1);
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/* disable controller wake up event*/
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azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
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@ -250,7 +256,8 @@ static int hda_tegra_init_chip(struct azx *chip, struct platform_device *pdev)
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bus->remap_addr = hda->regs + HDA_BAR0;
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bus->addr = res->start + HDA_BAR0;
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hda_tegra_init(hda);
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if (hda->soc->requires_init)
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hda_tegra_init(hda);
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return 0;
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}
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@ -323,7 +330,7 @@ static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
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* starts with offset 0 which is wrong as HW register for output stream
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* offset starts with 4.
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*/
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if (of_device_is_compatible(np, "nvidia,tegra234-hda"))
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if (!hda->soc->input_stream)
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chip->capture_streams = 4;
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chip->playback_streams = (gcap >> 12) & 0x0f;
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@ -419,7 +426,6 @@ static int hda_tegra_create(struct snd_card *card,
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chip->driver_caps = driver_caps;
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chip->driver_type = driver_caps & 0xff;
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chip->dev_index = 0;
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chip->jackpoll_interval = msecs_to_jiffies(5000);
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INIT_LIST_HEAD(&chip->pcm_list);
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chip->codec_probe_mask = -1;
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@ -436,7 +442,16 @@ static int hda_tegra_create(struct snd_card *card,
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chip->bus.core.sync_write = 0;
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chip->bus.core.needs_damn_long_delay = 1;
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chip->bus.core.aligned_mmio = 1;
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chip->bus.jackpoll_in_suspend = 1;
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/*
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* HDA power domain and clocks are always on for Tegra264 and
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* the jack detection logic would work always, so no need of
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* jack polling mechanism running.
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*/
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if (!hda->soc->always_on) {
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chip->jackpoll_interval = msecs_to_jiffies(5000);
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chip->bus.jackpoll_in_suspend = 1;
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}
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err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
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if (err < 0) {
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@ -450,22 +465,44 @@ static int hda_tegra_create(struct snd_card *card,
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static const struct hda_tegra_soc tegra30_data = {
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.has_hda2codec_2x_reset = true,
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.has_hda2hdmi = true,
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.has_hda2codec_2x = true,
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.input_stream = true,
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.always_on = false,
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.requires_init = true,
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};
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static const struct hda_tegra_soc tegra194_data = {
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.has_hda2codec_2x_reset = false,
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.has_hda2hdmi = true,
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.has_hda2codec_2x = true,
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.input_stream = true,
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.always_on = false,
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.requires_init = true,
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};
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static const struct hda_tegra_soc tegra234_data = {
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.has_hda2codec_2x_reset = true,
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.has_hda2hdmi = false,
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.has_hda2codec_2x = true,
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.input_stream = false,
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.always_on = false,
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.requires_init = true,
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};
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static const struct hda_tegra_soc tegra264_data = {
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.has_hda2codec_2x_reset = true,
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.has_hda2hdmi = false,
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.has_hda2codec_2x = false,
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.input_stream = false,
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.always_on = true,
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.requires_init = false,
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};
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static const struct of_device_id hda_tegra_match[] = {
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{ .compatible = "nvidia,tegra30-hda", .data = &tegra30_data },
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{ .compatible = "nvidia,tegra194-hda", .data = &tegra194_data },
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{ .compatible = "nvidia,tegra234-hda", .data = &tegra234_data },
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{ .compatible = "nvidia,tegra264-hda", .data = &tegra264_data },
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{},
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};
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MODULE_DEVICE_TABLE(of, hda_tegra_match);
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@ -520,7 +557,9 @@ static int hda_tegra_probe(struct platform_device *pdev)
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hda->clocks[hda->nclocks++].id = "hda";
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if (hda->soc->has_hda2hdmi)
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hda->clocks[hda->nclocks++].id = "hda2hdmi";
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hda->clocks[hda->nclocks++].id = "hda2codec_2x";
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if (hda->soc->has_hda2codec_2x)
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hda->clocks[hda->nclocks++].id = "hda2codec_2x";
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err = devm_clk_bulk_get(&pdev->dev, hda->nclocks, hda->clocks);
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if (err < 0)
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@ -4551,6 +4551,7 @@ HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
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HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
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HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
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HDA_CODEC_ENTRY(0x10de0031, "Tegra234 HDMI/DP", patch_tegra234_hdmi),
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HDA_CODEC_ENTRY(0x10de0034, "Tegra264 HDMI/DP", patch_tegra234_hdmi),
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HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP", patch_nvhdmi),
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HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP", patch_nvhdmi),
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HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP", patch_nvhdmi),
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