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drm/amd/display: fix incorrect programming for YCbCr422 and YCbCr420
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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896b3cb3f4
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181a888fcd
3 changed files with 21 additions and 11 deletions
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@ -362,9 +362,15 @@ static void dce110_stream_encoder_hdmi_set_stream_attribute(
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REG_UPDATE(HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, 0);
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break;
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case COLOR_DEPTH_101010:
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REG_UPDATE_2(HDMI_CONTROL,
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HDMI_DEEP_COLOR_DEPTH, 1,
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HDMI_DEEP_COLOR_ENABLE, 1);
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if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) {
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REG_UPDATE_2(HDMI_CONTROL,
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HDMI_DEEP_COLOR_DEPTH, 1,
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HDMI_DEEP_COLOR_ENABLE, 0);
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} else {
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REG_UPDATE_2(HDMI_CONTROL,
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HDMI_DEEP_COLOR_DEPTH, 1,
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HDMI_DEEP_COLOR_ENABLE, 1);
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}
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break;
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case COLOR_DEPTH_121212:
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if (crtc_timing->pixel_encoding == PIXEL_ENCODING_YCBCR422) {
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@ -861,10 +861,6 @@ static void build_audio_output(
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audio_output->crtc_info.requested_pixel_clock =
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pipe_ctx->pix_clk_params.requested_pix_clk;
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/*
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* TODO - Investigate why calculated pixel clk has to be
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* requested pixel clk
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*/
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audio_output->crtc_info.calculated_pixel_clock =
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pipe_ctx->pix_clk_params.requested_pix_clk;
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@ -1044,15 +1040,14 @@ static enum dc_status apply_single_controller_ctx_to_hw(
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stream->public.timing.display_color_depth,
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pipe_ctx->stream->signal);
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/* FPGA does not program backend */
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if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment)) {
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pipe_ctx->opp->funcs->opp_program_fmt(
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pipe_ctx->opp,
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&stream->bit_depth_params,
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&stream->clamping);
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/* FPGA does not program backend */
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if (IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment))
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return DC_OK;
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}
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/* TODO: move to stream encoder */
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if (pipe_ctx->stream->signal != SIGNAL_TYPE_VIRTUAL)
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if (DC_OK != bios_parser_crtc_source_select(pipe_ctx)) {
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@ -1065,6 +1060,12 @@ static enum dc_status apply_single_controller_ctx_to_hw(
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stream->sink->link->link_enc,
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pipe_ctx->stream->signal);
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/*vbios crtc_source_selection and encoder_setup will override fmt_C*/
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pipe_ctx->opp->funcs->opp_program_fmt(
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pipe_ctx->opp,
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&stream->bit_depth_params,
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&stream->clamping);
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if (dc_is_dp_signal(pipe_ctx->stream->signal))
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pipe_ctx->stream_enc->funcs->dp_set_stream_attribute(
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pipe_ctx->stream_enc,
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@ -777,6 +777,9 @@ static void get_pixel_clock_parameters(
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pixel_clk_params->flags.SUPPORT_YCBCR420 = (stream->public.timing.pixel_encoding ==
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PIXEL_ENCODING_YCBCR420);
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pixel_clk_params->pixel_encoding = stream->public.timing.pixel_encoding;
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if (stream->public.timing.pixel_encoding == PIXEL_ENCODING_YCBCR422) {
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pixel_clk_params->color_depth = COLOR_DEPTH_888;
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}
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}
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void dce110_resource_build_bit_depth_reduction_params(
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