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ASoC: tegra20: spdif: Set FIFO trigger level

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FIFO trigger level must be not less than the size of DMA burst, otherwise
audio will be played x4 faster that it should be because part of the DMA
data will be dropped on FIFO input buffer overflow.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20211204143725.31646-6-digetx@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Dmitry Osipenko 2021-12-04 17:37:08 +03:00 • committed by Mark Brown
parent 549818e5c8
commit 16736a0221
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GPG key ID: 24D68B725D5487D0
1 changed files with 8 additions and 0 deletions
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8
sound/soc/tegra/tegra20_spdif.c
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@ -69,6 +69,14 @@ static int tegra20_spdif_hw_params(struct snd_pcm_substream *substream,
regmap_update_bits(spdif->regmap, TEGRA20_SPDIF_CTRL, mask, val);
/*
* FIFO trigger level must be bigger than DMA burst or equal to it,
* otherwise data is discarded on overflow.
*/
regmap_update_bits(spdif->regmap, TEGRA20_SPDIF_DATA_FIFO_CSR,
TEGRA20_SPDIF_DATA_FIFO_CSR_TX_ATN_LVL_MASK,
TEGRA20_SPDIF_DATA_FIFO_CSR_TX_ATN_LVL_TU4_WORD_FULL);
switch (params_rate(params)) {
case 32000:
spdifclock = 4096000;