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drm/amdgpu/soc15: add support for sienna_cichlid

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Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Likun Gao 2019-03-19 11:04:03 +08:00 • committed by Alex Deucher
parent 2f7f522722
commit 117910ed92
1 changed files with 6 additions and 0 deletions
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6
drivers/gpu/drm/amd/amdgpu/nv.c
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@ -686,6 +686,11 @@ static int nv_common_early_init(void *handle)
adev->rev_id = 0;
adev->external_rev_id = adev->rev_id + 0xa;
break;
case CHIP_SIENNA_CICHLID:
adev->cg_flags = 0;
adev->pg_flags = 0;
adev->external_rev_id = adev->rev_id + 0x28;
break;
default:
/* FIXME: not supported yet */
return -EINVAL;
@ -901,6 +906,7 @@ static int nv_common_set_clockgating_state(void *handle,
case CHIP_NAVI10:
case CHIP_NAVI14:
case CHIP_NAVI12:
case CHIP_SIENNA_CICHLID:
adev->nbio.funcs->update_medium_grain_clock_gating(adev,
state == AMD_CG_STATE_GATE);
adev->nbio.funcs->update_medium_grain_light_sleep(adev,