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riscv: dts: sophgo: sg2044: Add I2C device
The I2C controller of SG2044 is a standard Synopsys IP, with one the ref clock is need. Add I2C DT node for SG2044 SoC. Link: https://lore.kernel.org/r/20250608232836.784737-5-inochiama@gmail.com Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
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@ -91,6 +91,62 @@
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status = "disabled";
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};
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i2c0: i2c@7040005000 {
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compatible = "sophgo,sg2044-i2c", "snps,designware-i2c";
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reg = <0x70 0x40005000 0x0 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <100000>;
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clocks = <&clk CLK_GATE_APB_I2C>;
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clock-names = "ref";
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interrupt-parent = <&intc>;
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interrupts = <31 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&rst RST_I2C0>;
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status = "disabled";
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};
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i2c1: i2c@7040006000 {
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compatible = "sophgo,sg2044-i2c", "snps,designware-i2c";
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reg = <0x70 0x40006000 0x0 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <100000>;
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clocks = <&clk CLK_GATE_APB_I2C>;
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clock-names = "ref";
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interrupt-parent = <&intc>;
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interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&rst RST_I2C1>;
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status = "disabled";
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};
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i2c2: i2c@7040007000 {
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compatible = "sophgo,sg2044-i2c", "snps,designware-i2c";
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reg = <0x70 0x40007000 0x0 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <100000>;
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clocks = <&clk CLK_GATE_APB_I2C>;
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clock-names = "ref";
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interrupt-parent = <&intc>;
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interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&rst RST_I2C2>;
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status = "disabled";
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};
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i2c3: i2c@7040008000 {
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compatible = "sophgo,sg2044-i2c", "snps,designware-i2c";
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reg = <0x70 0x40008000 0x0 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <100000>;
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clocks = <&clk CLK_GATE_APB_I2C>;
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clock-names = "ref";
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interrupt-parent = <&intc>;
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interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&rst RST_I2C3>;
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status = "disabled";
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};
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gpio0: gpio@7040009000 {
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compatible = "snps,dw-apb-gpio";
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reg = <0x70 0x40009000 0x0 0x1000>;
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