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arm64: dts: cavium: thunder2: Add missing PL011 "uartclk"
The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The Thunder2 SoC is missing the core "uartclk". In this case, the Linux driver uses single clock for both clock inputs. Let's assume that's how the h/w is wired and make the DT reflect that. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250609215706.3009692-2-robh@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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1 changed files with 2 additions and 2 deletions
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@ -136,8 +136,8 @@
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reg = <0x04 0x02020000 0x0 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk125mhz>;
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clock-names = "apb_pclk";
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clocks = <&clk125mhz>, <&clk125mhz>;
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clock-names = "uartclk", "apb_pclk";
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};
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};
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