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drm/amd/powerplay: remove useless soft pptable in Asic related backend

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The soft pptable was used for re-uploading pptable as cache, but since
previous commits, the generic codes for uploading pptable are used and
backend is released during resetting powerplay. So it becomes redundance.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Eric Huang 2016-07-07 14:53:42 -04:00 • committed by Alex Deucher
parent e8c1fe9f50
commit 0a81a87c98
6 changed files with 0 additions and 31 deletions
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7
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c
View file

@ -581,13 +581,6 @@ static int fiji_patch_boot_state(struct pp_hwmgr *hwmgr,
static int fiji_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) static int fiji_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
{ {
struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);
if (data->soft_pp_table) {
kfree(data->soft_pp_table);
data->soft_pp_table = NULL;
}
return phm_hwmgr_backend_fini(hwmgr); return phm_hwmgr_backend_fini(hwmgr);
} }

3
drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h
View file

@ -302,9 +302,6 @@ struct fiji_hwmgr {
bool pg_acp_init; bool pg_acp_init;
bool frtc_enabled; bool frtc_enabled;
bool frtc_status_changed; bool frtc_status_changed;
/* soft pptable for re-uploading into smu */
void *soft_pp_table;
}; };
/* To convert to Q8.8 format for firmware */ /* To convert to Q8.8 format for firmware */

7
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
View file

@ -2739,13 +2739,6 @@ int polaris10_reset_asic_tasks(struct pp_hwmgr *hwmgr)
int polaris10_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) int polaris10_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
{ {
struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
if (data->soft_pp_table) {
kfree(data->soft_pp_table);
data->soft_pp_table = NULL;
}
return phm_hwmgr_backend_fini(hwmgr); return phm_hwmgr_backend_fini(hwmgr);
} }

4
drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.h
View file

@ -309,10 +309,6 @@ struct polaris10_hwmgr {
uint32_t up_hyst; uint32_t up_hyst;
uint32_t disable_dpm_mask; uint32_t disable_dpm_mask;
bool apply_optimized_settings; bool apply_optimized_settings;
/* soft pptable for re-uploading into smu */
void *soft_pp_table;
uint32_t avfs_vdroop_override_setting; uint32_t avfs_vdroop_override_setting;
bool apply_avfs_cks_off_voltage; bool apply_avfs_cks_off_voltage;
}; };

7
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c
View file

@ -4422,13 +4422,6 @@ int tonga_reset_asic_tasks(struct pp_hwmgr *hwmgr)
int tonga_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) int tonga_hwmgr_backend_fini(struct pp_hwmgr *hwmgr)
{ {
struct tonga_hwmgr *data = (struct tonga_hwmgr *)(hwmgr->backend);
if (data->soft_pp_table) {
kfree(data->soft_pp_table);
data->soft_pp_table = NULL;
}
return phm_hwmgr_backend_fini(hwmgr); return phm_hwmgr_backend_fini(hwmgr);
} }

3
drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.h
View file

@ -352,9 +352,6 @@ struct tonga_hwmgr {
bool samu_power_gated; /* 1: gated, 0:not gated */ bool samu_power_gated; /* 1: gated, 0:not gated */
bool acp_power_gated; /* 1: gated, 0:not gated */ bool acp_power_gated; /* 1: gated, 0:not gated */
bool pg_acp_init; bool pg_acp_init;
/* soft pptable for re-uploading into smu */
void *soft_pp_table;
}; };
typedef struct tonga_hwmgr tonga_hwmgr; typedef struct tonga_hwmgr tonga_hwmgr;