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drm/amd/powerplay: add od condition for power limit

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Add condition to judge whether overdrive is enabled and correct power
limit value for overdrive used by power limit interface.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Likun Gao 2019-02-01 13:22:33 +08:00 • committed by Alex Deucher
parent 3b94fb101f
commit 07740adcbc
3 changed files with 17 additions and 0 deletions
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1
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
View file

@ -307,6 +307,7 @@ struct smu_table_context
struct smu_table memory_pool; struct smu_table memory_pool;
uint16_t software_shutdown_temp; uint16_t software_shutdown_temp;
uint8_t thermal_controller_type; uint8_t thermal_controller_type;
uint16_t TDPODLimit;
uint8_t *od_feature_capabilities; uint8_t *od_feature_capabilities;
uint32_t *od_settings_max; uint32_t *od_settings_max;

15
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
View file

@ -925,6 +925,10 @@ static int smu_v11_0_get_power_limit(struct smu_context *smu,
if (get_default) { if (get_default) {
mutex_lock(&smu->mutex); mutex_lock(&smu->mutex);
*limit = smu->default_power_limit; *limit = smu->default_power_limit;
if (smu->od_enabled) {
*limit *= (100 + smu->smu_table.TDPODLimit);
*limit /= 100;
}
mutex_unlock(&smu->mutex); mutex_unlock(&smu->mutex);
} else { } else {
ret = smu_send_smc_msg_with_param(smu, SMU_MSG_GetPptLimit, ret = smu_send_smc_msg_with_param(smu, SMU_MSG_GetPptLimit,
@ -942,8 +946,19 @@ static int smu_v11_0_get_power_limit(struct smu_context *smu,
static int smu_v11_0_set_power_limit(struct smu_context *smu, uint32_t n) static int smu_v11_0_set_power_limit(struct smu_context *smu, uint32_t n)
{ {
uint32_t max_power_limit;
int ret = 0; int ret = 0;
if (n == 0)
n = smu->default_power_limit;
max_power_limit = smu->default_power_limit;
if (smu->od_enabled) {
max_power_limit *= (100 + smu->smu_table.TDPODLimit);
max_power_limit /= 100;
}
if (smu_feature_is_enabled(smu, FEATURE_PPT_BIT)) if (smu_feature_is_enabled(smu, FEATURE_PPT_BIT))
ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetPptLimit, n); ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetPptLimit, n);
if (ret) { if (ret) {

1
drivers/gpu/drm/amd/powerplay/vega20_ppt.c
View file

@ -274,6 +274,7 @@ static int vega20_store_powerplay_table(struct smu_context *smu)
table_context->software_shutdown_temp = powerplay_table->usSoftwareShutdownTemp; table_context->software_shutdown_temp = powerplay_table->usSoftwareShutdownTemp;
table_context->thermal_controller_type = powerplay_table->ucThermalControllerType; table_context->thermal_controller_type = powerplay_table->ucThermalControllerType;
table_context->TDPODLimit = le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingsMax[ATOM_VEGA20_ODSETTING_POWERPERCENTAGE]);
ret = vega20_setup_od8_information(smu); ret = vega20_setup_od8_information(smu);