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Revert "drm/i915/hwmon: Enable PL1 power limit"

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This reverts commit 0349c41b05.

0349c41b05 ("drm/i915/hwmon: Enable PL1 power limit") is incorrect and
caused a major regression on ATSM. The change enabled the PL1 power limit
but FW sets the default value of the PL1 limit to 0 which implies HW now
works at minimum power and therefore the lowest effective frequency. This
means all workloads now run slower resulting in even GuC FW load operations
timing out, rendering ATSM unusable.

A different solution to the original issue of the PL1 limit being disabled
on ATSM is needed but till that is developed, revert 0349c41b05.

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8062
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230208190312.1611335-1-ashutosh.dixit@intel.com
This commit is contained in:
Ashutosh Dixit 2023-02-08 11:03:12 -08:00 • committed by Rodrigo Vivi
parent a0dcb06d29
commit 05d5562e40
1 changed files with 0 additions and 5 deletions
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5
drivers/gpu/drm/i915/i915_hwmon.c
View file

@ -687,11 +687,6 @@ hwm_get_preregistration_info(struct drm_i915_private *i915)
for_each_gt(gt, i915, i)
hwm_energy(&hwmon->ddat_gt[i], &energy);
}
/* Enable PL1 power limit */
if (i915_mmio_reg_valid(hwmon->rg.pkg_rapl_limit))
hwm_locked_with_pm_intel_uncore_rmw(ddat, hwmon->rg.pkg_rapl_limit,
PKG_PWR_LIM_1_EN, PKG_PWR_LIM_1_EN);
}
void i915_hwmon_register(struct drm_i915_private *i915)