mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-05-14 19:53:03 +00:00
x86: rewrite '__copy_user_nocache' function
I didn't really want to do this, but as part of all the other changes to
the user copy loops, I've been looking at this horror.
I tried to clean it up multiple times, but every time I just found more
problems, and the way it's written, it's just too hard to fix them.
For example, the code is written to do quad-word alignment, and will use
regular byte accesses to get to that point. That's fairly simple, but
it means that any initial 8-byte alignment will be done with cached
copies.
However, the code then is very careful to do any 4-byte _tail_ accesses
using an uncached 4-byte write, and that was claimed to be relevant in
commit a82eee7424
("x86/uaccess/64: Handle the caching of 4-byte
nocache copies properly in __copy_user_nocache()").
So if you do a 4-byte copy using that function, it carefully uses a
4-byte 'movnti' for the destination. But if you were to do a 12-byte
copy that is 4-byte aligned, it would _not_ do a 4-byte 'movnti'
followed by a 8-byte 'movnti' to keep it all uncached.
Instead, it would align the destination to 8 bytes using a
byte-at-a-time loop, and then do a 8-byte 'movnti' for the final 8
bytes.
The main caller that cares is __copy_user_flushcache(), which knows
about this insanity, and has odd cases for it all. But I just can't
deal with looking at this kind of "it does one case right, and another
related case entirely wrong".
And the code really wasn't fixable without hard drugs, which I try to
avoid.
So instead, rewrite it in a form that hopefully not only gets this
right, but is a bit more maintainable. Knock wood.
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
parent
e1f2750edc
commit
034ff37d34
3 changed files with 243 additions and 214 deletions
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@ -71,6 +71,6 @@ ifneq ($(CONFIG_GENERIC_CSUM),y)
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endif
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lib-y += clear_page_64.o copy_page_64.o
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lib-y += memmove_64.o memset_64.o
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lib-y += copy_user_64.o
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lib-y += copy_user_64.o copy_user_uncached_64.o
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lib-y += cmpxchg16b_emu.o
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endif
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@ -7,15 +7,8 @@
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*/
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#include <linux/linkage.h>
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#include <asm/current.h>
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <asm/cpufeatures.h>
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#include <asm/alternative.h>
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#include <asm/asm.h>
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#include <asm/smap.h>
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#include <asm/export.h>
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#include <asm/trapnr.h>
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/*
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* rep_movs_alternative - memory copy with exception handling.
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@ -119,209 +112,3 @@ SYM_FUNC_START(rep_movs_alternative)
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_ASM_EXTABLE_UA(27b, .Lcopy_user_tail)
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SYM_FUNC_END(rep_movs_alternative)
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EXPORT_SYMBOL(rep_movs_alternative)
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/*
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* The uncached copy needs to align the destination for
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* movnti and friends.
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*/
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.macro ALIGN_DESTINATION
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/* check for bad alignment of destination */
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movl %edi,%ecx
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andl $7,%ecx
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jz 102f /* already aligned */
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subl $8,%ecx
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negl %ecx
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subl %ecx,%edx
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100: movb (%rsi),%al
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101: movb %al,(%rdi)
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incq %rsi
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incq %rdi
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decl %ecx
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jnz 100b
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102:
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_ASM_EXTABLE_CPY(100b, .Lcopy_user_handle_align)
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_ASM_EXTABLE_CPY(101b, .Lcopy_user_handle_align)
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.endm
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/*
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* copy_user_nocache - Uncached memory copy with exception handling
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* This will force destination out of cache for more performance.
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*
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* Note: Cached memory copy is used when destination or size is not
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* naturally aligned. That is:
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* - Require 8-byte alignment when size is 8 bytes or larger.
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* - Require 4-byte alignment when size is 4 bytes.
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*/
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SYM_FUNC_START(__copy_user_nocache)
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/* If size is less than 8 bytes, go to 4-byte copy */
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cmpl $8,%edx
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jb .L_4b_nocache_copy_entry
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/* If destination is not 8-byte aligned, "cache" copy to align it */
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ALIGN_DESTINATION
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/* Set 4x8-byte copy count and remainder */
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movl %edx,%ecx
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andl $63,%edx
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shrl $6,%ecx
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jz .L_8b_nocache_copy_entry /* jump if count is 0 */
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/* Perform 4x8-byte nocache loop-copy */
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.L_4x8b_nocache_copy_loop:
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1: movq (%rsi),%r8
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2: movq 1*8(%rsi),%r9
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3: movq 2*8(%rsi),%r10
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4: movq 3*8(%rsi),%r11
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5: movnti %r8,(%rdi)
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6: movnti %r9,1*8(%rdi)
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7: movnti %r10,2*8(%rdi)
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8: movnti %r11,3*8(%rdi)
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9: movq 4*8(%rsi),%r8
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10: movq 5*8(%rsi),%r9
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11: movq 6*8(%rsi),%r10
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12: movq 7*8(%rsi),%r11
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13: movnti %r8,4*8(%rdi)
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14: movnti %r9,5*8(%rdi)
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15: movnti %r10,6*8(%rdi)
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16: movnti %r11,7*8(%rdi)
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leaq 64(%rsi),%rsi
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leaq 64(%rdi),%rdi
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decl %ecx
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jnz .L_4x8b_nocache_copy_loop
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/* Set 8-byte copy count and remainder */
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.L_8b_nocache_copy_entry:
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movl %edx,%ecx
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andl $7,%edx
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shrl $3,%ecx
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jz .L_4b_nocache_copy_entry /* jump if count is 0 */
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/* Perform 8-byte nocache loop-copy */
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.L_8b_nocache_copy_loop:
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20: movq (%rsi),%r8
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21: movnti %r8,(%rdi)
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leaq 8(%rsi),%rsi
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leaq 8(%rdi),%rdi
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decl %ecx
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jnz .L_8b_nocache_copy_loop
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/* If no byte left, we're done */
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.L_4b_nocache_copy_entry:
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andl %edx,%edx
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jz .L_finish_copy
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/* If destination is not 4-byte aligned, go to byte copy: */
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movl %edi,%ecx
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andl $3,%ecx
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jnz .L_1b_cache_copy_entry
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/* Set 4-byte copy count (1 or 0) and remainder */
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movl %edx,%ecx
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andl $3,%edx
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shrl $2,%ecx
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jz .L_1b_cache_copy_entry /* jump if count is 0 */
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/* Perform 4-byte nocache copy: */
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30: movl (%rsi),%r8d
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31: movnti %r8d,(%rdi)
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leaq 4(%rsi),%rsi
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leaq 4(%rdi),%rdi
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/* If no bytes left, we're done: */
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andl %edx,%edx
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jz .L_finish_copy
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/* Perform byte "cache" loop-copy for the remainder */
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.L_1b_cache_copy_entry:
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movl %edx,%ecx
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.L_1b_cache_copy_loop:
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40: movb (%rsi),%al
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41: movb %al,(%rdi)
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incq %rsi
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incq %rdi
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decl %ecx
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jnz .L_1b_cache_copy_loop
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/* Finished copying; fence the prior stores */
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.L_finish_copy:
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xorl %eax,%eax
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sfence
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RET
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.L_fixup_4x8b_copy:
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shll $6,%ecx
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addl %ecx,%edx
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jmp .L_fixup_handle_tail
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.L_fixup_8b_copy:
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lea (%rdx,%rcx,8),%rdx
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jmp .L_fixup_handle_tail
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.L_fixup_4b_copy:
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lea (%rdx,%rcx,4),%rdx
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jmp .L_fixup_handle_tail
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.L_fixup_1b_copy:
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movl %ecx,%edx
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.L_fixup_handle_tail:
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sfence
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jmp .Lcopy_user_handle_tail
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_ASM_EXTABLE_CPY(1b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(2b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(3b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(4b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(5b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(6b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(7b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(8b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(9b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(10b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(11b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(12b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(13b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(14b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(15b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(16b, .L_fixup_4x8b_copy)
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_ASM_EXTABLE_CPY(20b, .L_fixup_8b_copy)
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_ASM_EXTABLE_CPY(21b, .L_fixup_8b_copy)
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_ASM_EXTABLE_CPY(30b, .L_fixup_4b_copy)
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_ASM_EXTABLE_CPY(31b, .L_fixup_4b_copy)
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_ASM_EXTABLE_CPY(40b, .L_fixup_1b_copy)
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_ASM_EXTABLE_CPY(41b, .L_fixup_1b_copy)
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/*
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* Try to copy last bytes.
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* Since protection fault in copy_from/to_user is not a normal situation,
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* it is not necessary to optimize tail handling.
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* Don't try to copy the tail if machine check happened
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*
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* Input:
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* eax trap number written by ex_handler_copy()
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* rdi destination
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* rsi source
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* rdx count
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*
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* Output:
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* eax uncopied bytes or 0 if successful.
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*/
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.Lcopy_user_handle_tail:
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cmp $X86_TRAP_MC,%eax
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je 3f
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movl %edx,%ecx
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1: rep movsb
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2: mov %ecx,%eax
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RET
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3:
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movl %edx,%eax
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RET
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_ASM_EXTABLE_CPY(1b, 2b)
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.Lcopy_user_handle_align:
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addl %ecx,%edx
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jmp .Lcopy_user_handle_tail
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SYM_FUNC_END(__copy_user_nocache)
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EXPORT_SYMBOL(__copy_user_nocache)
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242
arch/x86/lib/copy_user_uncached_64.S
Normal file
242
arch/x86/lib/copy_user_uncached_64.S
Normal file
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@ -0,0 +1,242 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2023 Linus Torvalds <torvalds@linux-foundation.org>
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*/
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#include <linux/linkage.h>
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#include <asm/asm.h>
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#include <asm/export.h>
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/*
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* copy_user_nocache - Uncached memory copy with exception handling
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*
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* This copies from user space into kernel space, but the kernel
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* space accesses can take a machine check exception, so they too
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* need exception handling.
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*
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* Note: only 32-bit and 64-bit stores have non-temporal versions,
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* and we only use aligned versions. Any unaligned parts at the
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* start or end of the copy will be done using normal cached stores.
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*
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* Input:
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* rdi destination
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* rsi source
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* edx count
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*
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* Output:
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* rax uncopied bytes or 0 if successful.
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*/
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SYM_FUNC_START(__copy_user_nocache)
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/* If destination is not 7-byte aligned, we'll have to align it */
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testb $7,%dil
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jne .Lalign
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.Lis_aligned:
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cmp $64,%edx
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jb .Lquadwords
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.p2align 4,0x90
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.Lunrolled:
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10: movq (%rsi),%r8
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11: movq 8(%rsi),%r9
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12: movq 16(%rsi),%r10
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13: movq 24(%rsi),%r11
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20: movnti %r8,(%rdi)
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21: movnti %r9,8(%rdi)
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22: movnti %r10,16(%rdi)
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23: movnti %r11,24(%rdi)
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30: movq 32(%rsi),%r8
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31: movq 40(%rsi),%r9
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32: movq 48(%rsi),%r10
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33: movq 56(%rsi),%r11
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40: movnti %r8,32(%rdi)
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41: movnti %r9,40(%rdi)
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42: movnti %r10,48(%rdi)
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43: movnti %r11,56(%rdi)
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addq $64,%rsi
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addq $64,%rdi
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sub $64,%edx
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cmp $64,%edx
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jae .Lunrolled
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/*
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* First set of user mode loads have been done
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* without any stores, so if they fail, we can
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* just try the non-unrolled loop.
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*/
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_ASM_EXTABLE_UA(10b, .Lquadwords)
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_ASM_EXTABLE_UA(11b, .Lquadwords)
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_ASM_EXTABLE_UA(12b, .Lquadwords)
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_ASM_EXTABLE_UA(13b, .Lquadwords)
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/*
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* The second set of user mode loads have been
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* done with 32 bytes stored to the destination,
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* so we need to take that into account before
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* falling back to the unrolled loop.
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*/
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_ASM_EXTABLE_UA(30b, .Lfixup32)
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_ASM_EXTABLE_UA(31b, .Lfixup32)
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_ASM_EXTABLE_UA(32b, .Lfixup32)
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_ASM_EXTABLE_UA(33b, .Lfixup32)
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/*
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* An exception on a write means that we're
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* done, but we need to update the count
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* depending on where in the unrolled loop
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* we were.
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*/
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_ASM_EXTABLE_UA(20b, .Ldone0)
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_ASM_EXTABLE_UA(21b, .Ldone8)
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_ASM_EXTABLE_UA(22b, .Ldone16)
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_ASM_EXTABLE_UA(23b, .Ldone24)
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_ASM_EXTABLE_UA(40b, .Ldone32)
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_ASM_EXTABLE_UA(41b, .Ldone40)
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_ASM_EXTABLE_UA(42b, .Ldone48)
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_ASM_EXTABLE_UA(43b, .Ldone56)
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.Lquadwords:
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cmp $8,%edx
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jb .Llong
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50: movq (%rsi),%rax
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51: movnti %rax,(%rdi)
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addq $8,%rsi
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addq $8,%rdi
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sub $8,%edx
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jmp .Lquadwords
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/*
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* If we fail on the last full quadword, we will
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* not try to do any byte-wise cached accesses.
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* We will try to do one more 4-byte uncached
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* one, though.
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*/
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_ASM_EXTABLE_UA(50b, .Llast4)
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_ASM_EXTABLE_UA(51b, .Ldone0)
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.Llong:
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test $4,%dl
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je .Lword
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60: movl (%rsi),%eax
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61: movnti %eax,(%rdi)
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addq $4,%rsi
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addq $4,%rdi
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sub $4,%edx
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.Lword:
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sfence
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test $2,%dl
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je .Lbyte
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70: movw (%rsi),%ax
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71: movw %ax,(%rdi)
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addq $2,%rsi
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addq $2,%rdi
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sub $2,%edx
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.Lbyte:
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test $1,%dl
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je .Ldone
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80: movb (%rsi),%al
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81: movb %al,(%rdi)
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dec %edx
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.Ldone:
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mov %edx,%eax
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RET
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/*
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* If we fail on the last four bytes, we won't
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* bother with any fixups. It's dead, Jim. Note
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* that there's no need for 'sfence' for any
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* of this, since the exception will have been
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* serializing.
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*/
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_ASM_EXTABLE_UA(60b, .Ldone)
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_ASM_EXTABLE_UA(61b, .Ldone)
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_ASM_EXTABLE_UA(70b, .Ldone)
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_ASM_EXTABLE_UA(71b, .Ldone)
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_ASM_EXTABLE_UA(80b, .Ldone)
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_ASM_EXTABLE_UA(81b, .Ldone)
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/*
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* This is the "head needs aliging" case when
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* the destination isn't 8-byte aligned. The
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* 4-byte case can be done uncached, but any
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* smaller alignment is done with regular stores.
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*/
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.Lalign:
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test $1,%dil
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je .Lalign_word
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test %edx,%edx
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je .Ldone
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90: movb (%rsi),%al
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91: movb %al,(%rdi)
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inc %rsi
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inc %rdi
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dec %edx
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.Lalign_word:
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test $2,%dil
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je .Lalign_long
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cmp $2,%edx
|
||||
jb .Lbyte
|
||||
92: movw (%rsi),%ax
|
||||
93: movw %ax,(%rdi)
|
||||
addq $2,%rsi
|
||||
addq $2,%rdi
|
||||
sub $2,%edx
|
||||
.Lalign_long:
|
||||
test $4,%dil
|
||||
je .Lis_aligned
|
||||
cmp $4,%edx
|
||||
jb .Lword
|
||||
94: movl (%rsi),%eax
|
||||
95: movnti %eax,(%rdi)
|
||||
addq $4,%rsi
|
||||
addq $4,%rdi
|
||||
sub $4,%edx
|
||||
jmp .Lis_aligned
|
||||
|
||||
/*
|
||||
* If we fail on the initial alignment accesses,
|
||||
* we're all done. Again, no point in trying to
|
||||
* do byte-by-byte probing if the 4-byte load
|
||||
* fails - we're not doing any uncached accesses
|
||||
* any more.
|
||||
*/
|
||||
_ASM_EXTABLE_UA(90b, .Ldone)
|
||||
_ASM_EXTABLE_UA(91b, .Ldone)
|
||||
_ASM_EXTABLE_UA(92b, .Ldone)
|
||||
_ASM_EXTABLE_UA(93b, .Ldone)
|
||||
_ASM_EXTABLE_UA(94b, .Ldone)
|
||||
_ASM_EXTABLE_UA(95b, .Ldone)
|
||||
|
||||
/*
|
||||
* Exception table fixups for faults in the middle
|
||||
*/
|
||||
.Ldone56: sub $8,%edx
|
||||
.Ldone48: sub $8,%edx
|
||||
.Ldone40: sub $8,%edx
|
||||
.Ldone32: sub $8,%edx
|
||||
.Ldone24: sub $8,%edx
|
||||
.Ldone16: sub $8,%edx
|
||||
.Ldone8: sub $8,%edx
|
||||
.Ldone0:
|
||||
mov %edx,%eax
|
||||
RET
|
||||
|
||||
.Lfixup32:
|
||||
addq $32,%rsi
|
||||
addq $32,%rdi
|
||||
sub $32,%edx
|
||||
jmp .Lquadwords
|
||||
|
||||
.Llast4:
|
||||
52: movl (%rsi),%eax
|
||||
53: movnti %eax,(%rdi)
|
||||
sfence
|
||||
sub $4,%edx
|
||||
mov %edx,%eax
|
||||
RET
|
||||
_ASM_EXTABLE_UA(52b, .Ldone0)
|
||||
_ASM_EXTABLE_UA(53b, .Ldone0)
|
||||
|
||||
SYM_FUNC_END(__copy_user_nocache)
|
||||
EXPORT_SYMBOL(__copy_user_nocache)
|
Loading…
Add table
Reference in a new issue