mirror of
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-09-18 22:14:16 +00:00
Several RISC-V fixes for v6.17-rc5:
- An LTO fix for clang when building with CONFIG_CMODEL_MEDLOW - A fix for ACPI CPPC CSR read/write return values - Several fixes for incorrect access widths in thread_info.cpu reads - A fix for an issue in __put_user_nocheck() that was causing the glibc tst-socket-timestamp test to fail - A fix to initialize struct kexec_buf records in several kexec-related functions, which were generating UBSAN warnings - Two fixes for sparse warnings -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAmi7X/YACgkQx4+xDQu9 KkvvqRAAnZwgWgOJYPSrlpoxZ/uk/J8tU5ULsdkEs/l79Yl1geCk/Jh7xGJo4ROI HvSZPC4s4D7MPtXkV7VFwqAVl1betNAvTB13eIkmLrMHuDoh9EqBbG3CBvPeKY+l I0eRp5uSGGIccdLFaTqmO+IHp6SiCj6xTshUme8TT5+UuDdDiducucDtNUSveYNI ehRyuNR6Kw7vATnQHOqwnbHgAxA8mtzFjJVvd/C89C79B6D965+urN+tPhGoYBe0 R9zEhxKPdtsnE0KZfE2sNt7q9V59O7Nsl9Q2YjXY3q3t7xPeEyhDMnYrK7XJ3cRj VRy0UkF233WKbmD8jne6p/BVw1nC/ktK8a/j6ZiXK61WhuJviv52LZIbhswq4/R/ ssI55ne0WkDS2VtmiNibGRP8tBuiajqmjMiE83o620Q5zHt4fA0fQN2SbBj5P441 CprhRCCxOLdczQIZWnZx8aYJuPYKbFaoVz+YCGZD9hN1TzKKO1K3eshVym/Jr6K4 Ez2CMJXVCycy5vlwOeQqIEEVsnZ43tvXS+O0wc9bFVP27JVXNmN0geU79S0acw8z 3XOP8LtlY37Uxz0O2cakygVL859WpDbTJe5ECi2L+m57XXXFOVqa1yIF8+/kG8+B lB3dOwWjCiR1hwNHRxon8CWvCmUBaHRwYmCTmMpSRs53mHhyRpE= =o1+b -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.17-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Paul Walmsley: - LTO fix for clang when building with CONFIG_CMODEL_MEDLOW - Fix for ACPI CPPC CSR read/write return values - Several fixes for incorrect access widths in thread_info.cpu reads - Fix an issue in __put_user_nocheck() that was causing the glibc tst-socket-timestamp test to fail - Initialize struct kexec_buf records in several kexec-related functions, which were generating UBSAN warnings - Two fixes for sparse warnings * tag 'riscv-for-linus-6.17-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Fix sparse warning about different address spaces riscv: Fix sparse warning in __get_user_error() riscv: kexec: Initialize kexec_buf struct riscv: use lw when reading int cpu in asm_per_cpu riscv, bpf: use lw when reading int cpu in bpf_get_smp_processor_id riscv, bpf: use lw when reading int cpu in BPF_MOV64_PERCPU_REG riscv: uaccess: fix __put_user_nocheck for unaligned accesses riscv: use lw when reading int cpu in new_vmalloc_check ACPI: RISC-V: Fix FFH_CPPC_CSR error handling riscv: Only allow LTO with CMODEL_MEDANY
This commit is contained in:
commit
00e6982822
9 changed files with 15 additions and 15 deletions
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@ -65,7 +65,7 @@ config RISCV
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select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE
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select ARCH_SUPPORTS_HUGE_PFNMAP if TRANSPARENT_HUGEPAGE
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select ARCH_SUPPORTS_HUGETLBFS if MMU
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select ARCH_SUPPORTS_HUGETLBFS if MMU
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# LLD >= 14: https://github.com/llvm/llvm-project/issues/50505
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# LLD >= 14: https://github.com/llvm/llvm-project/issues/50505
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select ARCH_SUPPORTS_LTO_CLANG if LLD_VERSION >= 140000
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select ARCH_SUPPORTS_LTO_CLANG if LLD_VERSION >= 140000 && CMODEL_MEDANY
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select ARCH_SUPPORTS_LTO_CLANG_THIN if LLD_VERSION >= 140000
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select ARCH_SUPPORTS_LTO_CLANG_THIN if LLD_VERSION >= 140000
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select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS if 64BIT && MMU
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select ARCH_SUPPORTS_MSEAL_SYSTEM_MAPPINGS if 64BIT && MMU
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select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU
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select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU
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@ -91,7 +91,7 @@
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#endif
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#endif
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.macro asm_per_cpu dst sym tmp
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.macro asm_per_cpu dst sym tmp
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REG_L \tmp, TASK_TI_CPU_NUM(tp)
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lw \tmp, TASK_TI_CPU_NUM(tp)
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slli \tmp, \tmp, PER_CPU_OFFSET_SHIFT
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slli \tmp, \tmp, PER_CPU_OFFSET_SHIFT
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la \dst, __per_cpu_offset
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la \dst, __per_cpu_offset
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add \dst, \dst, \tmp
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add \dst, \dst, \tmp
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@ -209,7 +209,7 @@ do { \
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err = 0; \
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err = 0; \
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break; \
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break; \
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__gu_failed: \
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__gu_failed: \
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x = 0; \
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x = (__typeof__(x))0; \
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err = -EFAULT; \
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err = -EFAULT; \
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} while (0)
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} while (0)
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@ -311,7 +311,7 @@ do { \
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do { \
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do { \
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if (!IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) && \
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if (!IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) && \
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!IS_ALIGNED((uintptr_t)__gu_ptr, sizeof(*__gu_ptr))) { \
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!IS_ALIGNED((uintptr_t)__gu_ptr, sizeof(*__gu_ptr))) { \
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__inttype(x) ___val = (__inttype(x))x; \
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__typeof__(*(__gu_ptr)) ___val = (x); \
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if (__asm_copy_to_user_sum_enabled(__gu_ptr, &(___val), sizeof(*__gu_ptr))) \
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if (__asm_copy_to_user_sum_enabled(__gu_ptr, &(___val), sizeof(*__gu_ptr))) \
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goto label; \
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goto label; \
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break; \
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break; \
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@ -438,10 +438,10 @@ unsigned long __must_check clear_user(void __user *to, unsigned long n)
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}
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}
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#define __get_kernel_nofault(dst, src, type, err_label) \
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#define __get_kernel_nofault(dst, src, type, err_label) \
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__get_user_nocheck(*((type *)(dst)), (type *)(src), err_label)
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__get_user_nocheck(*((type *)(dst)), (__force __user type *)(src), err_label)
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#define __put_kernel_nofault(dst, src, type, err_label) \
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#define __put_kernel_nofault(dst, src, type, err_label) \
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__put_user_nocheck(*((type *)(src)), (type *)(dst), err_label)
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__put_user_nocheck(*((type *)(src)), (__force __user type *)(dst), err_label)
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static __must_check __always_inline bool user_access_begin(const void __user *ptr, size_t len)
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static __must_check __always_inline bool user_access_begin(const void __user *ptr, size_t len)
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{
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{
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@ -46,7 +46,7 @@
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* a0 = &new_vmalloc[BIT_WORD(cpu)]
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* a0 = &new_vmalloc[BIT_WORD(cpu)]
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* a1 = BIT_MASK(cpu)
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* a1 = BIT_MASK(cpu)
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*/
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*/
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REG_L a2, TASK_TI_CPU(tp)
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lw a2, TASK_TI_CPU(tp)
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/*
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/*
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* Compute the new_vmalloc element position:
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* Compute the new_vmalloc element position:
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* (cpu / 64) * 8 = (cpu >> 6) << 3
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* (cpu / 64) * 8 = (cpu >> 6) << 3
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@ -28,7 +28,7 @@ static int riscv_kexec_elf_load(struct kimage *image, struct elfhdr *ehdr,
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int i;
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int i;
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int ret = 0;
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int ret = 0;
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size_t size;
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size_t size;
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struct kexec_buf kbuf;
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struct kexec_buf kbuf = {};
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const struct elf_phdr *phdr;
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const struct elf_phdr *phdr;
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kbuf.image = image;
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kbuf.image = image;
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@ -66,7 +66,7 @@ static int elf_find_pbase(struct kimage *image, unsigned long kernel_len,
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{
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{
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int i;
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int i;
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int ret;
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int ret;
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struct kexec_buf kbuf;
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struct kexec_buf kbuf = {};
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const struct elf_phdr *phdr;
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const struct elf_phdr *phdr;
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unsigned long lowest_paddr = ULONG_MAX;
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unsigned long lowest_paddr = ULONG_MAX;
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unsigned long lowest_vaddr = ULONG_MAX;
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unsigned long lowest_vaddr = ULONG_MAX;
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@ -41,7 +41,7 @@ static void *image_load(struct kimage *image,
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struct riscv_image_header *h;
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struct riscv_image_header *h;
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u64 flags;
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u64 flags;
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bool be_image, be_kernel;
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bool be_image, be_kernel;
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struct kexec_buf kbuf;
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struct kexec_buf kbuf = {};
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int ret;
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int ret;
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/* Check Image header */
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/* Check Image header */
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@ -261,7 +261,7 @@ int load_extra_segments(struct kimage *image, unsigned long kernel_start,
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int ret;
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int ret;
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void *fdt;
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void *fdt;
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unsigned long initrd_pbase = 0UL;
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unsigned long initrd_pbase = 0UL;
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struct kexec_buf kbuf;
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struct kexec_buf kbuf = {};
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char *modified_cmdline = NULL;
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char *modified_cmdline = NULL;
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kbuf.image = image;
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kbuf.image = image;
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@ -1356,7 +1356,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
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emit_mv(rd, rs, ctx);
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emit_mv(rd, rs, ctx);
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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/* Load current CPU number in T1 */
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/* Load current CPU number in T1 */
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emit_ld(RV_REG_T1, offsetof(struct thread_info, cpu),
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emit_lw(RV_REG_T1, offsetof(struct thread_info, cpu),
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RV_REG_TP, ctx);
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RV_REG_TP, ctx);
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/* Load address of __per_cpu_offset array in T2 */
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/* Load address of __per_cpu_offset array in T2 */
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emit_addr(RV_REG_T2, (u64)&__per_cpu_offset, extra_pass, ctx);
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emit_addr(RV_REG_T2, (u64)&__per_cpu_offset, extra_pass, ctx);
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@ -1763,7 +1763,7 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx,
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*/
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*/
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if (insn->src_reg == 0 && insn->imm == BPF_FUNC_get_smp_processor_id) {
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if (insn->src_reg == 0 && insn->imm == BPF_FUNC_get_smp_processor_id) {
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/* Load current CPU number in R0 */
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/* Load current CPU number in R0 */
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emit_ld(bpf_to_rv_reg(BPF_REG_0, ctx), offsetof(struct thread_info, cpu),
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emit_lw(bpf_to_rv_reg(BPF_REG_0, ctx), offsetof(struct thread_info, cpu),
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RV_REG_TP, ctx);
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RV_REG_TP, ctx);
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break;
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break;
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}
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}
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@ -119,7 +119,7 @@ int cpc_read_ffh(int cpu, struct cpc_reg *reg, u64 *val)
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*val = data.ret.value;
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*val = data.ret.value;
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return (data.ret.error) ? sbi_err_map_linux_errno(data.ret.error) : 0;
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return data.ret.error;
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}
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}
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return -EINVAL;
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return -EINVAL;
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@ -148,7 +148,7 @@ int cpc_write_ffh(int cpu, struct cpc_reg *reg, u64 val)
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smp_call_function_single(cpu, cppc_ffh_csr_write, &data, 1);
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smp_call_function_single(cpu, cppc_ffh_csr_write, &data, 1);
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return (data.ret.error) ? sbi_err_map_linux_errno(data.ret.error) : 0;
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return data.ret.error;
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}
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}
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return -EINVAL;
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return -EINVAL;
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