2023-05-04 21:33:16 -07:00
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2023 Meta Platforms, Inc. and affiliates. */
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#include <errno.h>
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#include <string.h>
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#include <linux/bpf.h>
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#include <bpf/bpf_helpers.h>
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#include "bpf_misc.h"
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2024-04-04 14:45:36 -07:00
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#include <../../../tools/include/linux/filter.h>
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2023-05-04 21:33:16 -07:00
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#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
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int vals[] SEC(".data.vals") = {1, 2, 3, 4};
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__naked __noinline __used
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static unsigned long identity_subprog()
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{
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/* the simplest *static* 64-bit identity function */
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asm volatile (
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"r0 = r1;"
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"exit;"
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);
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}
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__noinline __used
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unsigned long global_identity_subprog(__u64 x)
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{
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/* the simplest *global* 64-bit identity function */
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return x;
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}
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__naked __noinline __used
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static unsigned long callback_subprog()
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{
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/* the simplest callback function */
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asm volatile (
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"r0 = 0;"
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"exit;"
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);
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}
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SEC("?raw_tp")
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__success __log_level(2)
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__msg("7: (0f) r1 += r0")
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__msg("mark_precise: frame0: regs=r0 stack= before 6: (bf) r1 = r7")
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__msg("mark_precise: frame0: regs=r0 stack= before 5: (27) r0 *= 4")
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__msg("mark_precise: frame0: regs=r0 stack= before 11: (95) exit")
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__msg("mark_precise: frame1: regs=r0 stack= before 10: (bf) r0 = r1")
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__msg("mark_precise: frame1: regs=r1 stack= before 4: (85) call pc+5")
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__msg("mark_precise: frame0: regs=r1 stack= before 3: (bf) r1 = r6")
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__msg("mark_precise: frame0: regs=r6 stack= before 2: (b7) r6 = 3")
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__naked int subprog_result_precise(void)
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{
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asm volatile (
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"r6 = 3;"
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/* pass r6 through r1 into subprog to get it back as r0;
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* this whole chain will have to be marked as precise later
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*/
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"r1 = r6;"
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"call identity_subprog;"
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/* now use subprog's returned value (which is a
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* r6 -> r1 -> r0 chain), as index into vals array, forcing
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* all of that to be known precisely
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*/
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"r0 *= 4;"
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"r1 = %[vals];"
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/* here r0->r1->r6 chain is forced to be precise and has to be
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* propagated back to the beginning, including through the
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* subprog call
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*/
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"r1 += r0;"
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"r0 = *(u32 *)(r1 + 0);"
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"exit;"
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:
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: __imm_ptr(vals)
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: __clobber_common, "r6"
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);
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}
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2024-04-04 14:45:36 -07:00
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__naked __noinline __used
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static unsigned long fp_leaking_subprog()
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{
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asm volatile (
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".8byte %[r0_eq_r10_cast_s8];"
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"exit;"
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:: __imm_insn(r0_eq_r10_cast_s8, BPF_MOVSX64_REG(BPF_REG_0, BPF_REG_10, 8))
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);
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}
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__naked __noinline __used
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static unsigned long sneaky_fp_leaking_subprog()
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{
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asm volatile (
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"r1 = r10;"
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".8byte %[r0_eq_r1_cast_s8];"
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"exit;"
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:: __imm_insn(r0_eq_r1_cast_s8, BPF_MOVSX64_REG(BPF_REG_0, BPF_REG_1, 8))
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);
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}
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SEC("?raw_tp")
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__success __log_level(2)
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__msg("6: (0f) r1 += r0")
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__msg("mark_precise: frame0: last_idx 6 first_idx 0 subseq_idx -1")
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__msg("mark_precise: frame0: regs=r0 stack= before 5: (bf) r1 = r6")
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__msg("mark_precise: frame0: regs=r0 stack= before 4: (27) r0 *= 4")
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__msg("mark_precise: frame0: regs=r0 stack= before 3: (57) r0 &= 3")
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__msg("mark_precise: frame0: regs=r0 stack= before 10: (95) exit")
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__msg("mark_precise: frame1: regs=r0 stack= before 9: (bf) r0 = (s8)r10")
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__msg("7: R0_w=scalar")
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__naked int fp_precise_subprog_result(void)
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{
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asm volatile (
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"call fp_leaking_subprog;"
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/* use subprog's returned value (which is derived from r10=fp
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* register), as index into vals array, forcing all of that to
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* be known precisely
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*/
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"r0 &= 3;"
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"r0 *= 4;"
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"r1 = %[vals];"
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/* force precision marking */
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"r1 += r0;"
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"r0 = *(u32 *)(r1 + 0);"
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"exit;"
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:
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: __imm_ptr(vals)
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: __clobber_common
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);
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}
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SEC("?raw_tp")
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__success __log_level(2)
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__msg("6: (0f) r1 += r0")
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__msg("mark_precise: frame0: last_idx 6 first_idx 0 subseq_idx -1")
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__msg("mark_precise: frame0: regs=r0 stack= before 5: (bf) r1 = r6")
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__msg("mark_precise: frame0: regs=r0 stack= before 4: (27) r0 *= 4")
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__msg("mark_precise: frame0: regs=r0 stack= before 3: (57) r0 &= 3")
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__msg("mark_precise: frame0: regs=r0 stack= before 11: (95) exit")
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__msg("mark_precise: frame1: regs=r0 stack= before 10: (bf) r0 = (s8)r1")
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/* here r1 is marked precise, even though it's fp register, but that's fine
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* because by the time we get out of subprogram it has to be derived from r10
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* anyways, at which point we'll break precision chain
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*/
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__msg("mark_precise: frame1: regs=r1 stack= before 9: (bf) r1 = r10")
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__msg("7: R0_w=scalar")
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__naked int sneaky_fp_precise_subprog_result(void)
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{
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asm volatile (
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"call sneaky_fp_leaking_subprog;"
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/* use subprog's returned value (which is derived from r10=fp
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* register), as index into vals array, forcing all of that to
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* be known precisely
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*/
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"r0 &= 3;"
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"r0 *= 4;"
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"r1 = %[vals];"
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/* force precision marking */
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"r1 += r0;"
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"r0 = *(u32 *)(r1 + 0);"
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"exit;"
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:
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: __imm_ptr(vals)
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: __clobber_common
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);
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}
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2023-05-04 21:33:16 -07:00
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SEC("?raw_tp")
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__success __log_level(2)
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__msg("9: (0f) r1 += r0")
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__msg("mark_precise: frame0: last_idx 9 first_idx 0")
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__msg("mark_precise: frame0: regs=r0 stack= before 8: (bf) r1 = r7")
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__msg("mark_precise: frame0: regs=r0 stack= before 7: (27) r0 *= 4")
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__msg("mark_precise: frame0: regs=r0 stack= before 5: (a5) if r0 < 0x4 goto pc+1")
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__msg("mark_precise: frame0: regs=r0 stack= before 4: (85) call pc+7")
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__naked int global_subprog_result_precise(void)
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{
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asm volatile (
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"r6 = 3;"
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/* pass r6 through r1 into subprog to get it back as r0;
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* given global_identity_subprog is global, precision won't
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* propagate all the way back to r6
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*/
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"r1 = r6;"
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"call global_identity_subprog;"
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/* now use subprog's returned value (which is unknown now, so
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* we need to clamp it), as index into vals array, forcing r0
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* to be marked precise (with no effect on r6, though)
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*/
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"if r0 < %[vals_arr_sz] goto 1f;"
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"r0 = %[vals_arr_sz] - 1;"
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"1:"
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"r0 *= 4;"
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"r1 = %[vals];"
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/* here r0 is forced to be precise and has to be
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* propagated back to the global subprog call, but it
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* shouldn't go all the way to mark r6 as precise
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*/
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"r1 += r0;"
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"r0 = *(u32 *)(r1 + 0);"
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"exit;"
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:
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: __imm_ptr(vals),
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__imm_const(vals_arr_sz, ARRAY_SIZE(vals))
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: __clobber_common, "r6"
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);
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}
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2023-12-02 09:56:59 -08:00
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__naked __noinline __used
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static unsigned long loop_callback_bad()
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{
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/* bpf_loop() callback that can return values outside of [0, 1] range */
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asm volatile (
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"call %[bpf_get_prandom_u32];"
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"if r0 s> 1000 goto 1f;"
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"r0 = 0;"
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"1:"
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"goto +0;" /* checkpoint */
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/* bpf_loop() expects [0, 1] values, so branch above skipping
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* r0 = 0; should lead to a failure, but if exit instruction
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* doesn't enforce r0's precision, this callback will be
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* successfully verified
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*/
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"exit;"
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:
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: __imm(bpf_get_prandom_u32)
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: __clobber_common
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);
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}
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SEC("?raw_tp")
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__failure __log_level(2)
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__flag(BPF_F_TEST_STATE_FREQ)
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/* check that fallthrough code path marks r0 as precise */
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__msg("mark_precise: frame1: regs=r0 stack= before 11: (b7) r0 = 0")
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/* check that we have branch code path doing its own validation */
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__msg("from 10 to 12: frame1: R0=scalar(smin=umin=1001")
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/* check that branch code path marks r0 as precise, before failing */
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__msg("mark_precise: frame1: regs=r0 stack= before 9: (85) call bpf_get_prandom_u32#7")
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2023-12-02 09:57:00 -08:00
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__msg("At callback return the register R0 has smin=1001 should have been in [0, 1]")
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2023-12-02 09:56:59 -08:00
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__naked int callback_precise_return_fail(void)
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{
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asm volatile (
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"r1 = 1;" /* nr_loops */
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"r2 = %[loop_callback_bad];" /* callback_fn */
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"r3 = 0;" /* callback_ctx */
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"r4 = 0;" /* flags */
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"call %[bpf_loop];"
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"r0 = 0;"
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"exit;"
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:
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: __imm_ptr(loop_callback_bad),
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__imm(bpf_loop)
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: __clobber_common
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);
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}
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2023-05-04 21:33:16 -07:00
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SEC("?raw_tp")
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__success __log_level(2)
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2023-11-21 04:07:00 +02:00
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/* First simulated path does not include callback body,
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* r1 and r4 are always precise for bpf_loop() calls.
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*/
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__msg("9: (85) call bpf_loop#181")
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__msg("mark_precise: frame0: last_idx 9 first_idx 9 subseq_idx -1")
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__msg("mark_precise: frame0: parent state regs=r4 stack=:")
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__msg("mark_precise: frame0: last_idx 8 first_idx 0 subseq_idx 9")
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__msg("mark_precise: frame0: regs=r4 stack= before 8: (b7) r4 = 0")
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__msg("mark_precise: frame0: last_idx 9 first_idx 9 subseq_idx -1")
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__msg("mark_precise: frame0: parent state regs=r1 stack=:")
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__msg("mark_precise: frame0: last_idx 8 first_idx 0 subseq_idx 9")
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__msg("mark_precise: frame0: regs=r1 stack= before 8: (b7) r4 = 0")
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__msg("mark_precise: frame0: regs=r1 stack= before 7: (b7) r3 = 0")
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__msg("mark_precise: frame0: regs=r1 stack= before 6: (bf) r2 = r8")
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__msg("mark_precise: frame0: regs=r1 stack= before 5: (bf) r1 = r6")
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__msg("mark_precise: frame0: regs=r6 stack= before 4: (b7) r6 = 3")
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/* r6 precision propagation */
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2023-05-04 21:33:16 -07:00
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__msg("14: (0f) r1 += r6")
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2023-11-21 04:06:56 +02:00
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__msg("mark_precise: frame0: last_idx 14 first_idx 9")
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2023-05-04 21:33:16 -07:00
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__msg("mark_precise: frame0: regs=r6 stack= before 13: (bf) r1 = r7")
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__msg("mark_precise: frame0: regs=r6 stack= before 12: (27) r6 *= 4")
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__msg("mark_precise: frame0: regs=r6 stack= before 11: (25) if r6 > 0x3 goto pc+4")
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__msg("mark_precise: frame0: regs=r6 stack= before 10: (bf) r6 = r0")
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2023-11-21 04:06:56 +02:00
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__msg("mark_precise: frame0: regs=r0 stack= before 9: (85) call bpf_loop")
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/* State entering callback body popped from states stack */
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__msg("from 9 to 17: frame1:")
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__msg("17: frame1: R1=scalar() R2=0 R10=fp0 cb")
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__msg("17: (b7) r0 = 0")
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__msg("18: (95) exit")
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__msg("returning from callee:")
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__msg("to caller at 9:")
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2023-11-21 04:07:00 +02:00
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__msg("frame 0: propagating r1,r4")
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2023-11-21 04:06:56 +02:00
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__msg("mark_precise: frame0: last_idx 9 first_idx 9 subseq_idx -1")
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2023-11-21 04:07:00 +02:00
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__msg("mark_precise: frame0: regs=r1,r4 stack= before 18: (95) exit")
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2023-11-21 04:06:56 +02:00
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__msg("from 18 to 9: safe")
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2023-05-04 21:33:16 -07:00
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__naked int callback_result_precise(void)
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{
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asm volatile (
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"r6 = 3;"
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/* call subprog and use result; r0 shouldn't propagate back to
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* callback_subprog
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*/
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"r1 = r6;" /* nr_loops */
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"r2 = %[callback_subprog];" /* callback_fn */
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"r3 = 0;" /* callback_ctx */
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"r4 = 0;" /* flags */
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"call %[bpf_loop];"
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"r6 = r0;"
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"if r6 > 3 goto 1f;"
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"r6 *= 4;"
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"r1 = %[vals];"
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/* here r6 is forced to be precise and has to be propagated
|
|
|
|
* back to the bpf_loop() call, but not beyond
|
|
|
|
*/
|
|
|
|
"r1 += r6;"
|
|
|
|
"r0 = *(u32 *)(r1 + 0);"
|
|
|
|
"1:"
|
|
|
|
"exit;"
|
|
|
|
:
|
|
|
|
: __imm_ptr(vals),
|
|
|
|
__imm_ptr(callback_subprog),
|
|
|
|
__imm(bpf_loop)
|
|
|
|
: __clobber_common, "r6"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
|
|
|
|
SEC("?raw_tp")
|
|
|
|
__success __log_level(2)
|
|
|
|
__msg("7: (0f) r1 += r6")
|
|
|
|
__msg("mark_precise: frame0: last_idx 7 first_idx 0")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 6: (bf) r1 = r7")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 5: (27) r6 *= 4")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 11: (95) exit")
|
|
|
|
__msg("mark_precise: frame1: regs= stack= before 10: (bf) r0 = r1")
|
|
|
|
__msg("mark_precise: frame1: regs= stack= before 4: (85) call pc+5")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 3: (b7) r1 = 0")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 2: (b7) r6 = 3")
|
|
|
|
__naked int parent_callee_saved_reg_precise(void)
|
|
|
|
{
|
|
|
|
asm volatile (
|
|
|
|
"r6 = 3;"
|
|
|
|
|
|
|
|
/* call subprog and ignore result; we need this call only to
|
|
|
|
* complicate jump history
|
|
|
|
*/
|
|
|
|
"r1 = 0;"
|
|
|
|
"call identity_subprog;"
|
|
|
|
|
|
|
|
"r6 *= 4;"
|
|
|
|
"r1 = %[vals];"
|
|
|
|
/* here r6 is forced to be precise and has to be propagated
|
|
|
|
* back to the beginning, handling (and ignoring) subprog call
|
|
|
|
*/
|
|
|
|
"r1 += r6;"
|
|
|
|
"r0 = *(u32 *)(r1 + 0);"
|
|
|
|
"exit;"
|
|
|
|
:
|
|
|
|
: __imm_ptr(vals)
|
|
|
|
: __clobber_common, "r6"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
|
|
|
|
SEC("?raw_tp")
|
|
|
|
__success __log_level(2)
|
|
|
|
__msg("7: (0f) r1 += r6")
|
|
|
|
__msg("mark_precise: frame0: last_idx 7 first_idx 0")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 6: (bf) r1 = r7")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 5: (27) r6 *= 4")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 4: (85) call pc+5")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 3: (b7) r1 = 0")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 2: (b7) r6 = 3")
|
|
|
|
__naked int parent_callee_saved_reg_precise_global(void)
|
|
|
|
{
|
|
|
|
asm volatile (
|
|
|
|
"r6 = 3;"
|
|
|
|
|
|
|
|
/* call subprog and ignore result; we need this call only to
|
|
|
|
* complicate jump history
|
|
|
|
*/
|
|
|
|
"r1 = 0;"
|
|
|
|
"call global_identity_subprog;"
|
|
|
|
|
|
|
|
"r6 *= 4;"
|
|
|
|
"r1 = %[vals];"
|
|
|
|
/* here r6 is forced to be precise and has to be propagated
|
|
|
|
* back to the beginning, handling (and ignoring) subprog call
|
|
|
|
*/
|
|
|
|
"r1 += r6;"
|
|
|
|
"r0 = *(u32 *)(r1 + 0);"
|
|
|
|
"exit;"
|
|
|
|
:
|
|
|
|
: __imm_ptr(vals)
|
|
|
|
: __clobber_common, "r6"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
|
|
|
|
SEC("?raw_tp")
|
|
|
|
__success __log_level(2)
|
2023-11-21 04:06:56 +02:00
|
|
|
/* First simulated path does not include callback body */
|
2023-05-04 21:33:16 -07:00
|
|
|
__msg("12: (0f) r1 += r6")
|
2023-11-21 04:06:56 +02:00
|
|
|
__msg("mark_precise: frame0: last_idx 12 first_idx 9")
|
2023-05-04 21:33:16 -07:00
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 11: (bf) r1 = r7")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 10: (27) r6 *= 4")
|
2023-11-21 04:06:56 +02:00
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 9: (85) call bpf_loop")
|
2023-05-04 21:33:16 -07:00
|
|
|
__msg("mark_precise: frame0: parent state regs=r6 stack=:")
|
2023-11-21 04:06:56 +02:00
|
|
|
__msg("mark_precise: frame0: last_idx 8 first_idx 0 subseq_idx 9")
|
2023-05-04 21:33:16 -07:00
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 8: (b7) r4 = 0")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 7: (b7) r3 = 0")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 6: (bf) r2 = r8")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 5: (b7) r1 = 1")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 4: (b7) r6 = 3")
|
2023-11-21 04:06:56 +02:00
|
|
|
/* State entering callback body popped from states stack */
|
|
|
|
__msg("from 9 to 15: frame1:")
|
|
|
|
__msg("15: frame1: R1=scalar() R2=0 R10=fp0 cb")
|
|
|
|
__msg("15: (b7) r0 = 0")
|
|
|
|
__msg("16: (95) exit")
|
|
|
|
__msg("returning from callee:")
|
|
|
|
__msg("to caller at 9:")
|
2023-11-21 04:07:00 +02:00
|
|
|
/* r1, r4 are always precise for bpf_loop(),
|
2023-11-21 04:06:56 +02:00
|
|
|
* r6 was marked before backtracking to callback body.
|
|
|
|
*/
|
2023-11-21 04:07:00 +02:00
|
|
|
__msg("frame 0: propagating r1,r4,r6")
|
2023-11-21 04:06:56 +02:00
|
|
|
__msg("mark_precise: frame0: last_idx 9 first_idx 9 subseq_idx -1")
|
2023-11-21 04:07:00 +02:00
|
|
|
__msg("mark_precise: frame0: regs=r1,r4,r6 stack= before 16: (95) exit")
|
2023-11-21 04:06:56 +02:00
|
|
|
__msg("mark_precise: frame1: regs= stack= before 15: (b7) r0 = 0")
|
|
|
|
__msg("mark_precise: frame1: regs= stack= before 9: (85) call bpf_loop")
|
|
|
|
__msg("mark_precise: frame0: parent state regs= stack=:")
|
|
|
|
__msg("from 16 to 9: safe")
|
2023-05-04 21:33:16 -07:00
|
|
|
__naked int parent_callee_saved_reg_precise_with_callback(void)
|
|
|
|
{
|
|
|
|
asm volatile (
|
|
|
|
"r6 = 3;"
|
|
|
|
|
|
|
|
/* call subprog and ignore result; we need this call only to
|
|
|
|
* complicate jump history
|
|
|
|
*/
|
|
|
|
"r1 = 1;" /* nr_loops */
|
|
|
|
"r2 = %[callback_subprog];" /* callback_fn */
|
|
|
|
"r3 = 0;" /* callback_ctx */
|
|
|
|
"r4 = 0;" /* flags */
|
|
|
|
"call %[bpf_loop];"
|
|
|
|
|
|
|
|
"r6 *= 4;"
|
|
|
|
"r1 = %[vals];"
|
|
|
|
/* here r6 is forced to be precise and has to be propagated
|
|
|
|
* back to the beginning, handling (and ignoring) callback call
|
|
|
|
*/
|
|
|
|
"r1 += r6;"
|
|
|
|
"r0 = *(u32 *)(r1 + 0);"
|
|
|
|
"exit;"
|
|
|
|
:
|
|
|
|
: __imm_ptr(vals),
|
|
|
|
__imm_ptr(callback_subprog),
|
|
|
|
__imm(bpf_loop)
|
|
|
|
: __clobber_common, "r6"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
|
|
|
|
SEC("?raw_tp")
|
|
|
|
__success __log_level(2)
|
|
|
|
__msg("9: (0f) r1 += r6")
|
|
|
|
__msg("mark_precise: frame0: last_idx 9 first_idx 6")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 8: (bf) r1 = r7")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 7: (27) r6 *= 4")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 6: (79) r6 = *(u64 *)(r10 -8)")
|
|
|
|
__msg("mark_precise: frame0: parent state regs= stack=-8:")
|
|
|
|
__msg("mark_precise: frame0: last_idx 13 first_idx 0")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 13: (95) exit")
|
|
|
|
__msg("mark_precise: frame1: regs= stack= before 12: (bf) r0 = r1")
|
|
|
|
__msg("mark_precise: frame1: regs= stack= before 5: (85) call pc+6")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 4: (b7) r1 = 0")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 3: (7b) *(u64 *)(r10 -8) = r6")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 2: (b7) r6 = 3")
|
|
|
|
__naked int parent_stack_slot_precise(void)
|
|
|
|
{
|
|
|
|
asm volatile (
|
|
|
|
/* spill reg */
|
|
|
|
"r6 = 3;"
|
|
|
|
"*(u64 *)(r10 - 8) = r6;"
|
|
|
|
|
|
|
|
/* call subprog and ignore result; we need this call only to
|
|
|
|
* complicate jump history
|
|
|
|
*/
|
|
|
|
"r1 = 0;"
|
|
|
|
"call identity_subprog;"
|
|
|
|
|
|
|
|
/* restore reg from stack; in this case we'll be carrying
|
|
|
|
* stack mask when going back into subprog through jump
|
|
|
|
* history
|
|
|
|
*/
|
|
|
|
"r6 = *(u64 *)(r10 - 8);"
|
|
|
|
|
|
|
|
"r6 *= 4;"
|
|
|
|
"r1 = %[vals];"
|
|
|
|
/* here r6 is forced to be precise and has to be propagated
|
|
|
|
* back to the beginning, handling (and ignoring) subprog call
|
|
|
|
*/
|
|
|
|
"r1 += r6;"
|
|
|
|
"r0 = *(u32 *)(r1 + 0);"
|
|
|
|
"exit;"
|
|
|
|
:
|
|
|
|
: __imm_ptr(vals)
|
|
|
|
: __clobber_common, "r6"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
|
|
|
|
SEC("?raw_tp")
|
|
|
|
__success __log_level(2)
|
|
|
|
__msg("9: (0f) r1 += r6")
|
bpf: Validate global subprogs lazily
Slightly change BPF verifier logic around eagerness and order of global
subprog validation. Instead of going over every global subprog eagerly
and validating it before main (entry) BPF program is verified, turn it
around. Validate main program first, mark subprogs that were called from
main program for later verification, but otherwise assume it is valid.
Afterwards, go over marked global subprogs and validate those,
potentially marking some more global functions as being called. Continue
this process until all (transitively) callable global subprogs are
validated. It's a BFS traversal at its heart and will always converge.
This is an important change because it allows to feature-gate some
subprograms that might not be verifiable on some older kernel, depending
on supported set of features.
E.g., at some point, global functions were allowed to accept a pointer
to memory, which size is identified by user-provided type.
Unfortunately, older kernels don't support this feature. With BPF CO-RE
approach, the natural way would be to still compile BPF object file once
and guard calls to this global subprog with some CO-RE check or using
.rodata variables. That's what people do to guard usage of new helpers
or kfuncs, and any other new BPF-side feature that might be missing on
old kernels.
That's currently impossible to do with global subprogs, unfortunately,
because they are eagerly and unconditionally validated. This patch set
aims to change this, so that in the future when global funcs gain new
features, those can be guarded using BPF CO-RE techniques in the same
fashion as any other new kernel feature.
Two selftests had to be adjusted in sync with these changes.
test_global_func12 relied on eager global subprog validation failing
before main program failure is detected (unknown return value). Fix by
making sure that main program is always valid.
verifier_subprog_precision's parent_stack_slot_precise subtest relied on
verifier checkpointing heuristic to do a checkpoint at instruction #5,
but that's no longer true because we don't have enough jumps validated
before reaching insn #5 due to global subprogs being validated later.
Other than that, no changes, as one would expect.
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Acked-by: Eduard Zingerman <eddyz87@gmail.com>
Acked-by: Daniel Borkmann <daniel@iogearbox.net>
Link: https://lore.kernel.org/bpf/20231124035937.403208-3-andrii@kernel.org
2023-11-23 19:59:36 -08:00
|
|
|
__msg("mark_precise: frame0: last_idx 9 first_idx 0")
|
2023-05-04 21:33:16 -07:00
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 8: (bf) r1 = r7")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 7: (27) r6 *= 4")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 6: (79) r6 = *(u64 *)(r10 -8)")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 5: (85) call pc+6")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 4: (b7) r1 = 0")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 3: (7b) *(u64 *)(r10 -8) = r6")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 2: (b7) r6 = 3")
|
|
|
|
__naked int parent_stack_slot_precise_global(void)
|
|
|
|
{
|
|
|
|
asm volatile (
|
|
|
|
/* spill reg */
|
|
|
|
"r6 = 3;"
|
|
|
|
"*(u64 *)(r10 - 8) = r6;"
|
|
|
|
|
|
|
|
/* call subprog and ignore result; we need this call only to
|
|
|
|
* complicate jump history
|
|
|
|
*/
|
|
|
|
"r1 = 0;"
|
|
|
|
"call global_identity_subprog;"
|
|
|
|
|
|
|
|
/* restore reg from stack; in this case we'll be carrying
|
|
|
|
* stack mask when going back into subprog through jump
|
|
|
|
* history
|
|
|
|
*/
|
|
|
|
"r6 = *(u64 *)(r10 - 8);"
|
|
|
|
|
|
|
|
"r6 *= 4;"
|
|
|
|
"r1 = %[vals];"
|
|
|
|
/* here r6 is forced to be precise and has to be propagated
|
|
|
|
* back to the beginning, handling (and ignoring) subprog call
|
|
|
|
*/
|
|
|
|
"r1 += r6;"
|
|
|
|
"r0 = *(u32 *)(r1 + 0);"
|
|
|
|
"exit;"
|
|
|
|
:
|
|
|
|
: __imm_ptr(vals)
|
|
|
|
: __clobber_common, "r6"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
|
|
|
|
SEC("?raw_tp")
|
|
|
|
__success __log_level(2)
|
2023-11-21 04:06:56 +02:00
|
|
|
/* First simulated path does not include callback body */
|
2023-05-04 21:33:16 -07:00
|
|
|
__msg("14: (0f) r1 += r6")
|
2023-11-21 04:06:56 +02:00
|
|
|
__msg("mark_precise: frame0: last_idx 14 first_idx 10")
|
2023-05-04 21:33:16 -07:00
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 13: (bf) r1 = r7")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 12: (27) r6 *= 4")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 11: (79) r6 = *(u64 *)(r10 -8)")
|
2023-11-21 04:06:56 +02:00
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 10: (85) call bpf_loop")
|
2023-05-04 21:33:16 -07:00
|
|
|
__msg("mark_precise: frame0: parent state regs= stack=-8:")
|
2023-11-21 04:06:56 +02:00
|
|
|
__msg("mark_precise: frame0: last_idx 9 first_idx 0 subseq_idx 10")
|
2023-05-04 21:33:16 -07:00
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 9: (b7) r4 = 0")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 8: (b7) r3 = 0")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 7: (bf) r2 = r8")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 6: (bf) r1 = r6")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 5: (7b) *(u64 *)(r10 -8) = r6")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 4: (b7) r6 = 3")
|
2023-11-21 04:06:56 +02:00
|
|
|
/* State entering callback body popped from states stack */
|
|
|
|
__msg("from 10 to 17: frame1:")
|
|
|
|
__msg("17: frame1: R1=scalar() R2=0 R10=fp0 cb")
|
|
|
|
__msg("17: (b7) r0 = 0")
|
|
|
|
__msg("18: (95) exit")
|
|
|
|
__msg("returning from callee:")
|
|
|
|
__msg("to caller at 10:")
|
2023-11-21 04:07:00 +02:00
|
|
|
/* r1, r4 are always precise for bpf_loop(),
|
2023-11-21 04:06:56 +02:00
|
|
|
* fp-8 was marked before backtracking to callback body.
|
|
|
|
*/
|
2023-11-21 04:07:00 +02:00
|
|
|
__msg("frame 0: propagating r1,r4,fp-8")
|
2023-11-21 04:06:56 +02:00
|
|
|
__msg("mark_precise: frame0: last_idx 10 first_idx 10 subseq_idx -1")
|
2023-11-21 04:07:00 +02:00
|
|
|
__msg("mark_precise: frame0: regs=r1,r4 stack=-8 before 18: (95) exit")
|
2023-11-21 04:06:56 +02:00
|
|
|
__msg("mark_precise: frame1: regs= stack= before 17: (b7) r0 = 0")
|
|
|
|
__msg("mark_precise: frame1: regs= stack= before 10: (85) call bpf_loop#181")
|
|
|
|
__msg("mark_precise: frame0: parent state regs= stack=:")
|
|
|
|
__msg("from 18 to 10: safe")
|
2023-05-04 21:33:16 -07:00
|
|
|
__naked int parent_stack_slot_precise_with_callback(void)
|
|
|
|
{
|
|
|
|
asm volatile (
|
|
|
|
/* spill reg */
|
|
|
|
"r6 = 3;"
|
|
|
|
"*(u64 *)(r10 - 8) = r6;"
|
|
|
|
|
|
|
|
/* ensure we have callback frame in jump history */
|
|
|
|
"r1 = r6;" /* nr_loops */
|
|
|
|
"r2 = %[callback_subprog];" /* callback_fn */
|
|
|
|
"r3 = 0;" /* callback_ctx */
|
|
|
|
"r4 = 0;" /* flags */
|
|
|
|
"call %[bpf_loop];"
|
|
|
|
|
|
|
|
/* restore reg from stack; in this case we'll be carrying
|
|
|
|
* stack mask when going back into subprog through jump
|
|
|
|
* history
|
|
|
|
*/
|
|
|
|
"r6 = *(u64 *)(r10 - 8);"
|
|
|
|
|
|
|
|
"r6 *= 4;"
|
|
|
|
"r1 = %[vals];"
|
|
|
|
/* here r6 is forced to be precise and has to be propagated
|
|
|
|
* back to the beginning, handling (and ignoring) subprog call
|
|
|
|
*/
|
|
|
|
"r1 += r6;"
|
|
|
|
"r0 = *(u32 *)(r1 + 0);"
|
|
|
|
"exit;"
|
|
|
|
:
|
|
|
|
: __imm_ptr(vals),
|
|
|
|
__imm_ptr(callback_subprog),
|
|
|
|
__imm(bpf_loop)
|
|
|
|
: __clobber_common, "r6"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
|
|
|
|
__noinline __used
|
|
|
|
static __u64 subprog_with_precise_arg(__u64 x)
|
|
|
|
{
|
|
|
|
return vals[x]; /* x is forced to be precise */
|
|
|
|
}
|
|
|
|
|
|
|
|
SEC("?raw_tp")
|
|
|
|
__success __log_level(2)
|
|
|
|
__msg("8: (0f) r2 += r1")
|
|
|
|
__msg("mark_precise: frame1: last_idx 8 first_idx 0")
|
|
|
|
__msg("mark_precise: frame1: regs=r1 stack= before 6: (18) r2 = ")
|
|
|
|
__msg("mark_precise: frame1: regs=r1 stack= before 5: (67) r1 <<= 2")
|
|
|
|
__msg("mark_precise: frame1: regs=r1 stack= before 2: (85) call pc+2")
|
|
|
|
__msg("mark_precise: frame0: regs=r1 stack= before 1: (bf) r1 = r6")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 0: (b7) r6 = 3")
|
|
|
|
__naked int subprog_arg_precise(void)
|
|
|
|
{
|
|
|
|
asm volatile (
|
|
|
|
"r6 = 3;"
|
|
|
|
"r1 = r6;"
|
|
|
|
/* subprog_with_precise_arg expects its argument to be
|
|
|
|
* precise, so r1->r6 will be marked precise from inside the
|
|
|
|
* subprog
|
|
|
|
*/
|
|
|
|
"call subprog_with_precise_arg;"
|
|
|
|
"r0 += r6;"
|
|
|
|
"exit;"
|
|
|
|
:
|
|
|
|
:
|
|
|
|
: __clobber_common, "r6"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* r1 is pointer to stack slot;
|
|
|
|
* r2 is a register to spill into that slot
|
|
|
|
* subprog also spills r2 into its own stack slot
|
|
|
|
*/
|
|
|
|
__naked __noinline __used
|
|
|
|
static __u64 subprog_spill_reg_precise(void)
|
|
|
|
{
|
|
|
|
asm volatile (
|
|
|
|
/* spill to parent stack */
|
|
|
|
"*(u64 *)(r1 + 0) = r2;"
|
|
|
|
/* spill to subprog stack (we use -16 offset to avoid
|
|
|
|
* accidental confusion with parent's -8 stack slot in
|
|
|
|
* verifier log output)
|
|
|
|
*/
|
|
|
|
"*(u64 *)(r10 - 16) = r2;"
|
|
|
|
/* use both spills as return result to propagete precision everywhere */
|
|
|
|
"r0 = *(u64 *)(r10 - 16);"
|
|
|
|
"r2 = *(u64 *)(r1 + 0);"
|
|
|
|
"r0 += r2;"
|
|
|
|
"exit;"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
|
|
|
|
SEC("?raw_tp")
|
|
|
|
__success __log_level(2)
|
bpf: support non-r10 register spill/fill to/from stack in precision tracking
Use instruction (jump) history to record instructions that performed
register spill/fill to/from stack, regardless if this was done through
read-only r10 register, or any other register after copying r10 into it
*and* potentially adjusting offset.
To make this work reliably, we push extra per-instruction flags into
instruction history, encoding stack slot index (spi) and stack frame
number in extra 10 bit flags we take away from prev_idx in instruction
history. We don't touch idx field for maximum performance, as it's
checked most frequently during backtracking.
This change removes basically the last remaining practical limitation of
precision backtracking logic in BPF verifier. It fixes known
deficiencies, but also opens up new opportunities to reduce number of
verified states, explored in the subsequent patches.
There are only three differences in selftests' BPF object files
according to veristat, all in the positive direction (less states).
File Program Insns (A) Insns (B) Insns (DIFF) States (A) States (B) States (DIFF)
-------------------------------------- ------------- --------- --------- ------------- ---------- ---------- -------------
test_cls_redirect_dynptr.bpf.linked3.o cls_redirect 2987 2864 -123 (-4.12%) 240 231 -9 (-3.75%)
xdp_synproxy_kern.bpf.linked3.o syncookie_tc 82848 82661 -187 (-0.23%) 5107 5073 -34 (-0.67%)
xdp_synproxy_kern.bpf.linked3.o syncookie_xdp 85116 84964 -152 (-0.18%) 5162 5130 -32 (-0.62%)
Note, I avoided renaming jmp_history to more generic insn_hist to
minimize number of lines changed and potential merge conflicts between
bpf and bpf-next trees.
Notice also cur_hist_entry pointer reset to NULL at the beginning of
instruction verification loop. This pointer avoids the problem of
relying on last jump history entry's insn_idx to determine whether we
already have entry for current instruction or not. It can happen that we
added jump history entry because current instruction is_jmp_point(), but
also we need to add instruction flags for stack access. In this case, we
don't want to entries, so we need to reuse last added entry, if it is
present.
Relying on insn_idx comparison has the same ambiguity problem as the one
that was fixed recently in [0], so we avoid that.
[0] https://patchwork.kernel.org/project/netdevbpf/patch/20231110002638.4168352-3-andrii@kernel.org/
Acked-by: Eduard Zingerman <eddyz87@gmail.com>
Reported-by: Tao Lyu <tao.lyu@epfl.ch>
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Link: https://lore.kernel.org/r/20231205184248.1502704-2-andrii@kernel.org
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2023-12-05 10:42:39 -08:00
|
|
|
__msg("10: (0f) r1 += r7")
|
|
|
|
__msg("mark_precise: frame0: last_idx 10 first_idx 7 subseq_idx -1")
|
|
|
|
__msg("mark_precise: frame0: regs=r7 stack= before 9: (bf) r1 = r8")
|
|
|
|
__msg("mark_precise: frame0: regs=r7 stack= before 8: (27) r7 *= 4")
|
|
|
|
__msg("mark_precise: frame0: regs=r7 stack= before 7: (79) r7 = *(u64 *)(r10 -8)")
|
|
|
|
__msg("mark_precise: frame0: parent state regs= stack=-8: R0_w=2 R6_w=1 R8_rw=map_value(map=.data.vals,ks=4,vs=16) R10=fp0 fp-8_rw=P1")
|
|
|
|
__msg("mark_precise: frame0: last_idx 18 first_idx 0 subseq_idx 7")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-8 before 18: (95) exit")
|
|
|
|
__msg("mark_precise: frame1: regs= stack= before 17: (0f) r0 += r2")
|
|
|
|
__msg("mark_precise: frame1: regs= stack= before 16: (79) r2 = *(u64 *)(r1 +0)")
|
|
|
|
__msg("mark_precise: frame1: regs= stack= before 15: (79) r0 = *(u64 *)(r10 -16)")
|
|
|
|
__msg("mark_precise: frame1: regs= stack= before 14: (7b) *(u64 *)(r10 -16) = r2")
|
|
|
|
__msg("mark_precise: frame1: regs= stack= before 13: (7b) *(u64 *)(r1 +0) = r2")
|
|
|
|
__msg("mark_precise: frame1: regs=r2 stack= before 6: (85) call pc+6")
|
|
|
|
__msg("mark_precise: frame0: regs=r2 stack= before 5: (bf) r2 = r6")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 4: (07) r1 += -8")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 3: (bf) r1 = r10")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 2: (b7) r6 = 1")
|
2023-05-04 21:33:16 -07:00
|
|
|
__naked int subprog_spill_into_parent_stack_slot_precise(void)
|
|
|
|
{
|
|
|
|
asm volatile (
|
|
|
|
"r6 = 1;"
|
|
|
|
|
|
|
|
/* pass pointer to stack slot and r6 to subprog;
|
|
|
|
* r6 will be marked precise and spilled into fp-8 slot, which
|
|
|
|
* also should be marked precise
|
|
|
|
*/
|
|
|
|
"r1 = r10;"
|
|
|
|
"r1 += -8;"
|
|
|
|
"r2 = r6;"
|
|
|
|
"call subprog_spill_reg_precise;"
|
|
|
|
|
|
|
|
/* restore reg from stack; in this case we'll be carrying
|
|
|
|
* stack mask when going back into subprog through jump
|
|
|
|
* history
|
|
|
|
*/
|
|
|
|
"r7 = *(u64 *)(r10 - 8);"
|
|
|
|
|
|
|
|
"r7 *= 4;"
|
|
|
|
"r1 = %[vals];"
|
|
|
|
/* here r7 is forced to be precise and has to be propagated
|
|
|
|
* back to the beginning, handling subprog call and logic
|
|
|
|
*/
|
|
|
|
"r1 += r7;"
|
|
|
|
"r0 = *(u32 *)(r1 + 0);"
|
|
|
|
"exit;"
|
|
|
|
:
|
|
|
|
: __imm_ptr(vals)
|
|
|
|
: __clobber_common, "r6", "r7"
|
|
|
|
);
|
|
|
|
}
|
|
|
|
|
2023-12-05 10:42:40 -08:00
|
|
|
SEC("?raw_tp")
|
|
|
|
__success __log_level(2)
|
|
|
|
__msg("17: (0f) r1 += r0")
|
|
|
|
__msg("mark_precise: frame0: last_idx 17 first_idx 0 subseq_idx -1")
|
|
|
|
__msg("mark_precise: frame0: regs=r0 stack= before 16: (bf) r1 = r7")
|
|
|
|
__msg("mark_precise: frame0: regs=r0 stack= before 15: (27) r0 *= 4")
|
|
|
|
__msg("mark_precise: frame0: regs=r0 stack= before 14: (79) r0 = *(u64 *)(r10 -16)")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-16 before 13: (7b) *(u64 *)(r7 -8) = r0")
|
|
|
|
__msg("mark_precise: frame0: regs=r0 stack= before 12: (79) r0 = *(u64 *)(r8 +16)")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-16 before 11: (7b) *(u64 *)(r8 +16) = r0")
|
|
|
|
__msg("mark_precise: frame0: regs=r0 stack= before 10: (79) r0 = *(u64 *)(r7 -8)")
|
|
|
|
__msg("mark_precise: frame0: regs= stack=-16 before 9: (7b) *(u64 *)(r10 -16) = r0")
|
|
|
|
__msg("mark_precise: frame0: regs=r0 stack= before 8: (07) r8 += -32")
|
|
|
|
__msg("mark_precise: frame0: regs=r0 stack= before 7: (bf) r8 = r10")
|
|
|
|
__msg("mark_precise: frame0: regs=r0 stack= before 6: (07) r7 += -8")
|
|
|
|
__msg("mark_precise: frame0: regs=r0 stack= before 5: (bf) r7 = r10")
|
|
|
|
__msg("mark_precise: frame0: regs=r0 stack= before 21: (95) exit")
|
|
|
|
__msg("mark_precise: frame1: regs=r0 stack= before 20: (bf) r0 = r1")
|
|
|
|
__msg("mark_precise: frame1: regs=r1 stack= before 4: (85) call pc+15")
|
|
|
|
__msg("mark_precise: frame0: regs=r1 stack= before 3: (bf) r1 = r6")
|
|
|
|
__msg("mark_precise: frame0: regs=r6 stack= before 2: (b7) r6 = 1")
|
|
|
|
__naked int stack_slot_aliases_precision(void)
|
2023-05-04 21:33:16 -07:00
|
|
|
{
|
|
|
|
asm volatile (
|
2023-12-05 10:42:40 -08:00
|
|
|
"r6 = 1;"
|
|
|
|
/* pass r6 through r1 into subprog to get it back as r0;
|
|
|
|
* this whole chain will have to be marked as precise later
|
|
|
|
*/
|
|
|
|
"r1 = r6;"
|
|
|
|
"call identity_subprog;"
|
|
|
|
/* let's setup two registers that are aliased to r10 */
|
|
|
|
"r7 = r10;"
|
|
|
|
"r7 += -8;" /* r7 = r10 - 8 */
|
|
|
|
"r8 = r10;"
|
|
|
|
"r8 += -32;" /* r8 = r10 - 32 */
|
|
|
|
/* now spill subprog's return value (a r6 -> r1 -> r0 chain)
|
|
|
|
* a few times through different stack pointer regs, making
|
|
|
|
* sure to use r10, r7, and r8 both in LDX and STX insns, and
|
|
|
|
* *importantly* also using a combination of const var_off and
|
|
|
|
* insn->off to validate that we record final stack slot
|
|
|
|
* correctly, instead of relying on just insn->off derivation,
|
|
|
|
* which is only valid for r10-based stack offset
|
|
|
|
*/
|
|
|
|
"*(u64 *)(r10 - 16) = r0;"
|
|
|
|
"r0 = *(u64 *)(r7 - 8);" /* r7 - 8 == r10 - 16 */
|
|
|
|
"*(u64 *)(r8 + 16) = r0;" /* r8 + 16 = r10 - 16 */
|
|
|
|
"r0 = *(u64 *)(r8 + 16);"
|
|
|
|
"*(u64 *)(r7 - 8) = r0;"
|
|
|
|
"r0 = *(u64 *)(r10 - 16);"
|
|
|
|
/* get ready to use r0 as an index into array to force precision */
|
|
|
|
"r0 *= 4;"
|
|
|
|
"r1 = %[vals];"
|
|
|
|
/* here r0->r1->r6 chain is forced to be precise and has to be
|
|
|
|
* propagated back to the beginning, including through the
|
|
|
|
* subprog call and all the stack spills and loads
|
|
|
|
*/
|
|
|
|
"r1 += r0;"
|
|
|
|
"r0 = *(u32 *)(r1 + 0);"
|
2023-05-04 21:33:16 -07:00
|
|
|
"exit;"
|
2023-12-05 10:42:40 -08:00
|
|
|
:
|
|
|
|
: __imm_ptr(vals)
|
|
|
|
: __clobber_common, "r6"
|
2023-05-04 21:33:16 -07:00
|
|
|
);
|
|
|
|
}
|
|
|
|
|
|
|
|
char _license[] SEC("license") = "GPL";
|