2018-09-19 17:42:55 -07:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, Intel Corporation. */
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2022-02-22 16:26:49 -08:00
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#ifndef _ICE_SRIOV_H_
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#define _ICE_SRIOV_H_
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ice: Enable FDIR Configure for AVF
The virtual channel is going to be extended to support FDIR and
RSS configure from AVF. New data structures and OP codes will be
added, the patch enable the FDIR part.
To support above advanced AVF feature, we need to figure out
what kind of data structure should be passed from VF to PF to describe
an FDIR rule or RSS config rule. The common part of the requirement is
we need a data structure to represent the input set selection of a rule's
hash key.
An input set selection is a group of fields be selected from one or more
network protocol layers that could be identified as a specific flow.
For example, select dst IP address from an IPv4 header combined with
dst port from the TCP header as the input set for an IPv4/TCP flow.
The patch adds a new data structure virtchnl_proto_hdrs to abstract
a network protocol headers group which is composed of layers of network
protocol header(virtchnl_proto_hdr).
A protocol header contains a 32 bits mask (field_selector) to describe
which fields are selected as input sets, as well as a header type
(enum virtchnl_proto_hdr_type). Each bit is mapped to a field in
enum virtchnl_proto_hdr_field guided by its header type.
+------------+-----------+------------------------------+
| | Proto Hdr | Header Type A |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
|Proto Hdrs | Proto Hdr | Header Type B |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
| | Proto Hdr | Header Type C |
| | +------------------------------+
| | | BIT 31 | ... | BIT 1 | BIT 0 |
| |-----------+------------------------------+
| | .... |
+-------------------------------------------------------+
All fields in enum virtchnl_proto_hdr_fields are grouped with header type
and the value of the first field of a header type is always 32 aligned.
enum proto_hdr_type {
header_type_A = 0;
header_type_B = 1;
....
}
enum proto_hdr_field {
/* header type A */
header_A_field_0 = 0,
header_A_field_1 = 1,
header_A_field_2 = 2,
header_A_field_3 = 3,
/* header type B */
header_B_field_0 = 32, // = header_type_B << 5
header_B_field_0 = 33,
header_B_field_0 = 34
header_B_field_0 = 35,
....
};
So we have:
proto_hdr_type = proto_hdr_field / 32
bit offset = proto_hdr_field % 32
To simply the protocol header's operations, couple help macros are added.
For example, to select src IP and dst port as input set for an IPv4/UDP
flow.
we have:
struct virtchnl_proto_hdr hdr[2];
VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[0], IPV4)
VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[0], IPV4, SRC)
VIRTCHNL_SET_PROTO_HDR_TYPE(&hdr[1], UDP)
VIRTCHNL_ADD_PROTO_HDR_FIELD(&hdr[1], UDP, DST)
The byte array is used to store the protocol header of a training package.
The byte array must be network order.
The patch added virtual channel support for iAVF FDIR add/validate/delete
filter. iAVF FDIR is Flow Director for Intel Adaptive Virtual Function
which can direct Ethernet packets to the queues of the Network Interface
Card. Add/delete command is adding or deleting one rule for each virtual
channel message, while validate command is just verifying if this rule
is valid without any other operations.
To add or delete one rule, driver needs to config TCAM and Profile,
build training packets which contains the input set value, and send
the training packets through FDIR Tx queue. In addition, driver needs to
manage the software context to avoid adding duplicated rules, deleting
non-existent rule, input set conflicts and other invalid cases.
NOTE:
Supported pattern/actions and their parse functions are not be included in
this patch, they will be added in a separate one.
Signed-off-by: Jeff Guo <jia.guo@intel.com>
Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Simei Su <simei.su@intel.com>
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Chen Bo <BoX.C.Chen@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2021-03-09 11:08:04 +08:00
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#include "ice_virtchnl_fdir.h"
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2022-02-22 16:26:59 -08:00
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#include "ice_vf_lib.h"
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2022-02-22 16:27:11 -08:00
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#include "ice_virtchnl.h"
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2018-09-19 17:43:01 -07:00
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2018-09-19 17:42:55 -07:00
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/* Static VF transaction/status register def */
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#define VF_DEVICE_STATUS 0xAA
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#define VF_TRANS_PENDING_M 0x20
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2019-07-25 01:55:37 -07:00
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/* wait defines for polling PF_PCI_CIAD register status */
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#define ICE_PCI_CIAD_WAIT_COUNT 100
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#define ICE_PCI_CIAD_WAIT_DELAY_US 1
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2020-02-27 10:14:52 -08:00
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/* VF resource constraints */
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2019-07-25 01:55:39 -07:00
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#define ICE_MIN_QS_PER_VF 1
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#define ICE_NONQ_VECS_VF 1
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2020-02-27 10:14:52 -08:00
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#define ICE_NUM_VF_MSIX_MED 17
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#define ICE_NUM_VF_MSIX_SMALL 5
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2020-07-29 17:19:16 -07:00
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#define ICE_NUM_VF_MSIX_MULTIQ_MIN 3
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2019-07-25 01:55:39 -07:00
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#define ICE_MIN_INTR_PER_VF (ICE_MIN_QS_PER_VF + 1)
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2020-02-18 13:22:06 -08:00
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#define ICE_MAX_VF_RESET_TRIES 40
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#define ICE_MAX_VF_RESET_SLEEP_MS 20
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2019-07-25 01:55:39 -07:00
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2018-09-19 17:42:55 -07:00
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#ifdef CONFIG_PCI_IOV
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2018-09-19 17:42:57 -07:00
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void ice_process_vflr_event(struct ice_pf *pf);
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2018-09-19 17:42:55 -07:00
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int ice_sriov_configure(struct pci_dev *pdev, int num_vfs);
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2018-09-19 17:42:58 -07:00
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int ice_set_vf_mac(struct net_device *netdev, int vf_id, u8 *mac);
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2019-02-26 16:35:11 -08:00
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int
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ice_get_vf_cfg(struct net_device *netdev, int vf_id, struct ifla_vf_info *ivi);
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2018-09-19 17:42:58 -07:00
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2018-09-19 17:42:55 -07:00
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void ice_free_vfs(struct ice_pf *pf);
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2023-10-19 10:32:19 -07:00
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void ice_restore_all_vfs_msi_state(struct ice_pf *pf);
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2018-09-19 17:42:58 -07:00
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2019-02-26 16:35:11 -08:00
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int
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ice_set_vf_port_vlan(struct net_device *netdev, int vf_id, u16 vlan_id, u8 qos,
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__be16 vlan_proto);
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2018-09-19 17:42:58 -07:00
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2021-09-13 11:22:19 -07:00
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int
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ice_set_vf_bw(struct net_device *netdev, int vf_id, int min_tx_rate,
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int max_tx_rate);
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2018-09-19 17:42:58 -07:00
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int ice_set_vf_trust(struct net_device *netdev, int vf_id, bool trusted);
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int ice_set_vf_link_state(struct net_device *netdev, int vf_id, int link_state);
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int ice_set_vf_spoofchk(struct net_device *netdev, int vf_id, bool ena);
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ice: Refactor interrupt tracking
Currently we have two MSI-x (IRQ) trackers, one for OS requested MSI-x
entries (sw_irq_tracker) and one for hardware MSI-x vectors
(hw_irq_tracker). Generally the sw_irq_tracker has less entries than the
hw_irq_tracker because the hw_irq_tracker has entries equal to the max
allowed MSI-x per PF and the sw_irq_tracker is mainly the minimum (non
SR-IOV portion of the vectors, kernel granted IRQs). All of the non
SR-IOV portions of the driver (i.e. LAN queues, RDMA queues, OICR, etc.)
take at least one of each type of tracker resource. SR-IOV only grabs
entries from the hw_irq_tracker. There are a few issues with this approach
that can be seen when doing any kind of device reconfiguration (i.e.
ethtool -L, SR-IOV, etc.). One of them being, any time the driver creates
an ice_q_vector and associates it to a LAN queue pair it will grab and
use one entry from the hw_irq_tracker and one from the sw_irq_tracker.
If the indices on these does not match it will cause a Tx timeout, which
will cause a reset and then the indices will match up again and traffic
will resume. The mismatched indices come from the trackers not being the
same size and/or the search_hint in the two trackers not being equal.
Another reason for the refactor is the co-existence of features with
SR-IOV. If SR-IOV is enabled and the interrupts are taken from the end
of the sw_irq_tracker then other features can no longer use this space
because the hardware has now given the remaining interrupts to SR-IOV.
This patch reworks how we track MSI-x vectors by removing the
hw_irq_tracker completely and instead MSI-x resources needed for SR-IOV
are determined all at once instead of per VF. This can be done because
when creating VFs we know how many are wanted and how many MSI-x vectors
each VF needs. This also allows us to start using MSI-x resources from
the end of the PF's allowed MSI-x vectors so we are less likely to use
entries needed for other features (i.e. RDMA, L2 Offload, etc).
This patch also reworks the ice_res_tracker structure by removing the
search_hint and adding a new member - "end". Instead of having a
search_hint we will always search from 0. The new member, "end", will be
used to manipulate the end of the ice_res_tracker (specifically
sw_irq_tracker) during runtime based on MSI-x vectors needed by SR-IOV.
In the normal case, the end of ice_res_tracker will be equal to the
ice_res_tracker's num_entries.
The sriov_base_vector member was added to the PF structure. It is used
to represent the starting MSI-x index of all the needed MSI-x vectors
for all SR-IOV VFs. Depending on how many MSI-x are needed, SR-IOV may
have to take resources from the sw_irq_tracker. This is done by setting
the sw_irq_tracker->end equal to the pf->sriov_base_vector. When all
SR-IOV VFs are removed then the sw_irq_tracker->end is reset back to
sw_irq_tracker->num_entries. The sriov_base_vector, along with the VF's
number of MSI-x (pf->num_vf_msix), vf_id, and the base MSI-x index on
the PF (pf->hw.func_caps.common_cap.msix_vector_first_id), is used to
calculate the first HW absolute MSI-x index for each VF, which is used
to write to the VPINT_ALLOC[_PCI] and GLINT_VECT2FUNC registers to
program the VFs MSI-x PCI configuration bits. Also, the sriov_base_vector
is used along with VF's num_vf_msix, vf_id, and q_vector->v_idx to
determine the MSI-x register index (used for writing to GLINT_DYN_CTL)
within the PF's space.
Interrupt changes removed any references to hw_base_vector, hw_oicr_idx,
and hw_irq_tracker. Only sw_base_vector, sw_oicr_idx, and sw_irq_tracker
variables remain. Change all of these by removing the "sw_" prefix to
help avoid confusion with these variables and their use.
Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2019-04-16 10:30:44 -07:00
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ice: store VF relative MSI-X index in q_vector->vf_reg_idx
The ice physical function driver needs to configure the association of
queues and interrupts on behalf of its virtual functions. This is done over
virtchnl by the VF sending messages during its initialization phase. These
messages contain a vector_id which the VF wants to associate with a given
queue. This ID is relative to the VF space, where 0 indicates the control
IRQ for non-queue interrupts.
When programming the mapping, the PF driver currently passes this vector_id
directly to the low level functions for programming. This works for SR-IOV,
because the hardware uses the VF-based indexing for interrupts.
This won't work for Scalable IOV, which uses PF-based indexing for
programming its VSIs. To handle this, the driver needs to be able to look
up the proper index to use for programming. For typical IRQs, this would be
the q_vector->reg_idx field.
The q_vector->reg_idx can't be set to a VF relative value, because it is
used when the PF needs to control the interrupt, such as when triggering a
software interrupt on stopping the Tx queue. Thus, introduce a new
q_vector->vf_reg_idx which can store the VF relative index for registers
which expect this.
Use this in ice_cfg_interrupt to look up the VF index from the q_vector.
This allows removing the vector ID parameter of ice_cfg_interrupt. Also
notice that this function returns an int, but then is cast to the virtchnl
error enumeration, virtchnl_status_code. Update the return type to indicate
it does not return an integer error code. We can't use normal error codes
here because the return values are passed across the virtchnl interface.
This will allow the future Scalable IOV VFs to correctly look up the index
needed for programming the VF queues without breaking SR-IOV.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Rafal Romanowski <rafal.romanowski@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2024-03-22 14:44:45 -07:00
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void ice_calc_vf_reg_idx(struct ice_vf *vf, struct ice_q_vector *q_vector);
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2019-08-02 01:25:20 -07:00
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2019-11-08 06:23:28 -08:00
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int
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ice_get_vf_stats(struct net_device *netdev, int vf_id,
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struct ifla_vf_stats *vf_stats);
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2020-01-22 07:21:31 -08:00
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void
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ice_vf_lan_overflow_event(struct ice_pf *pf, struct ice_rq_event_info *event);
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2020-02-13 13:31:16 -08:00
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void ice_print_vfs_mdd_events(struct ice_pf *pf);
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2020-05-15 17:36:31 -07:00
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void ice_print_vf_rx_mdd_event(struct ice_vf *vf);
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2024-04-04 16:04:51 +02:00
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void ice_print_vf_tx_mdd_event(struct ice_vf *vf);
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2021-07-16 15:16:43 -07:00
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bool
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ice_vc_validate_pattern(struct ice_vf *vf, struct virtchnl_proto_hdrs *proto);
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2023-10-19 10:32:22 -07:00
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u32 ice_sriov_get_vf_total_msix(struct pci_dev *pdev);
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int ice_sriov_set_msix_vec_count(struct pci_dev *vf_dev, int msix_vec_count);
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2018-09-19 17:42:55 -07:00
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#else /* CONFIG_PCI_IOV */
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2021-05-06 08:39:56 -07:00
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static inline void ice_process_vflr_event(struct ice_pf *pf) { }
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static inline void ice_free_vfs(struct ice_pf *pf) { }
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static inline
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void ice_vf_lan_overflow_event(struct ice_pf *pf, struct ice_rq_event_info *event) { }
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static inline void ice_print_vfs_mdd_events(struct ice_pf *pf) { }
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static inline void ice_print_vf_rx_mdd_event(struct ice_vf *vf) { }
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2024-04-04 16:04:51 +02:00
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static inline void ice_print_vf_tx_mdd_event(struct ice_vf *vf) { }
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2023-10-19 10:32:19 -07:00
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static inline void ice_restore_all_vfs_msi_state(struct ice_pf *pf) { }
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2018-09-19 17:43:00 -07:00
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2018-09-19 17:42:55 -07:00
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static inline int
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ice_sriov_configure(struct pci_dev __always_unused *pdev,
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int __always_unused num_vfs)
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{
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return -EOPNOTSUPP;
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}
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2018-09-19 17:42:58 -07:00
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static inline int
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ice_set_vf_mac(struct net_device __always_unused *netdev,
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int __always_unused vf_id, u8 __always_unused *mac)
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{
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return -EOPNOTSUPP;
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}
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static inline int
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ice_get_vf_cfg(struct net_device __always_unused *netdev,
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int __always_unused vf_id,
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struct ifla_vf_info __always_unused *ivi)
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{
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return -EOPNOTSUPP;
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}
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static inline int
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ice_set_vf_trust(struct net_device __always_unused *netdev,
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int __always_unused vf_id, bool __always_unused trusted)
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{
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return -EOPNOTSUPP;
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}
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static inline int
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ice_set_vf_port_vlan(struct net_device __always_unused *netdev,
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int __always_unused vf_id, u16 __always_unused vid,
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u8 __always_unused qos, __be16 __always_unused v_proto)
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{
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return -EOPNOTSUPP;
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}
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static inline int
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ice_set_vf_spoofchk(struct net_device __always_unused *netdev,
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int __always_unused vf_id, bool __always_unused ena)
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{
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return -EOPNOTSUPP;
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}
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static inline int
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ice_set_vf_link_state(struct net_device __always_unused *netdev,
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int __always_unused vf_id, int __always_unused link_state)
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{
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return -EOPNOTSUPP;
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}
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2021-09-13 11:22:19 -07:00
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static inline int
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ice_set_vf_bw(struct net_device __always_unused *netdev,
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int __always_unused vf_id, int __always_unused min_tx_rate,
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int __always_unused max_tx_rate)
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{
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return -EOPNOTSUPP;
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}
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ice: store VF relative MSI-X index in q_vector->vf_reg_idx
The ice physical function driver needs to configure the association of
queues and interrupts on behalf of its virtual functions. This is done over
virtchnl by the VF sending messages during its initialization phase. These
messages contain a vector_id which the VF wants to associate with a given
queue. This ID is relative to the VF space, where 0 indicates the control
IRQ for non-queue interrupts.
When programming the mapping, the PF driver currently passes this vector_id
directly to the low level functions for programming. This works for SR-IOV,
because the hardware uses the VF-based indexing for interrupts.
This won't work for Scalable IOV, which uses PF-based indexing for
programming its VSIs. To handle this, the driver needs to be able to look
up the proper index to use for programming. For typical IRQs, this would be
the q_vector->reg_idx field.
The q_vector->reg_idx can't be set to a VF relative value, because it is
used when the PF needs to control the interrupt, such as when triggering a
software interrupt on stopping the Tx queue. Thus, introduce a new
q_vector->vf_reg_idx which can store the VF relative index for registers
which expect this.
Use this in ice_cfg_interrupt to look up the VF index from the q_vector.
This allows removing the vector ID parameter of ice_cfg_interrupt. Also
notice that this function returns an int, but then is cast to the virtchnl
error enumeration, virtchnl_status_code. Update the return type to indicate
it does not return an integer error code. We can't use normal error codes
here because the return values are passed across the virtchnl interface.
This will allow the future Scalable IOV VFs to correctly look up the index
needed for programming the VF queues without breaking SR-IOV.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Rafal Romanowski <rafal.romanowski@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
2024-03-22 14:44:45 -07:00
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static inline void
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ice: Refactor interrupt tracking
Currently we have two MSI-x (IRQ) trackers, one for OS requested MSI-x
entries (sw_irq_tracker) and one for hardware MSI-x vectors
(hw_irq_tracker). Generally the sw_irq_tracker has less entries than the
hw_irq_tracker because the hw_irq_tracker has entries equal to the max
allowed MSI-x per PF and the sw_irq_tracker is mainly the minimum (non
SR-IOV portion of the vectors, kernel granted IRQs). All of the non
SR-IOV portions of the driver (i.e. LAN queues, RDMA queues, OICR, etc.)
take at least one of each type of tracker resource. SR-IOV only grabs
entries from the hw_irq_tracker. There are a few issues with this approach
that can be seen when doing any kind of device reconfiguration (i.e.
ethtool -L, SR-IOV, etc.). One of them being, any time the driver creates
an ice_q_vector and associates it to a LAN queue pair it will grab and
use one entry from the hw_irq_tracker and one from the sw_irq_tracker.
If the indices on these does not match it will cause a Tx timeout, which
will cause a reset and then the indices will match up again and traffic
will resume. The mismatched indices come from the trackers not being the
same size and/or the search_hint in the two trackers not being equal.
Another reason for the refactor is the co-existence of features with
SR-IOV. If SR-IOV is enabled and the interrupts are taken from the end
of the sw_irq_tracker then other features can no longer use this space
because the hardware has now given the remaining interrupts to SR-IOV.
This patch reworks how we track MSI-x vectors by removing the
hw_irq_tracker completely and instead MSI-x resources needed for SR-IOV
are determined all at once instead of per VF. This can be done because
when creating VFs we know how many are wanted and how many MSI-x vectors
each VF needs. This also allows us to start using MSI-x resources from
the end of the PF's allowed MSI-x vectors so we are less likely to use
entries needed for other features (i.e. RDMA, L2 Offload, etc).
This patch also reworks the ice_res_tracker structure by removing the
search_hint and adding a new member - "end". Instead of having a
search_hint we will always search from 0. The new member, "end", will be
used to manipulate the end of the ice_res_tracker (specifically
sw_irq_tracker) during runtime based on MSI-x vectors needed by SR-IOV.
In the normal case, the end of ice_res_tracker will be equal to the
ice_res_tracker's num_entries.
The sriov_base_vector member was added to the PF structure. It is used
to represent the starting MSI-x index of all the needed MSI-x vectors
for all SR-IOV VFs. Depending on how many MSI-x are needed, SR-IOV may
have to take resources from the sw_irq_tracker. This is done by setting
the sw_irq_tracker->end equal to the pf->sriov_base_vector. When all
SR-IOV VFs are removed then the sw_irq_tracker->end is reset back to
sw_irq_tracker->num_entries. The sriov_base_vector, along with the VF's
number of MSI-x (pf->num_vf_msix), vf_id, and the base MSI-x index on
the PF (pf->hw.func_caps.common_cap.msix_vector_first_id), is used to
calculate the first HW absolute MSI-x index for each VF, which is used
to write to the VPINT_ALLOC[_PCI] and GLINT_VECT2FUNC registers to
program the VFs MSI-x PCI configuration bits. Also, the sriov_base_vector
is used along with VF's num_vf_msix, vf_id, and q_vector->v_idx to
determine the MSI-x register index (used for writing to GLINT_DYN_CTL)
within the PF's space.
Interrupt changes removed any references to hw_base_vector, hw_oicr_idx,
and hw_irq_tracker. Only sw_base_vector, sw_oicr_idx, and sw_irq_tracker
variables remain. Change all of these by removing the "sw_" prefix to
help avoid confusion with these variables and their use.
Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
2019-04-16 10:30:44 -07:00
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ice_calc_vf_reg_idx(struct ice_vf __always_unused *vf,
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struct ice_q_vector __always_unused *q_vector)
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|
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{
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}
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2019-11-08 06:23:28 -08:00
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|
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static inline int
|
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|
|
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ice_get_vf_stats(struct net_device __always_unused *netdev,
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int __always_unused vf_id,
|
|
|
|
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struct ifla_vf_stats __always_unused *vf_stats)
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|
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{
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return -EOPNOTSUPP;
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}
|
2023-10-19 10:32:22 -07:00
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static inline u32 ice_sriov_get_vf_total_msix(struct pci_dev *pdev)
|
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|
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{
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|
|
return 0;
|
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|
|
}
|
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|
|
static inline int
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|
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ice_sriov_set_msix_vec_count(struct pci_dev *vf_dev, int msix_vec_count)
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{
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|
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return -EOPNOTSUPP;
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}
|
2018-09-19 17:42:55 -07:00
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#endif /* CONFIG_PCI_IOV */
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2022-02-22 16:26:49 -08:00
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#endif /* _ICE_SRIOV_H_ */
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