2012-05-02 17:06:22 +10:00
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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2020-09-22 15:36:11 +02:00
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#include <linux/dma-map-ops.h>
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2012-05-02 17:06:22 +10:00
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#include <linux/kernel.h>
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2020-08-06 23:22:28 -07:00
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#include <asm/cacheflush.h>
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2012-05-02 17:06:22 +10:00
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2023-10-17 16:04:42 +02:00
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#ifndef CONFIG_COLDFIRE
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2019-06-25 11:01:35 +02:00
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void arch_dma_prep_coherent(struct page *page, size_t size)
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{
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cache_push(page_to_phys(page), size);
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}
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2019-08-26 09:03:44 +02:00
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pgprot_t pgprot_dmacoherent(pgprot_t prot)
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2012-05-02 17:06:22 +10:00
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{
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2019-06-25 11:01:34 +02:00
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if (CPU_IS_040_OR_060) {
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pgprot_val(prot) &= ~_PAGE_CACHE040;
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pgprot_val(prot) |= _PAGE_GLOBAL040 | _PAGE_NOCACHE_S;
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} else {
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pgprot_val(prot) |= _PAGE_NOCACHE030;
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2012-05-02 17:06:22 +10:00
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}
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2019-06-25 11:01:34 +02:00
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return prot;
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2012-05-02 17:06:22 +10:00
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}
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2012-06-26 21:02:54 +10:00
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#endif /* CONFIG_MMU && !CONFIG_COLDFIRE */
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2012-05-02 17:06:22 +10:00
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2019-11-07 18:03:11 +01:00
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void arch_sync_dma_for_device(phys_addr_t handle, size_t size,
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enum dma_data_direction dir)
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2012-05-02 17:06:22 +10:00
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{
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switch (dir) {
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2012-07-10 13:50:58 +10:00
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case DMA_BIDIRECTIONAL:
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2012-05-02 17:06:22 +10:00
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case DMA_TO_DEVICE:
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cache_push(handle, size);
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break;
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case DMA_FROM_DEVICE:
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cache_clear(handle, size);
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break;
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default:
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2016-12-06 19:57:37 +01:00
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pr_err_ratelimited("dma_sync_single_for_device: unsupported dir %u\n",
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dir);
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2012-05-02 17:06:22 +10:00
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break;
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}
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}
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