x86: Introduce disabled-features
I believe the REQUIRED_MASK aproach was taken so that it was
easier to consult in assembly (arch/x86/kernel/verify_cpu.S).
DISABLED_MASK does not have the same restriction, but I
implemented it the same way for consistency.
We have a REQUIRED_MASK... which does two things:
1. Keeps a list of cpuid bits to check in very early boot and
refuse to boot if those are not present.
2. Consulted during cpu_has() checks, which allows us to
optimize out things at compile-time. In other words, if we
*KNOW* we will not boot with the feature off, then we can
safely assume that it will be present forever.
But, we don't have a similar mechanism for CPU features which
may be present but that we know we will not use. We simply
use our existing mechanisms to repeatedly check the status of
the bit at runtime (well, the alternatives patching helps here
but it does not provide compile-time optimization).
Adding a feature to disabled-features.h allows the bit to be
checked via a new macro: cpu_feature_enabled(). Note that
for features in DISABLED_MASK, checks with this macro have
all of the benefits of an #ifdef. Before, we would have done
this in a header:
#ifdef CONFIG_X86_INTEL_MPX
#define cpu_has_mpx cpu_has(X86_FEATURE_MPX)
#else
#define cpu_has_mpx 0
#endif
and this in the code:
if (cpu_has_mpx)
do_some_mpx_thing();
Now, just add your feature to DISABLED_MASK and you can do this
everywhere, and get the same benefits you would have from
#ifdefs:
if (cpu_feature_enabled(X86_FEATURE_MPX))
do_some_mpx_thing();
We need a new function and *not* a modification to cpu_has()
because there are cases where we actually need to check the CPU
itself, despite what features the kernel supports. The best
example of this is a hypervisor which has no control over what
features its guests are using and where the guest does not depend
on the host for support.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: http://lkml.kernel.org/r/20140911211513.9E35E931@viggo.jf.intel.com
Acked-by: Borislav Petkov <bp@suse.de>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-09-11 14:15:13 -07:00
|
|
|
#ifndef _ASM_X86_DISABLED_FEATURES_H
|
|
|
|
|
#define _ASM_X86_DISABLED_FEATURES_H
|
|
|
|
|
|
|
|
|
|
/* These features, although they might be available in a CPU
|
|
|
|
|
* will not be used because the compile options to support
|
|
|
|
|
* them are not present.
|
|
|
|
|
*
|
|
|
|
|
* This code allows them to be checked and disabled at
|
|
|
|
|
* compile time without an explicit #ifdef. Use
|
|
|
|
|
* cpu_feature_enabled().
|
|
|
|
|
*/
|
|
|
|
|
|
2019-11-05 21:25:32 +00:00
|
|
|
#ifdef CONFIG_X86_UMIP
|
2017-11-05 18:27:51 -08:00
|
|
|
# define DISABLE_UMIP 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31))
|
|
|
|
|
#endif
|
|
|
|
|
|
2014-09-11 14:15:24 -07:00
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
|
# define DISABLE_VME (1<<(X86_FEATURE_VME & 31))
|
|
|
|
|
# define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31))
|
|
|
|
|
# define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31))
|
|
|
|
|
# define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31))
|
2017-06-29 08:53:19 -07:00
|
|
|
# define DISABLE_PCID 0
|
2014-09-11 14:15:24 -07:00
|
|
|
#else
|
|
|
|
|
# define DISABLE_VME 0
|
|
|
|
|
# define DISABLE_K6_MTRR 0
|
|
|
|
|
# define DISABLE_CYRIX_ARR 0
|
|
|
|
|
# define DISABLE_CENTAUR_MCR 0
|
2017-06-29 08:53:19 -07:00
|
|
|
# define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31))
|
2014-09-11 14:15:24 -07:00
|
|
|
#endif /* CONFIG_X86_64 */
|
|
|
|
|
|
x86/cpufeature, x86/mm/pkeys: Add protection keys related CPUID definitions
There are two CPUID bits for protection keys. One is for whether
the CPU contains the feature, and the other will appear set once
the OS enables protection keys. Specifically:
Bit 04: OSPKE. If 1, OS has set CR4.PKE to enable
Protection keys (and the RDPKRU/WRPKRU instructions)
This is because userspace can not see CR4 contents, but it can
see CPUID contents.
X86_FEATURE_PKU is referred to as "PKU" in the hardware documentation:
CPUID.(EAX=07H,ECX=0H):ECX.PKU [bit 3]
X86_FEATURE_OSPKE is "OSPKU":
CPUID.(EAX=07H,ECX=0H):ECX.OSPKE [bit 4]
These are the first CPU features which need to look at the
ECX word in CPUID leaf 0x7, so this patch also includes
fetching that word in to the cpuinfo->x86_capability[] array.
Add it to the disabled-features mask when its config option is
off. Even though we are not using it here, we also extend the
REQUIRED_MASK_BIT_SET() macro to keep it mirroring the
DISABLED_MASK_BIT_SET() version.
This means that in almost all code, you should use:
cpu_has(c, X86_FEATURE_PKU)
and *not* the CONFIG option.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20160212210201.7714C250@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-02-12 13:02:01 -08:00
|
|
|
#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
|
|
|
|
|
# define DISABLE_PKU 0
|
|
|
|
|
# define DISABLE_OSPKE 0
|
2016-05-13 15:13:28 -07:00
|
|
|
#else
|
|
|
|
|
# define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31))
|
|
|
|
|
# define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31))
|
x86/cpufeature, x86/mm/pkeys: Add protection keys related CPUID definitions
There are two CPUID bits for protection keys. One is for whether
the CPU contains the feature, and the other will appear set once
the OS enables protection keys. Specifically:
Bit 04: OSPKE. If 1, OS has set CR4.PKE to enable
Protection keys (and the RDPKRU/WRPKRU instructions)
This is because userspace can not see CR4 contents, but it can
see CPUID contents.
X86_FEATURE_PKU is referred to as "PKU" in the hardware documentation:
CPUID.(EAX=07H,ECX=0H):ECX.PKU [bit 3]
X86_FEATURE_OSPKE is "OSPKU":
CPUID.(EAX=07H,ECX=0H):ECX.OSPKE [bit 4]
These are the first CPU features which need to look at the
ECX word in CPUID leaf 0x7, so this patch also includes
fetching that word in to the cpuinfo->x86_capability[] array.
Add it to the disabled-features mask when its config option is
off. Even though we are not using it here, we also extend the
REQUIRED_MASK_BIT_SET() macro to keep it mirroring the
DISABLED_MASK_BIT_SET() version.
This means that in almost all code, you should use:
cpu_has(c, X86_FEATURE_PKU)
and *not* the CONFIG option.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20160212210201.7714C250@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-02-12 13:02:01 -08:00
|
|
|
#endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
|
|
|
|
|
|
2017-03-30 11:07:25 +03:00
|
|
|
#ifdef CONFIG_X86_5LEVEL
|
|
|
|
|
# define DISABLE_LA57 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_LA57 (1<<(X86_FEATURE_LA57 & 31))
|
|
|
|
|
#endif
|
|
|
|
|
|
2023-11-21 08:07:31 -08:00
|
|
|
#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
|
2017-12-04 15:07:33 +01:00
|
|
|
# define DISABLE_PTI 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_PTI (1 << (X86_FEATURE_PTI & 31))
|
|
|
|
|
#endif
|
|
|
|
|
|
2023-11-21 08:07:32 -08:00
|
|
|
#ifdef CONFIG_MITIGATION_RETPOLINE
|
2022-06-14 23:15:34 +02:00
|
|
|
# define DISABLE_RETPOLINE 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_RETPOLINE ((1 << (X86_FEATURE_RETPOLINE & 31)) | \
|
2022-06-27 22:21:17 +00:00
|
|
|
(1 << (X86_FEATURE_RETPOLINE_LFENCE & 31)))
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_RETHUNK
|
|
|
|
|
# define DISABLE_RETHUNK 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_RETHUNK (1 << (X86_FEATURE_RETHUNK & 31))
|
|
|
|
|
#endif
|
|
|
|
|
|
2023-11-21 08:07:34 -08:00
|
|
|
#ifdef CONFIG_MITIGATION_UNRET_ENTRY
|
2022-06-27 22:21:17 +00:00
|
|
|
# define DISABLE_UNRET 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_UNRET (1 << (X86_FEATURE_UNRET & 31))
|
2022-06-14 23:15:34 +02:00
|
|
|
#endif
|
|
|
|
|
|
2023-11-21 08:07:30 -08:00
|
|
|
#ifdef CONFIG_MITIGATION_CALL_DEPTH_TRACKING
|
2022-09-15 13:11:19 +02:00
|
|
|
# define DISABLE_CALL_DEPTH_TRACKING 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_CALL_DEPTH_TRACKING (1 << (X86_FEATURE_CALL_DEPTH & 31))
|
|
|
|
|
#endif
|
|
|
|
|
|
2023-03-12 14:26:02 +03:00
|
|
|
#ifdef CONFIG_ADDRESS_MASKING
|
|
|
|
|
# define DISABLE_LAM 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_LAM (1 << (X86_FEATURE_LAM & 31))
|
|
|
|
|
#endif
|
|
|
|
|
|
2022-02-07 15:02:52 -08:00
|
|
|
#ifdef CONFIG_INTEL_IOMMU_SVM
|
|
|
|
|
# define DISABLE_ENQCMD 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_ENQCMD (1 << (X86_FEATURE_ENQCMD & 31))
|
|
|
|
|
#endif
|
2020-09-15 09:30:12 -07:00
|
|
|
|
2020-11-13 00:01:14 +02:00
|
|
|
#ifdef CONFIG_X86_SGX
|
|
|
|
|
# define DISABLE_SGX 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_SGX (1 << (X86_FEATURE_SGX & 31))
|
|
|
|
|
#endif
|
|
|
|
|
|
2022-11-04 08:26:57 +01:00
|
|
|
#ifdef CONFIG_XEN_PV
|
|
|
|
|
# define DISABLE_XENPV 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_XENPV (1 << (X86_FEATURE_XENPV & 31))
|
|
|
|
|
#endif
|
|
|
|
|
|
2022-04-06 02:29:10 +03:00
|
|
|
#ifdef CONFIG_INTEL_TDX_GUEST
|
|
|
|
|
# define DISABLE_TDX_GUEST 0
|
|
|
|
|
#else
|
|
|
|
|
# define DISABLE_TDX_GUEST (1 << (X86_FEATURE_TDX_GUEST & 31))
|
|
|
|
|
#endif
|
|
|
|
|
|
2023-06-12 17:10:34 -07:00
|
|
|
#ifdef CONFIG_X86_USER_SHADOW_STACK
|
|
|
|
|
#define DISABLE_USER_SHSTK 0
|
|
|
|
|
#else
|
|
|
|
|
#define DISABLE_USER_SHSTK (1 << (X86_FEATURE_USER_SHSTK & 31))
|
|
|
|
|
#endif
|
|
|
|
|
|
2023-06-12 17:10:53 -07:00
|
|
|
#ifdef CONFIG_X86_KERNEL_IBT
|
|
|
|
|
#define DISABLE_IBT 0
|
|
|
|
|
#else
|
|
|
|
|
#define DISABLE_IBT (1 << (X86_FEATURE_IBT & 31))
|
|
|
|
|
#endif
|
|
|
|
|
|
x86: Introduce disabled-features
I believe the REQUIRED_MASK aproach was taken so that it was
easier to consult in assembly (arch/x86/kernel/verify_cpu.S).
DISABLED_MASK does not have the same restriction, but I
implemented it the same way for consistency.
We have a REQUIRED_MASK... which does two things:
1. Keeps a list of cpuid bits to check in very early boot and
refuse to boot if those are not present.
2. Consulted during cpu_has() checks, which allows us to
optimize out things at compile-time. In other words, if we
*KNOW* we will not boot with the feature off, then we can
safely assume that it will be present forever.
But, we don't have a similar mechanism for CPU features which
may be present but that we know we will not use. We simply
use our existing mechanisms to repeatedly check the status of
the bit at runtime (well, the alternatives patching helps here
but it does not provide compile-time optimization).
Adding a feature to disabled-features.h allows the bit to be
checked via a new macro: cpu_feature_enabled(). Note that
for features in DISABLED_MASK, checks with this macro have
all of the benefits of an #ifdef. Before, we would have done
this in a header:
#ifdef CONFIG_X86_INTEL_MPX
#define cpu_has_mpx cpu_has(X86_FEATURE_MPX)
#else
#define cpu_has_mpx 0
#endif
and this in the code:
if (cpu_has_mpx)
do_some_mpx_thing();
Now, just add your feature to DISABLED_MASK and you can do this
everywhere, and get the same benefits you would have from
#ifdefs:
if (cpu_feature_enabled(X86_FEATURE_MPX))
do_some_mpx_thing();
We need a new function and *not* a modification to cpu_has()
because there are cases where we actually need to check the CPU
itself, despite what features the kernel supports. The best
example of this is a hypervisor which has no control over what
features its guests are using and where the guest does not depend
on the host for support.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: http://lkml.kernel.org/r/20140911211513.9E35E931@viggo.jf.intel.com
Acked-by: Borislav Petkov <bp@suse.de>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-09-11 14:15:13 -07:00
|
|
|
/*
|
|
|
|
|
* Make sure to add features to the correct mask
|
|
|
|
|
*/
|
2014-09-11 14:15:24 -07:00
|
|
|
#define DISABLED_MASK0 (DISABLE_VME)
|
x86: Introduce disabled-features
I believe the REQUIRED_MASK aproach was taken so that it was
easier to consult in assembly (arch/x86/kernel/verify_cpu.S).
DISABLED_MASK does not have the same restriction, but I
implemented it the same way for consistency.
We have a REQUIRED_MASK... which does two things:
1. Keeps a list of cpuid bits to check in very early boot and
refuse to boot if those are not present.
2. Consulted during cpu_has() checks, which allows us to
optimize out things at compile-time. In other words, if we
*KNOW* we will not boot with the feature off, then we can
safely assume that it will be present forever.
But, we don't have a similar mechanism for CPU features which
may be present but that we know we will not use. We simply
use our existing mechanisms to repeatedly check the status of
the bit at runtime (well, the alternatives patching helps here
but it does not provide compile-time optimization).
Adding a feature to disabled-features.h allows the bit to be
checked via a new macro: cpu_feature_enabled(). Note that
for features in DISABLED_MASK, checks with this macro have
all of the benefits of an #ifdef. Before, we would have done
this in a header:
#ifdef CONFIG_X86_INTEL_MPX
#define cpu_has_mpx cpu_has(X86_FEATURE_MPX)
#else
#define cpu_has_mpx 0
#endif
and this in the code:
if (cpu_has_mpx)
do_some_mpx_thing();
Now, just add your feature to DISABLED_MASK and you can do this
everywhere, and get the same benefits you would have from
#ifdefs:
if (cpu_feature_enabled(X86_FEATURE_MPX))
do_some_mpx_thing();
We need a new function and *not* a modification to cpu_has()
because there are cases where we actually need to check the CPU
itself, despite what features the kernel supports. The best
example of this is a hypervisor which has no control over what
features its guests are using and where the guest does not depend
on the host for support.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: http://lkml.kernel.org/r/20140911211513.9E35E931@viggo.jf.intel.com
Acked-by: Borislav Petkov <bp@suse.de>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-09-11 14:15:13 -07:00
|
|
|
#define DISABLED_MASK1 0
|
|
|
|
|
#define DISABLED_MASK2 0
|
2014-09-11 14:15:24 -07:00
|
|
|
#define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
|
2017-06-29 08:53:19 -07:00
|
|
|
#define DISABLED_MASK4 (DISABLE_PCID)
|
x86: Introduce disabled-features
I believe the REQUIRED_MASK aproach was taken so that it was
easier to consult in assembly (arch/x86/kernel/verify_cpu.S).
DISABLED_MASK does not have the same restriction, but I
implemented it the same way for consistency.
We have a REQUIRED_MASK... which does two things:
1. Keeps a list of cpuid bits to check in very early boot and
refuse to boot if those are not present.
2. Consulted during cpu_has() checks, which allows us to
optimize out things at compile-time. In other words, if we
*KNOW* we will not boot with the feature off, then we can
safely assume that it will be present forever.
But, we don't have a similar mechanism for CPU features which
may be present but that we know we will not use. We simply
use our existing mechanisms to repeatedly check the status of
the bit at runtime (well, the alternatives patching helps here
but it does not provide compile-time optimization).
Adding a feature to disabled-features.h allows the bit to be
checked via a new macro: cpu_feature_enabled(). Note that
for features in DISABLED_MASK, checks with this macro have
all of the benefits of an #ifdef. Before, we would have done
this in a header:
#ifdef CONFIG_X86_INTEL_MPX
#define cpu_has_mpx cpu_has(X86_FEATURE_MPX)
#else
#define cpu_has_mpx 0
#endif
and this in the code:
if (cpu_has_mpx)
do_some_mpx_thing();
Now, just add your feature to DISABLED_MASK and you can do this
everywhere, and get the same benefits you would have from
#ifdefs:
if (cpu_feature_enabled(X86_FEATURE_MPX))
do_some_mpx_thing();
We need a new function and *not* a modification to cpu_has()
because there are cases where we actually need to check the CPU
itself, despite what features the kernel supports. The best
example of this is a hypervisor which has no control over what
features its guests are using and where the guest does not depend
on the host for support.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: http://lkml.kernel.org/r/20140911211513.9E35E931@viggo.jf.intel.com
Acked-by: Borislav Petkov <bp@suse.de>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-09-11 14:15:13 -07:00
|
|
|
#define DISABLED_MASK5 0
|
|
|
|
|
#define DISABLED_MASK6 0
|
2017-12-04 15:07:33 +01:00
|
|
|
#define DISABLED_MASK7 (DISABLE_PTI)
|
2022-11-04 08:26:57 +01:00
|
|
|
#define DISABLED_MASK8 (DISABLE_XENPV|DISABLE_TDX_GUEST)
|
2022-01-27 12:56:23 +01:00
|
|
|
#define DISABLED_MASK9 (DISABLE_SGX)
|
x86/cpufeature, x86/mm/pkeys: Add protection keys related CPUID definitions
There are two CPUID bits for protection keys. One is for whether
the CPU contains the feature, and the other will appear set once
the OS enables protection keys. Specifically:
Bit 04: OSPKE. If 1, OS has set CR4.PKE to enable
Protection keys (and the RDPKRU/WRPKRU instructions)
This is because userspace can not see CR4 contents, but it can
see CPUID contents.
X86_FEATURE_PKU is referred to as "PKU" in the hardware documentation:
CPUID.(EAX=07H,ECX=0H):ECX.PKU [bit 3]
X86_FEATURE_OSPKE is "OSPKU":
CPUID.(EAX=07H,ECX=0H):ECX.OSPKE [bit 4]
These are the first CPU features which need to look at the
ECX word in CPUID leaf 0x7, so this patch also includes
fetching that word in to the cpuinfo->x86_capability[] array.
Add it to the disabled-features mask when its config option is
off. Even though we are not using it here, we also extend the
REQUIRED_MASK_BIT_SET() macro to keep it mirroring the
DISABLED_MASK_BIT_SET() version.
This means that in almost all code, you should use:
cpu_has(c, X86_FEATURE_PKU)
and *not* the CONFIG option.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20160212210201.7714C250@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-02-12 13:02:01 -08:00
|
|
|
#define DISABLED_MASK10 0
|
2022-09-15 13:11:19 +02:00
|
|
|
#define DISABLED_MASK11 (DISABLE_RETPOLINE|DISABLE_RETHUNK|DISABLE_UNRET| \
|
2023-06-12 17:10:34 -07:00
|
|
|
DISABLE_CALL_DEPTH_TRACKING|DISABLE_USER_SHSTK)
|
2023-03-12 14:26:02 +03:00
|
|
|
#define DISABLED_MASK12 (DISABLE_LAM)
|
x86/cpufeature, x86/mm/pkeys: Add protection keys related CPUID definitions
There are two CPUID bits for protection keys. One is for whether
the CPU contains the feature, and the other will appear set once
the OS enables protection keys. Specifically:
Bit 04: OSPKE. If 1, OS has set CR4.PKE to enable
Protection keys (and the RDPKRU/WRPKRU instructions)
This is because userspace can not see CR4 contents, but it can
see CPUID contents.
X86_FEATURE_PKU is referred to as "PKU" in the hardware documentation:
CPUID.(EAX=07H,ECX=0H):ECX.PKU [bit 3]
X86_FEATURE_OSPKE is "OSPKU":
CPUID.(EAX=07H,ECX=0H):ECX.OSPKE [bit 4]
These are the first CPU features which need to look at the
ECX word in CPUID leaf 0x7, so this patch also includes
fetching that word in to the cpuinfo->x86_capability[] array.
Add it to the disabled-features mask when its config option is
off. Even though we are not using it here, we also extend the
REQUIRED_MASK_BIT_SET() macro to keep it mirroring the
DISABLED_MASK_BIT_SET() version.
This means that in almost all code, you should use:
cpu_has(c, X86_FEATURE_PKU)
and *not* the CONFIG option.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave@sr71.net>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/20160212210201.7714C250@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-02-12 13:02:01 -08:00
|
|
|
#define DISABLED_MASK13 0
|
|
|
|
|
#define DISABLED_MASK14 0
|
|
|
|
|
#define DISABLED_MASK15 0
|
2020-09-15 09:30:12 -07:00
|
|
|
#define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE|DISABLE_LA57|DISABLE_UMIP| \
|
|
|
|
|
DISABLE_ENQCMD)
|
2016-06-29 13:01:07 -07:00
|
|
|
#define DISABLED_MASK17 0
|
2023-06-12 17:10:53 -07:00
|
|
|
#define DISABLED_MASK18 (DISABLE_IBT)
|
2021-01-22 12:40:46 -08:00
|
|
|
#define DISABLED_MASK19 0
|
2023-01-10 16:46:37 -06:00
|
|
|
#define DISABLED_MASK20 0
|
|
|
|
|
#define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 21)
|
x86: Introduce disabled-features
I believe the REQUIRED_MASK aproach was taken so that it was
easier to consult in assembly (arch/x86/kernel/verify_cpu.S).
DISABLED_MASK does not have the same restriction, but I
implemented it the same way for consistency.
We have a REQUIRED_MASK... which does two things:
1. Keeps a list of cpuid bits to check in very early boot and
refuse to boot if those are not present.
2. Consulted during cpu_has() checks, which allows us to
optimize out things at compile-time. In other words, if we
*KNOW* we will not boot with the feature off, then we can
safely assume that it will be present forever.
But, we don't have a similar mechanism for CPU features which
may be present but that we know we will not use. We simply
use our existing mechanisms to repeatedly check the status of
the bit at runtime (well, the alternatives patching helps here
but it does not provide compile-time optimization).
Adding a feature to disabled-features.h allows the bit to be
checked via a new macro: cpu_feature_enabled(). Note that
for features in DISABLED_MASK, checks with this macro have
all of the benefits of an #ifdef. Before, we would have done
this in a header:
#ifdef CONFIG_X86_INTEL_MPX
#define cpu_has_mpx cpu_has(X86_FEATURE_MPX)
#else
#define cpu_has_mpx 0
#endif
and this in the code:
if (cpu_has_mpx)
do_some_mpx_thing();
Now, just add your feature to DISABLED_MASK and you can do this
everywhere, and get the same benefits you would have from
#ifdefs:
if (cpu_feature_enabled(X86_FEATURE_MPX))
do_some_mpx_thing();
We need a new function and *not* a modification to cpu_has()
because there are cases where we actually need to check the CPU
itself, despite what features the kernel supports. The best
example of this is a hypervisor which has no control over what
features its guests are using and where the guest does not depend
on the host for support.
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: http://lkml.kernel.org/r/20140911211513.9E35E931@viggo.jf.intel.com
Acked-by: Borislav Petkov <bp@suse.de>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-09-11 14:15:13 -07:00
|
|
|
|
|
|
|
|
#endif /* _ASM_X86_DISABLED_FEATURES_H */
|