2019-10-12 17:48:56 +05:30
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Microchip switch driver common header
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2018-11-20 15:55:09 -08:00
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*
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2019-02-22 16:36:48 -08:00
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* Copyright (C) 2017-2019 Microchip Technology Inc.
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2018-11-20 15:55:09 -08:00
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*/
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#ifndef __KSZ_COMMON_H
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#define __KSZ_COMMON_H
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2019-08-06 15:06:08 +02:00
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#include <linux/etherdevice.h>
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#include <linux/kernel.h>
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#include <linux/mutex.h>
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#include <linux/phy.h>
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2019-06-26 01:43:46 +02:00
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#include <linux/regmap.h>
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2019-08-06 15:06:08 +02:00
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#include <net/dsa.h>
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2022-05-17 15:13:32 +05:30
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#define KSZ_MAX_NUM_PORTS 8
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2019-08-06 15:06:08 +02:00
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struct vlan_table {
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u32 table[3];
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};
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struct ksz_port_mib {
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struct mutex cnt_mutex; /* structure access */
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u8 cnt_ptr;
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u64 *counters;
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2022-02-19 09:26:30 +01:00
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struct rtnl_link_stats64 stats64;
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struct spinlock stats64_lock;
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2019-08-06 15:06:08 +02:00
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};
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2022-05-17 15:13:28 +05:30
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struct ksz_mib_names {
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int index;
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char string[ETH_GSTRING_LEN];
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};
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2022-05-17 15:13:26 +05:30
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struct ksz_chip_data {
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u32 chip_id;
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const char *dev_name;
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int num_vlans;
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int num_alus;
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int num_statics;
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int cpu_ports;
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int port_cnt;
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bool phy_errata_9477;
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bool ksz87xx_eee_link_erratum;
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2022-05-17 15:13:28 +05:30
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const struct ksz_mib_names *mib_names;
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int mib_cnt;
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u8 reg_mib_cnt;
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2022-05-17 15:13:32 +05:30
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bool supports_mii[KSZ_MAX_NUM_PORTS];
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bool supports_rmii[KSZ_MAX_NUM_PORTS];
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bool supports_rgmii[KSZ_MAX_NUM_PORTS];
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bool internal_phy[KSZ_MAX_NUM_PORTS];
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2022-05-17 15:13:26 +05:30
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};
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2019-08-06 15:06:08 +02:00
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struct ksz_port {
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2021-08-10 00:59:37 +02:00
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bool remove_tag; /* Remove Tag flag set, for ksz8795 only */
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2019-08-06 15:06:08 +02:00
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int stp_state;
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struct phy_device phydev;
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u32 on:1; /* port is not disabled by hardware */
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u32 phy:1; /* port has a PHY */
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u32 fiber:1; /* port is fiber */
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u32 sgmii:1; /* port is SGMII */
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u32 force:1;
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u32 read:1; /* read MIB counters in background */
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u32 freeze:1; /* MIB counter freeze is enabled */
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struct ksz_port_mib mib;
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2020-09-08 10:01:38 +02:00
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phy_interface_t interface;
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2022-03-08 14:58:57 +01:00
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u16 max_frame;
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2019-08-06 15:06:08 +02:00
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};
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struct ksz_device {
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struct dsa_switch *ds;
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struct ksz_platform_data *pdata;
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2022-05-17 15:13:26 +05:30
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const struct ksz_chip_data *info;
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2019-08-06 15:06:08 +02:00
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struct mutex dev_mutex; /* device access */
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2019-10-16 15:33:24 +02:00
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struct mutex regmap_mutex; /* regmap access */
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2019-08-06 15:06:08 +02:00
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struct mutex alu_mutex; /* ALU access */
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struct mutex vlan_mutex; /* vlan access */
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const struct ksz_dev_ops *dev_ops;
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struct device *dev;
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struct regmap *regmap[3];
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void *priv;
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struct gpio_desc *reset_gpio; /* Optional reset GPIO */
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/* chip specific data */
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u32 chip_id;
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int cpu_port; /* port connected to CPU */
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int phy_port_cnt;
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2020-09-08 10:01:38 +02:00
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phy_interface_t compat_interface;
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2019-08-06 15:06:08 +02:00
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bool synclko_125;
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2022-01-27 10:41:56 -06:00
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bool synclko_disable;
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2019-08-06 15:06:08 +02:00
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struct vlan_table *vlan_cache;
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struct ksz_port *ports;
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2020-03-10 12:58:59 -05:00
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struct delayed_work mib_read;
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2019-08-06 15:06:08 +02:00
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unsigned long mib_read_interval;
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u16 mirror_rx;
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u16 mirror_tx;
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u32 features; /* chip specific features */
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u16 port_mask;
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};
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2022-05-17 15:13:26 +05:30
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/* List of supported models */
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enum ksz_model {
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KSZ8795,
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KSZ8794,
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KSZ8765,
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KSZ8830,
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KSZ9477,
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KSZ9897,
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KSZ9893,
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KSZ9567,
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LAN9370,
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LAN9371,
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LAN9372,
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LAN9373,
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LAN9374,
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};
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enum ksz_chip_id {
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KSZ8795_CHIP_ID = 0x8795,
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KSZ8794_CHIP_ID = 0x8794,
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KSZ8765_CHIP_ID = 0x8765,
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KSZ8830_CHIP_ID = 0x8830,
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KSZ9477_CHIP_ID = 0x00947700,
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KSZ9897_CHIP_ID = 0x00989700,
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KSZ9893_CHIP_ID = 0x00989300,
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KSZ9567_CHIP_ID = 0x00956700,
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LAN9370_CHIP_ID = 0x00937000,
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LAN9371_CHIP_ID = 0x00937100,
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LAN9372_CHIP_ID = 0x00937200,
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LAN9373_CHIP_ID = 0x00937300,
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LAN9374_CHIP_ID = 0x00937400,
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};
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2019-08-06 15:06:08 +02:00
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struct alu_struct {
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/* entry 1 */
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u8 is_static:1;
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u8 is_src_filter:1;
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u8 is_dst_filter:1;
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u8 prio_age:3;
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u32 _reserv_0_1:23;
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u8 mstp:3;
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/* entry 2 */
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u8 is_override:1;
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u8 is_use_fid:1;
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u32 _reserv_1_1:23;
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u8 port_forward:7;
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/* entry 3 & 4*/
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u32 _reserv_2_1:9;
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u8 fid:7;
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u8 mac[ETH_ALEN];
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};
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struct ksz_dev_ops {
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u32 (*get_port_addr)(int port, int offset);
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void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
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void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
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void (*port_cleanup)(struct ksz_device *dev, int port);
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void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
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void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
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void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
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int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr,
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u8 *fid, u8 *src_port, u8 *timestamp,
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u16 *entries);
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int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr,
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struct alu_struct *alu);
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void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr,
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struct alu_struct *alu);
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void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
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u64 *cnt);
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void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
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u64 *dropped, u64 *cnt);
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2022-02-19 09:26:30 +01:00
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void (*r_mib_stat64)(struct ksz_device *dev, int port);
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2019-08-06 15:06:08 +02:00
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void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
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void (*port_init_cnt)(struct ksz_device *dev, int port);
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int (*shutdown)(struct ksz_device *dev);
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int (*detect)(struct ksz_device *dev);
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int (*init)(struct ksz_device *dev);
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void (*exit)(struct ksz_device *dev);
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};
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struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
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int ksz_switch_register(struct ksz_device *dev,
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const struct ksz_dev_ops *ops);
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void ksz_switch_remove(struct ksz_device *dev);
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2021-04-27 09:09:01 +02:00
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int ksz8_switch_register(struct ksz_device *dev);
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2019-08-06 15:06:08 +02:00
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int ksz9477_switch_register(struct ksz_device *dev);
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2019-06-26 01:43:46 +02:00
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2018-11-20 15:55:09 -08:00
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void ksz_update_port_member(struct ksz_device *dev, int port);
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2019-02-22 16:36:48 -08:00
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void ksz_init_mib_timer(struct ksz_device *dev);
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2022-04-26 14:40:48 +05:30
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void ksz_r_mib_stats64(struct ksz_device *dev, int port);
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void ksz_get_stats64(struct dsa_switch *ds, int port,
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struct rtnl_link_stats64 *s);
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2022-05-17 15:13:32 +05:30
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void ksz_phylink_get_caps(struct dsa_switch *ds, int port,
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struct phylink_config *config);
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2022-05-17 15:13:27 +05:30
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extern const struct ksz_chip_data ksz_switch_chips[];
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2018-11-20 15:55:09 -08:00
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/* Common DSA access functions */
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int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg);
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int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val);
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2020-07-02 18:17:23 +03:00
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void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode,
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phy_interface_t interface);
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2018-11-20 15:55:09 -08:00
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int ksz_sset_count(struct dsa_switch *ds, int port, int sset);
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2019-02-22 16:36:48 -08:00
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void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf);
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2018-11-20 15:55:09 -08:00
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int ksz_port_bridge_join(struct dsa_switch *ds, int port,
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2022-02-25 11:22:23 +02:00
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struct dsa_bridge bridge, bool *tx_fwd_offload,
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struct netlink_ext_ack *extack);
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2018-11-20 15:55:09 -08:00
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void ksz_port_bridge_leave(struct dsa_switch *ds, int port,
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net: dsa: keep the bridge_dev and bridge_num as part of the same structure
The main desire behind this is to provide coherent bridge information to
the fast path without locking.
For example, right now we set dp->bridge_dev and dp->bridge_num from
separate code paths, it is theoretically possible for a packet
transmission to read these two port properties consecutively and find a
bridge number which does not correspond with the bridge device.
Another desire is to start passing more complex bridge information to
dsa_switch_ops functions. For example, with FDB isolation, it is
expected that drivers will need to be passed the bridge which requested
an FDB/MDB entry to be offloaded, and along with that bridge_dev, the
associated bridge_num should be passed too, in case the driver might
want to implement an isolation scheme based on that number.
We already pass the {bridge_dev, bridge_num} pair to the TX forwarding
offload switch API, however we'd like to remove that and squash it into
the basic bridge join/leave API. So that means we need to pass this
pair to the bridge join/leave API.
During dsa_port_bridge_leave, first we unset dp->bridge_dev, then we
call the driver's .port_bridge_leave with what used to be our
dp->bridge_dev, but provided as an argument.
When bridge_dev and bridge_num get folded into a single structure, we
need to preserve this behavior in dsa_port_bridge_leave: we need a copy
of what used to be in dp->bridge.
Switch drivers check bridge membership by comparing dp->bridge_dev with
the provided bridge_dev, but now, if we provide the struct dsa_bridge as
a pointer, they cannot keep comparing dp->bridge to the provided
pointer, since this only points to an on-stack copy. To make this
obvious and prevent driver writers from forgetting and doing stupid
things, in this new API, the struct dsa_bridge is provided as a full
structure (not very large, contains an int and a pointer) instead of a
pointer. An explicit comparison function needs to be used to determine
bridge membership: dsa_port_offloads_bridge().
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Alvin Šipraga <alsi@bang-olufsen.dk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-12-06 18:57:56 +02:00
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struct dsa_bridge bridge);
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2022-04-24 16:58:31 +05:30
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void ksz_port_stp_state_set(struct dsa_switch *ds, int port,
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u8 state, int reg);
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2018-11-20 15:55:09 -08:00
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void ksz_port_fast_age(struct dsa_switch *ds, int port);
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int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb,
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void *data);
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2021-01-09 02:01:52 +02:00
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int ksz_port_mdb_add(struct dsa_switch *ds, int port,
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net: dsa: request drivers to perform FDB isolation
For DSA, to encourage drivers to perform FDB isolation simply means to
track which bridge does each FDB and MDB entry belong to. It then
becomes the driver responsibility to use something that makes the FDB
entry from one bridge not match the FDB lookup of ports from other
bridges.
The top-level functions where the bridge is determined are:
- dsa_port_fdb_{add,del}
- dsa_port_host_fdb_{add,del}
- dsa_port_mdb_{add,del}
- dsa_port_host_mdb_{add,del}
aka the pre-crosschip-notifier functions.
Changing the API to pass a reference to a bridge is not superfluous, and
looking at the passed bridge argument is not the same as having the
driver look at dsa_to_port(ds, port)->bridge from the ->port_fdb_add()
method.
DSA installs FDB and MDB entries on shared (CPU and DSA) ports as well,
and those do not have any dp->bridge information to retrieve, because
they are not in any bridge - they are merely the pipes that serve the
user ports that are in one or multiple bridges.
The struct dsa_bridge associated with each FDB/MDB entry is encapsulated
in a larger "struct dsa_db" database. Although only databases associated
to bridges are notified for now, this API will be the starting point for
implementing IFF_UNICAST_FLT in DSA. There, the idea is to install FDB
entries on the CPU port which belong to the corresponding user port's
port database. These are supposed to match only when the port is
standalone.
It is better to introduce the API in its expected final form than to
introduce it for bridges first, then to have to change drivers which may
have made one or more assumptions.
Drivers can use the provided bridge.num, but they can also use a
different numbering scheme that is more convenient.
DSA must perform refcounting on the CPU and DSA ports by also taking
into account the bridge number. So if two bridges request the same local
address, DSA must notify the driver twice, once for each bridge.
In fact, if the driver supports FDB isolation, DSA must perform
refcounting per bridge, but if the driver doesn't, DSA must refcount
host addresses across all bridges, otherwise it would be telling the
driver to delete an FDB entry for a bridge and the driver would delete
it for all bridges. So introduce a bool fdb_isolation in drivers which
would make all bridge databases passed to the cross-chip notifier have
the same number (0). This makes dsa_mac_addr_find() -> dsa_db_equal()
say that all bridge databases are the same database - which is
essentially the legacy behavior.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-02-25 11:22:22 +02:00
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const struct switchdev_obj_port_mdb *mdb,
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struct dsa_db db);
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2018-11-20 15:55:09 -08:00
|
|
|
int ksz_port_mdb_del(struct dsa_switch *ds, int port,
|
net: dsa: request drivers to perform FDB isolation
For DSA, to encourage drivers to perform FDB isolation simply means to
track which bridge does each FDB and MDB entry belong to. It then
becomes the driver responsibility to use something that makes the FDB
entry from one bridge not match the FDB lookup of ports from other
bridges.
The top-level functions where the bridge is determined are:
- dsa_port_fdb_{add,del}
- dsa_port_host_fdb_{add,del}
- dsa_port_mdb_{add,del}
- dsa_port_host_mdb_{add,del}
aka the pre-crosschip-notifier functions.
Changing the API to pass a reference to a bridge is not superfluous, and
looking at the passed bridge argument is not the same as having the
driver look at dsa_to_port(ds, port)->bridge from the ->port_fdb_add()
method.
DSA installs FDB and MDB entries on shared (CPU and DSA) ports as well,
and those do not have any dp->bridge information to retrieve, because
they are not in any bridge - they are merely the pipes that serve the
user ports that are in one or multiple bridges.
The struct dsa_bridge associated with each FDB/MDB entry is encapsulated
in a larger "struct dsa_db" database. Although only databases associated
to bridges are notified for now, this API will be the starting point for
implementing IFF_UNICAST_FLT in DSA. There, the idea is to install FDB
entries on the CPU port which belong to the corresponding user port's
port database. These are supposed to match only when the port is
standalone.
It is better to introduce the API in its expected final form than to
introduce it for bridges first, then to have to change drivers which may
have made one or more assumptions.
Drivers can use the provided bridge.num, but they can also use a
different numbering scheme that is more convenient.
DSA must perform refcounting on the CPU and DSA ports by also taking
into account the bridge number. So if two bridges request the same local
address, DSA must notify the driver twice, once for each bridge.
In fact, if the driver supports FDB isolation, DSA must perform
refcounting per bridge, but if the driver doesn't, DSA must refcount
host addresses across all bridges, otherwise it would be telling the
driver to delete an FDB entry for a bridge and the driver would delete
it for all bridges. So introduce a bool fdb_isolation in drivers which
would make all bridge databases passed to the cross-chip notifier have
the same number (0). This makes dsa_mac_addr_find() -> dsa_db_equal()
say that all bridge databases are the same database - which is
essentially the legacy behavior.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-02-25 11:22:22 +02:00
|
|
|
const struct switchdev_obj_port_mdb *mdb,
|
|
|
|
|
struct dsa_db db);
|
2018-11-20 15:55:09 -08:00
|
|
|
int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);
|
2022-05-17 15:13:30 +05:30
|
|
|
void ksz_get_strings(struct dsa_switch *ds, int port,
|
|
|
|
|
u32 stringset, uint8_t *buf);
|
2018-11-20 15:55:09 -08:00
|
|
|
|
|
|
|
|
/* Common register access functions */
|
|
|
|
|
|
|
|
|
|
static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
|
|
|
|
|
{
|
2019-06-26 01:43:46 +02:00
|
|
|
unsigned int value;
|
|
|
|
|
int ret = regmap_read(dev->regmap[0], reg, &value);
|
2018-11-20 15:55:09 -08:00
|
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|
2019-06-26 01:43:46 +02:00
|
|
|
*val = value;
|
2018-11-20 15:55:09 -08:00
|
|
|
return ret;
|
|
|
|
|
}
|
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|
static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
|
|
|
|
|
{
|
2019-06-26 01:43:46 +02:00
|
|
|
unsigned int value;
|
|
|
|
|
int ret = regmap_read(dev->regmap[1], reg, &value);
|
2018-11-20 15:55:09 -08:00
|
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|
2019-06-26 01:43:46 +02:00
|
|
|
*val = value;
|
2018-11-20 15:55:09 -08:00
|
|
|
return ret;
|
|
|
|
|
}
|
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|
|
static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
|
|
|
|
|
{
|
2019-06-26 01:43:46 +02:00
|
|
|
unsigned int value;
|
|
|
|
|
int ret = regmap_read(dev->regmap[2], reg, &value);
|
2018-11-20 15:55:09 -08:00
|
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|
2019-06-26 01:43:46 +02:00
|
|
|
*val = value;
|
2018-11-20 15:55:09 -08:00
|
|
|
return ret;
|
|
|
|
|
}
|
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|
|
2019-07-29 19:49:47 +02:00
|
|
|
static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
|
|
|
|
|
{
|
|
|
|
|
u32 value[2];
|
|
|
|
|
int ret;
|
|
|
|
|
|
|
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|
|
ret = regmap_bulk_read(dev->regmap[2], reg, value, 2);
|
2021-08-10 00:59:12 +02:00
|
|
|
if (!ret)
|
|
|
|
|
*val = (u64)value[0] << 32 | value[1];
|
2019-07-29 19:49:47 +02:00
|
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|
|
|
|
|
return ret;
|
|
|
|
|
}
|
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|
2018-11-20 15:55:09 -08:00
|
|
|
static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
|
|
|
|
|
{
|
2019-06-26 01:43:46 +02:00
|
|
|
return regmap_write(dev->regmap[0], reg, value);
|
2018-11-20 15:55:09 -08:00
|
|
|
}
|
|
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|
|
|
|
|
|
|
static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
|
|
|
|
|
{
|
2019-06-26 01:43:46 +02:00
|
|
|
return regmap_write(dev->regmap[1], reg, value);
|
2018-11-20 15:55:09 -08:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
|
|
|
|
|
{
|
2019-06-26 01:43:46 +02:00
|
|
|
return regmap_write(dev->regmap[2], reg, value);
|
2018-11-20 15:55:09 -08:00
|
|
|
}
|
|
|
|
|
|
2019-07-29 19:49:47 +02:00
|
|
|
static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
|
|
|
|
|
{
|
|
|
|
|
u32 val[2];
|
|
|
|
|
|
|
|
|
|
/* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
|
|
|
|
|
value = swab64(value);
|
|
|
|
|
val[0] = swab32(value & 0xffffffffULL);
|
|
|
|
|
val[1] = swab32(value >> 32ULL);
|
|
|
|
|
|
|
|
|
|
return regmap_bulk_write(dev->regmap[2], reg, val, 2);
|
|
|
|
|
}
|
|
|
|
|
|
2018-11-20 15:55:09 -08:00
|
|
|
static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
|
|
|
|
|
u8 *data)
|
|
|
|
|
{
|
|
|
|
|
ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
|
|
|
|
|
u16 *data)
|
|
|
|
|
{
|
|
|
|
|
ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
|
|
|
|
|
u32 *data)
|
|
|
|
|
{
|
|
|
|
|
ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
|
|
|
|
|
u8 data)
|
|
|
|
|
{
|
|
|
|
|
ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
|
|
|
|
|
u16 data)
|
|
|
|
|
{
|
|
|
|
|
ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
|
|
|
|
|
u32 data)
|
|
|
|
|
{
|
|
|
|
|
ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
|
|
|
|
|
}
|
|
|
|
|
|
2019-10-16 15:33:24 +02:00
|
|
|
static inline void ksz_regmap_lock(void *__mtx)
|
|
|
|
|
{
|
|
|
|
|
struct mutex *mtx = __mtx;
|
|
|
|
|
mutex_lock(mtx);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void ksz_regmap_unlock(void *__mtx)
|
|
|
|
|
{
|
|
|
|
|
struct mutex *mtx = __mtx;
|
|
|
|
|
mutex_unlock(mtx);
|
|
|
|
|
}
|
|
|
|
|
|
2022-04-24 16:58:31 +05:30
|
|
|
/* STP State Defines */
|
|
|
|
|
#define PORT_TX_ENABLE BIT(2)
|
|
|
|
|
#define PORT_RX_ENABLE BIT(1)
|
|
|
|
|
#define PORT_LEARN_DISABLE BIT(0)
|
|
|
|
|
|
2019-06-26 01:43:47 +02:00
|
|
|
/* Regmap tables generation */
|
|
|
|
|
#define KSZ_SPI_OP_RD 3
|
|
|
|
|
#define KSZ_SPI_OP_WR 2
|
|
|
|
|
|
2019-09-10 08:18:34 -05:00
|
|
|
#define swabnot_used(x) 0
|
|
|
|
|
|
2019-06-26 01:43:47 +02:00
|
|
|
#define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \
|
|
|
|
|
swab##swp((opcode) << ((regbits) + (regpad)))
|
|
|
|
|
|
|
|
|
|
#define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \
|
|
|
|
|
{ \
|
2019-08-29 09:14:41 -05:00
|
|
|
.name = #width, \
|
2019-06-26 01:43:47 +02:00
|
|
|
.val_bits = (width), \
|
2019-09-26 00:08:42 +02:00
|
|
|
.reg_stride = 1, \
|
2019-06-26 01:43:47 +02:00
|
|
|
.reg_bits = (regbits) + (regalign), \
|
|
|
|
|
.pad_bits = (regpad), \
|
|
|
|
|
.max_register = BIT(regbits) - 1, \
|
|
|
|
|
.cache_type = REGCACHE_NONE, \
|
|
|
|
|
.read_flag_mask = \
|
|
|
|
|
KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \
|
|
|
|
|
regbits, regpad), \
|
|
|
|
|
.write_flag_mask = \
|
|
|
|
|
KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \
|
|
|
|
|
regbits, regpad), \
|
2019-10-16 15:33:24 +02:00
|
|
|
.lock = ksz_regmap_lock, \
|
|
|
|
|
.unlock = ksz_regmap_unlock, \
|
2019-06-26 01:43:47 +02:00
|
|
|
.reg_format_endian = REGMAP_ENDIAN_BIG, \
|
|
|
|
|
.val_format_endian = REGMAP_ENDIAN_BIG \
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \
|
|
|
|
|
static const struct regmap_config ksz##_regmap_config[] = { \
|
|
|
|
|
KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
|
|
|
|
|
KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
|
|
|
|
|
KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \
|
|
|
|
|
}
|
|
|
|
|
|
2018-11-20 15:55:09 -08:00
|
|
|
#endif
|