2018-11-29 13:56:06 +08:00
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/*
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* Copyright 2019 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __AMDGPU_SMU_H__
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#define __AMDGPU_SMU_H__
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#include "amdgpu.h"
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2018-12-19 15:12:10 +08:00
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enum smu_message_type
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{
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SMU_MSG_TestMessage = 0,
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SMU_MSG_GetSmuVersion,
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SMU_MSG_GetDriverIfVersion,
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SMU_MSG_SetAllowedFeaturesMaskLow,
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SMU_MSG_SetAllowedFeaturesMaskHigh,
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SMU_MSG_EnableAllSmuFeatures,
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SMU_MSG_DisableAllSmuFeatures,
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SMU_MSG_EnableSmuFeaturesLow,
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SMU_MSG_EnableSmuFeaturesHigh,
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SMU_MSG_DisableSmuFeaturesLow,
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SMU_MSG_DisableSmuFeaturesHigh,
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SMU_MSG_GetEnabledSmuFeaturesLow,
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SMU_MSG_GetEnabledSmuFeaturesHigh,
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SMU_MSG_SetWorkloadMask,
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SMU_MSG_SetPptLimit,
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SMU_MSG_SetDriverDramAddrHigh,
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SMU_MSG_SetDriverDramAddrLow,
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SMU_MSG_SetToolsDramAddrHigh,
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SMU_MSG_SetToolsDramAddrLow,
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SMU_MSG_TransferTableSmu2Dram,
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SMU_MSG_TransferTableDram2Smu,
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SMU_MSG_UseDefaultPPTable,
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SMU_MSG_UseBackupPPTable,
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SMU_MSG_RunBtc,
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SMU_MSG_RequestI2CBus,
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SMU_MSG_ReleaseI2CBus,
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SMU_MSG_SetFloorSocVoltage,
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SMU_MSG_SoftReset,
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SMU_MSG_StartBacoMonitor,
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SMU_MSG_CancelBacoMonitor,
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SMU_MSG_EnterBaco,
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SMU_MSG_SetSoftMinByFreq,
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SMU_MSG_SetSoftMaxByFreq,
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SMU_MSG_SetHardMinByFreq,
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SMU_MSG_SetHardMaxByFreq,
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SMU_MSG_GetMinDpmFreq,
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SMU_MSG_GetMaxDpmFreq,
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SMU_MSG_GetDpmFreqByIndex,
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SMU_MSG_GetDpmClockFreq,
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SMU_MSG_GetSsVoltageByDpm,
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SMU_MSG_SetMemoryChannelConfig,
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SMU_MSG_SetGeminiMode,
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SMU_MSG_SetGeminiApertureHigh,
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SMU_MSG_SetGeminiApertureLow,
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SMU_MSG_SetMinLinkDpmByIndex,
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SMU_MSG_OverridePcieParameters,
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SMU_MSG_OverDriveSetPercentage,
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SMU_MSG_SetMinDeepSleepDcefclk,
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SMU_MSG_ReenableAcDcInterrupt,
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SMU_MSG_NotifyPowerSource,
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SMU_MSG_SetUclkFastSwitch,
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SMU_MSG_SetUclkDownHyst,
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SMU_MSG_GfxDeviceDriverReset,
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SMU_MSG_GetCurrentRpm,
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SMU_MSG_SetVideoFps,
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SMU_MSG_SetTjMax,
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SMU_MSG_SetFanTemperatureTarget,
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SMU_MSG_PrepareMp1ForUnload,
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SMU_MSG_DramLogSetDramAddrHigh,
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SMU_MSG_DramLogSetDramAddrLow,
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SMU_MSG_DramLogSetDramSize,
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SMU_MSG_SetFanMaxRpm,
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SMU_MSG_SetFanMinPwm,
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SMU_MSG_ConfigureGfxDidt,
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SMU_MSG_NumOfDisplays,
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SMU_MSG_RemoveMargins,
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SMU_MSG_ReadSerialNumTop32,
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SMU_MSG_ReadSerialNumBottom32,
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SMU_MSG_SetSystemVirtualDramAddrHigh,
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SMU_MSG_SetSystemVirtualDramAddrLow,
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SMU_MSG_WaflTest,
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SMU_MSG_SetFclkGfxClkRatio,
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SMU_MSG_AllowGfxOff,
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SMU_MSG_DisallowGfxOff,
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SMU_MSG_GetPptLimit,
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SMU_MSG_GetDcModeMaxDpmFreq,
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SMU_MSG_GetDebugData,
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SMU_MSG_SetXgmiMode,
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SMU_MSG_RunAfllBtc,
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SMU_MSG_ExitBaco,
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SMU_MSG_PrepareMp1ForReset,
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SMU_MSG_PrepareMp1ForShutdown,
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SMU_MSG_SetMGpuFanBoostLimitRpm,
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SMU_MSG_GetAVFSVoltageByDpm,
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SMU_MSG_MAX_COUNT,
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};
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2018-12-17 16:47:49 +08:00
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enum smu_memory_pool_size
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{
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SMU_MEMORY_POOL_SIZE_ZERO = 0,
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SMU_MEMORY_POOL_SIZE_256_MB = 0x10000000,
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SMU_MEMORY_POOL_SIZE_512_MB = 0x20000000,
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SMU_MEMORY_POOL_SIZE_1_GB = 0x40000000,
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SMU_MEMORY_POOL_SIZE_2_GB = 0x80000000,
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};
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2018-12-14 17:43:57 +08:00
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#define SMU_TABLE_INIT(tables, table_id, s, a, d) \
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do { \
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tables[table_id].size = s; \
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tables[table_id].align = a; \
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tables[table_id].domain = d; \
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} while (0)
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struct smu_table {
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uint64_t size;
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uint32_t align;
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uint8_t domain;
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uint64_t mc_address;
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void *cpu_addr;
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struct amdgpu_bo *bo;
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2018-12-15 15:36:58 +08:00
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};
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2018-12-14 17:43:57 +08:00
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2018-12-15 15:36:58 +08:00
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struct smu_bios_boot_up_values
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{
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uint32_t revision;
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uint32_t gfxclk;
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uint32_t uclk;
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uint32_t socclk;
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uint32_t dcefclk;
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uint16_t vddc;
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uint16_t vddci;
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uint16_t mvddc;
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uint16_t vdd_gfx;
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uint8_t cooling_id;
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uint32_t pp_table_id;
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2018-12-14 17:43:57 +08:00
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};
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2018-12-12 20:47:24 +08:00
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struct smu_table_context
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{
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void *power_play_table;
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uint32_t power_play_table_size;
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2018-12-15 15:36:58 +08:00
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2018-12-25 16:34:39 +08:00
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void *max_sustainable_clocks;
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2018-12-15 15:36:58 +08:00
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struct smu_bios_boot_up_values boot_values;
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2018-12-18 22:56:48 +08:00
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void *driver_pptable;
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2018-12-14 17:43:57 +08:00
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struct smu_table *tables;
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uint32_t table_count;
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2018-12-17 16:47:49 +08:00
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struct smu_table memory_pool;
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2019-01-04 16:23:23 +08:00
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uint16_t software_shutdown_temp;
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2019-01-04 16:00:48 +08:00
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uint8_t thermal_controller_type;
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2018-12-12 20:47:24 +08:00
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};
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2018-12-17 19:48:59 +08:00
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struct smu_dpm_context {
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void *dpm_context;
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uint32_t dpm_context_size;
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};
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2018-12-15 10:50:03 +08:00
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struct smu_power_context {
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void *power_context;
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uint32_t power_context_size;
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};
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2018-12-26 17:36:25 +08:00
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#define SMU_FEATURE_MAX (64)
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struct smu_feature
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{
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uint32_t feature_num;
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DECLARE_BITMAP(supported, SMU_FEATURE_MAX);
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DECLARE_BITMAP(allowed, SMU_FEATURE_MAX);
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DECLARE_BITMAP(enabled, SMU_FEATURE_MAX);
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};
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2018-11-29 13:56:06 +08:00
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struct smu_context
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{
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struct amdgpu_device *adev;
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const struct smu_funcs *funcs;
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2018-12-18 20:23:17 +08:00
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const struct pptable_funcs *ppt_funcs;
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2018-11-29 13:56:06 +08:00
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struct mutex mutex;
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2018-12-17 16:47:49 +08:00
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uint64_t pool_size;
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2018-12-12 20:47:24 +08:00
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struct smu_table_context smu_table;
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2018-12-17 19:48:59 +08:00
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struct smu_dpm_context smu_dpm;
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2018-12-15 10:50:03 +08:00
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struct smu_power_context smu_power;
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2018-12-26 17:36:25 +08:00
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struct smu_feature smu_feature;
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2018-12-24 19:49:38 +08:00
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uint32_t pstate_sclk;
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uint32_t pstate_mclk;
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2018-12-25 14:44:25 +08:00
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uint32_t power_limit;
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uint32_t default_power_limit;
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2018-11-29 13:56:06 +08:00
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};
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2018-12-18 20:23:17 +08:00
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struct pptable_funcs {
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2018-12-26 11:07:57 +08:00
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int (*alloc_dpm_context)(struct smu_context *smu);
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2018-12-18 20:23:17 +08:00
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int (*store_powerplay_table)(struct smu_context *smu);
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2018-12-14 16:18:21 +08:00
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int (*check_powerplay_table)(struct smu_context *smu);
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2018-12-20 23:06:08 +08:00
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int (*append_powerplay_table)(struct smu_context *smu);
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2018-12-19 15:46:24 +08:00
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int (*get_smu_msg_index)(struct smu_context *smu, uint32_t index);
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2018-12-24 18:17:15 +08:00
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int (*run_afll_btc)(struct smu_context *smu);
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2018-12-26 17:36:25 +08:00
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int (*get_unallowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
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2018-12-20 20:31:55 +08:00
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int (*set_default_dpm_table)(struct smu_context *smu);
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2018-12-24 19:49:38 +08:00
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int (*populate_umd_state_clk)(struct smu_context *smu);
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2019-01-15 10:56:55 +08:00
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int (*print_clk_levels)(struct smu_context *smu, enum pp_clock_type type, char *buf);
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2018-12-18 20:23:17 +08:00
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};
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2018-11-29 13:56:06 +08:00
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struct smu_funcs
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{
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int (*init_microcode)(struct smu_context *smu);
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2018-12-04 17:42:08 +08:00
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int (*init_smc_tables)(struct smu_context *smu);
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2018-12-14 17:43:57 +08:00
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int (*fini_smc_tables)(struct smu_context *smu);
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2018-12-04 18:13:19 +08:00
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int (*init_power)(struct smu_context *smu);
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2018-12-15 10:50:03 +08:00
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int (*fini_power)(struct smu_context *smu);
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2018-12-02 18:12:10 +08:00
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int (*load_microcode)(struct smu_context *smu);
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2018-12-02 18:25:00 +08:00
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int (*check_fw_status)(struct smu_context *smu);
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2018-12-04 17:14:41 +08:00
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int (*read_pptable_from_vbios)(struct smu_context *smu);
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2018-12-04 18:24:58 +08:00
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int (*get_vbios_bootup_values)(struct smu_context *smu);
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2018-12-17 14:56:40 +08:00
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int (*get_clk_info_from_vbios)(struct smu_context *smu);
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2018-12-04 18:41:58 +08:00
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int (*check_pptable)(struct smu_context *smu);
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2018-12-04 21:34:43 +08:00
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int (*parse_pptable)(struct smu_context *smu);
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2018-12-04 21:42:41 +08:00
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int (*populate_smc_pptable)(struct smu_context *smu);
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2018-12-04 21:51:23 +08:00
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int (*check_fw_version)(struct smu_context *smu);
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2018-12-04 21:57:05 +08:00
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int (*write_pptable)(struct smu_context *smu);
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2018-12-04 22:00:22 +08:00
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int (*set_min_dcef_deep_sleep)(struct smu_context *smu);
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2018-12-04 22:04:24 +08:00
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int (*set_tool_table_location)(struct smu_context *smu);
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2018-12-05 11:45:34 +08:00
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int (*notify_memory_pool_location)(struct smu_context *smu);
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2019-01-10 23:58:08 +08:00
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int (*write_watermarks_table)(struct smu_context *smu);
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int (*set_last_dcef_min_deep_sleep_clk)(struct smu_context *smu);
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int (*system_features_control)(struct smu_context *smu, bool en);
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2018-12-11 17:16:10 +08:00
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int (*send_smc_msg)(struct smu_context *smu, uint16_t msg);
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int (*send_smc_msg_with_param)(struct smu_context *smu, uint16_t msg, uint32_t param);
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2018-12-20 20:09:00 +08:00
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int (*read_smc_arg)(struct smu_context *smu, uint32_t *arg);
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2018-12-24 15:02:50 +08:00
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int (*init_display)(struct smu_context *smu);
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2018-12-26 17:36:25 +08:00
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int (*set_allowed_mask)(struct smu_context *smu);
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int (*get_enabled_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
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int (*enable_all_mask)(struct smu_context *smu);
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int (*disable_all_mask)(struct smu_context *smu);
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2018-12-26 16:14:55 +08:00
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int (*notify_display_change)(struct smu_context *smu);
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2018-12-25 14:44:25 +08:00
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int (*get_power_limit)(struct smu_context *smu);
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2019-01-15 10:54:45 +08:00
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int (*get_current_clk_freq)(struct smu_context *smu, uint32_t clk_id, uint32_t *value);
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2018-12-25 16:34:39 +08:00
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int (*init_max_sustainable_clocks)(struct smu_context *smu);
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2019-01-04 16:00:48 +08:00
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int (*start_thermal_control)(struct smu_context *smu);
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2018-11-29 13:56:06 +08:00
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};
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#define smu_init_microcode(smu) \
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((smu)->funcs->init_microcode ? (smu)->funcs->init_microcode((smu)) : 0)
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2018-12-04 17:42:08 +08:00
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#define smu_init_smc_tables(smu) \
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((smu)->funcs->init_smc_tables ? (smu)->funcs->init_smc_tables((smu)) : 0)
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2018-12-14 17:43:57 +08:00
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#define smu_fini_smc_tables(smu) \
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((smu)->funcs->fini_smc_tables ? (smu)->funcs->fini_smc_tables((smu)) : 0)
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2018-12-04 18:13:19 +08:00
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#define smu_init_power(smu) \
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((smu)->funcs->init_power ? (smu)->funcs->init_power((smu)) : 0)
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2018-12-15 10:50:03 +08:00
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#define smu_fini_power(smu) \
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((smu)->funcs->fini_power ? (smu)->funcs->fini_power((smu)) : 0)
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2018-12-02 18:12:10 +08:00
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#define smu_load_microcode(smu) \
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((smu)->funcs->load_microcode ? (smu)->funcs->load_microcode((smu)) : 0)
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2018-12-02 18:25:00 +08:00
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#define smu_check_fw_status(smu) \
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((smu)->funcs->check_fw_status ? (smu)->funcs->check_fw_status((smu)) : 0)
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2018-12-04 17:14:41 +08:00
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#define smu_read_pptable_from_vbios(smu) \
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((smu)->funcs->read_pptable_from_vbios ? (smu)->funcs->read_pptable_from_vbios((smu)) : 0)
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2018-12-04 18:24:58 +08:00
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#define smu_get_vbios_bootup_values(smu) \
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((smu)->funcs->get_vbios_bootup_values ? (smu)->funcs->get_vbios_bootup_values((smu)) : 0)
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2018-12-17 14:56:40 +08:00
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#define smu_get_clk_info_from_vbios(smu) \
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((smu)->funcs->get_clk_info_from_vbios ? (smu)->funcs->get_clk_info_from_vbios((smu)) : 0)
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2018-12-04 18:41:58 +08:00
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#define smu_check_pptable(smu) \
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((smu)->funcs->check_pptable ? (smu)->funcs->check_pptable((smu)) : 0)
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2018-12-04 21:34:43 +08:00
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#define smu_parse_pptable(smu) \
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((smu)->funcs->parse_pptable ? (smu)->funcs->parse_pptable((smu)) : 0)
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2018-12-04 21:42:41 +08:00
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#define smu_populate_smc_pptable(smu) \
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((smu)->funcs->populate_smc_pptable ? (smu)->funcs->populate_smc_pptable((smu)) : 0)
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2018-12-04 21:51:23 +08:00
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#define smu_check_fw_version(smu) \
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((smu)->funcs->check_fw_version ? (smu)->funcs->check_fw_version((smu)) : 0)
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2018-12-04 21:57:05 +08:00
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#define smu_write_pptable(smu) \
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((smu)->funcs->write_pptable ? (smu)->funcs->write_pptable((smu)) : 0)
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2018-12-04 22:00:22 +08:00
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#define smu_set_min_dcef_deep_sleep(smu) \
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((smu)->funcs->set_min_dcef_deep_sleep ? (smu)->funcs->set_min_dcef_deep_sleep((smu)) : 0)
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2018-12-04 22:04:24 +08:00
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#define smu_set_tool_table_location(smu) \
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((smu)->funcs->set_tool_table_location ? (smu)->funcs->set_tool_table_location((smu)) : 0)
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2018-12-05 11:45:34 +08:00
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#define smu_notify_memory_pool_location(smu) \
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((smu)->funcs->notify_memory_pool_location ? (smu)->funcs->notify_memory_pool_location((smu)) : 0)
|
2019-01-10 23:58:08 +08:00
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#define smu_write_watermarks_table(smu) \
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((smu)->funcs->write_watermarks_table ? (smu)->funcs->write_watermarks_table((smu)) : 0)
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#define smu_set_last_dcef_min_deep_sleep_clk(smu) \
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((smu)->funcs->set_last_dcef_min_deep_sleep_clk ? (smu)->funcs->set_last_dcef_min_deep_sleep_clk((smu)) : 0)
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#define smu_system_features_control(smu, en) \
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((smu)->funcs->system_features_control ? (smu)->funcs->system_features_control((smu), (en)) : 0)
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2018-12-25 16:34:39 +08:00
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#define smu_init_max_sustainable_clocks(smu) \
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((smu)->funcs->init_max_sustainable_clocks ? (smu)->funcs->init_max_sustainable_clocks((smu)) : 0)
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2018-12-11 17:16:10 +08:00
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#define smu_send_smc_msg(smu, msg) \
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((smu)->funcs->send_smc_msg? (smu)->funcs->send_smc_msg((smu), (msg)) : 0)
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#define smu_send_smc_msg_with_param(smu, msg, param) \
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((smu)->funcs->send_smc_msg_with_param? (smu)->funcs->send_smc_msg_with_param((smu), (msg), (param)) : 0)
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2018-12-20 20:09:00 +08:00
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#define smu_read_smc_arg(smu, arg) \
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((smu)->funcs->read_smc_arg? (smu)->funcs->read_smc_arg((smu), (arg)) : 0)
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2018-12-26 11:07:57 +08:00
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#define smu_alloc_dpm_context(smu) \
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((smu)->ppt_funcs->alloc_dpm_context ? (smu)->ppt_funcs->alloc_dpm_context((smu)) : 0)
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2018-12-24 15:02:50 +08:00
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#define smu_init_display(smu) \
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((smu)->funcs->init_display ? (smu)->funcs->init_display((smu)) : 0)
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2018-12-26 17:36:25 +08:00
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#define smu_feature_set_allowed_mask(smu) \
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((smu)->funcs->set_allowed_mask? (smu)->funcs->set_allowed_mask((smu)) : 0)
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#define smu_feature_get_enabled_mask(smu, mask, num) \
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((smu)->funcs->get_enabled_mask? (smu)->funcs->get_enabled_mask((smu), (mask), (num)) : 0)
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#define smu_feature_enable_all(smu) \
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((smu)->funcs->enable_all_mask? (smu)->funcs->enable_all_mask((smu)) : 0)
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#define smu_feature_disable_all(smu) \
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((smu)->funcs->disable_all_mask? (smu)->funcs->disable_all_mask((smu)) : 0)
|
2018-12-26 16:14:55 +08:00
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#define smu_notify_display_change(smu) \
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((smu)->funcs->notify_display_change? (smu)->funcs->notify_display_change((smu)) : 0)
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2018-12-18 22:56:48 +08:00
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#define smu_store_powerplay_table(smu) \
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((smu)->ppt_funcs->store_powerplay_table ? (smu)->ppt_funcs->store_powerplay_table((smu)) : 0)
|
2018-12-14 16:18:21 +08:00
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|
#define smu_check_powerplay_table(smu) \
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|
((smu)->ppt_funcs->check_powerplay_table ? (smu)->ppt_funcs->check_powerplay_table((smu)) : 0)
|
2018-12-20 23:06:08 +08:00
|
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|
#define smu_append_powerplay_table(smu) \
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((smu)->ppt_funcs->append_powerplay_table ? (smu)->ppt_funcs->append_powerplay_table((smu)) : 0)
|
2018-12-20 20:31:55 +08:00
|
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|
#define smu_set_default_dpm_table(smu) \
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|
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|
((smu)->ppt_funcs->set_default_dpm_table ? (smu)->ppt_funcs->set_default_dpm_table((smu)) : 0)
|
2018-12-24 19:49:38 +08:00
|
|
|
#define smu_populate_umd_state_clk(smu) \
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|
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|
((smu)->ppt_funcs->populate_umd_state_clk ? (smu)->ppt_funcs->populate_umd_state_clk((smu)) : 0)
|
2018-12-25 14:44:25 +08:00
|
|
|
#define smu_get_power_limit(smu) \
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|
|
|
|
((smu)->funcs->get_power_limit? (smu)->funcs->get_power_limit((smu)) : 0)
|
2019-01-15 10:54:45 +08:00
|
|
|
#define smu_get_current_clk_freq(smu, clk_id, value) \
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|
|
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|
((smu)->funcs->get_current_clk_freq? (smu)->funcs->get_current_clk_freq((smu), (clk_id), (value)) : 0)
|
2019-01-15 10:56:55 +08:00
|
|
|
#define smu_print_clk_levels(smu, type, buf) \
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|
|
|
((smu)->ppt_funcs->print_clk_levels ? (smu)->ppt_funcs->print_clk_levels((smu), (type), (buf)) : 0)
|
2019-01-04 16:00:48 +08:00
|
|
|
#define smu_start_thermal_control(smu) \
|
|
|
|
|
((smu)->funcs->start_thermal_control? (smu)->funcs->start_thermal_control((smu)) : 0)
|
2018-11-29 13:56:06 +08:00
|
|
|
|
2018-12-19 15:46:24 +08:00
|
|
|
#define smu_msg_get_index(smu, msg) \
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|
|
|
|
((smu)->ppt_funcs? ((smu)->ppt_funcs->get_smu_msg_index? (smu)->ppt_funcs->get_smu_msg_index((smu), (msg)) : -EINVAL) : -EINVAL)
|
2018-12-24 18:17:15 +08:00
|
|
|
#define smu_run_afll_btc(smu) \
|
|
|
|
|
((smu)->ppt_funcs? ((smu)->ppt_funcs->run_afll_btc? (smu)->ppt_funcs->run_afll_btc((smu)) : 0) : 0)
|
2018-12-26 17:36:25 +08:00
|
|
|
#define smu_get_unallowed_feature_mask(smu, feature_mask, num) \
|
|
|
|
|
((smu)->ppt_funcs? ((smu)->ppt_funcs->get_unallowed_feature_mask? (smu)->ppt_funcs->get_unallowed_feature_mask((smu), (feature_mask), (num)) : 0) : 0)
|
2018-12-19 15:46:24 +08:00
|
|
|
|
2018-12-12 21:06:59 +08:00
|
|
|
extern int smu_get_atom_data_table(struct smu_context *smu, uint32_t table,
|
|
|
|
|
uint16_t *size, uint8_t *frev, uint8_t *crev,
|
|
|
|
|
uint8_t **addr);
|
|
|
|
|
|
2018-11-29 13:56:06 +08:00
|
|
|
extern const struct amd_ip_funcs smu_ip_funcs;
|
|
|
|
|
|
2018-11-29 14:01:47 +08:00
|
|
|
extern const struct amdgpu_ip_block_version smu_v11_0_ip_block;
|
2018-12-26 17:36:25 +08:00
|
|
|
extern int smu_feature_init_dpm(struct smu_context *smu);
|
2018-11-29 14:01:47 +08:00
|
|
|
|
2018-12-26 16:13:09 +08:00
|
|
|
extern int smu_feature_is_enabled(struct smu_context *smu, int feature_id);
|
|
|
|
|
extern int smu_feature_set_enabled(struct smu_context *smu, int feature_id, bool enable);
|
|
|
|
|
extern int smu_feature_is_supported(struct smu_context *smu, int feature_id);
|
|
|
|
|
extern int smu_feature_set_supported(struct smu_context *smu, int feature_id, bool enable);
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|
|
|
|
|
2018-11-29 13:56:06 +08:00
|
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|
#endif
|
