linux/arch/mips/include/asm/sn/irq_alloc.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ASM_SN_IRQ_ALLOC_H
#define __ASM_SN_IRQ_ALLOC_H

struct irq_alloc_info {
	void *ctrl;
	nasid_t nasid;
	int pin;
};

#endif /* __ASM_SN_IRQ_ALLOC_H */
MIPS: SGI-IP27: abstract chipset irq from bridge Bridge ASIC is widely used in different SGI systems, but the connected chipset is either HUB, HEART or BEDROCK. This commit switches to irq domain hierarchy for hub and bridge interrupts to get bridge setup out of hub interrupt code. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> [paul.burton@mips.com: Resolve conflict with commit 69a07a41d908 ("MIPS: SGI-IP27: rework HUB interrupts").] Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org 2019-05-07 23:09:15 +02:00			`/* SPDX-License-Identifier: GPL-2.0 */`
			`#ifndef __ASM_SN_IRQ_ALLOC_H`
			`#define __ASM_SN_IRQ_ALLOC_H`

			`struct irq_alloc_info {`
			`void *ctrl;`
			`nasid_t nasid;`
			`int pin;`
			`};`

			`#endif /* __ASM_SN_IRQ_ALLOC_H */`