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31 lines
972 B
C
31 lines
972 B
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018 Intel Corporation */
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#ifndef _IGC_DEFINES_H_
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#define _IGC_DEFINES_H_
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/* PCI Bus Info */
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#define PCIE_DEVICE_CONTROL2 0x28
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#define PCIE_DEVICE_CONTROL2_16ms 0x0005
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/* Error Codes */
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#define IGC_SUCCESS 0
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#define IGC_ERR_NVM 1
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#define IGC_ERR_PHY 2
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#define IGC_ERR_CONFIG 3
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#define IGC_ERR_PARAM 4
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#define IGC_ERR_MAC_INIT 5
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#define IGC_ERR_RESET 9
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/* Device Status */
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#define IGC_STATUS_FD 0x00000001 /* Full duplex.0=half,1=full */
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#define IGC_STATUS_LU 0x00000002 /* Link up.0=no,1=link */
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#define IGC_STATUS_FUNC_MASK 0x0000000C /* PCI Function Mask */
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#define IGC_STATUS_FUNC_SHIFT 2
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#define IGC_STATUS_FUNC_1 0x00000004 /* Function 1 */
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#define IGC_STATUS_TXOFF 0x00000010 /* transmission paused */
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#define IGC_STATUS_SPEED_100 0x00000040 /* Speed 100Mb/s */
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#define IGC_STATUS_SPEED_1000 0x00000080 /* Speed 1000Mb/s */
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#endif /* _IGC_DEFINES_H_ */
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