linux/tools/perf/util/perf-regs-arch/perf_regs_powerpc.c

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perf parse-regs: Refactor arch register parsing functions Every architecture has a specific register parsing function for returning register name based on register index, to support cross analysis (e.g. we use perf x86 binary to parse Arm64's perf data), we build all these register parsing functions into the tool, this is why we place all related functions into util/perf_regs.c. Unfortunately, since util/perf_regs.c needs to include every arch's perf_regs.h, this easily introduces duplicated definitions coming from multiple headers, finally it's fragile for building and difficult for maintenance. We cannot simply move these register parsing functions into the corresponding 'arch' folder, the folder is only conditionally built based on the target architecture. Therefore, this commit creates a new folder util/perf-regs-arch/ and uses a dedicated source file to keep every architecture's register parsing function to avoid definition conflicts. This is only a refactoring, no functionality change is expected. Committer notes: Had to add util/perf-regs-arch/*.c to tools/perf/util/python-ext-sources to keep 'perf test python' passing. Signed-off-by: Leo Yan <leo.yan@linaro.org> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Eric Lin <eric.lin@sifive.com> Cc: Fangrui Song <maskray@google.com> Cc: Guo Ren <guoren@kernel.org> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Babrou <ivan@cloudflare.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Ming Wang <wangming01@loongson.cn> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sandipan Das <sandipan.das@amd.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-csky@vger.kernel.org Cc: linux-riscv@lists.infradead.org Link: https://lore.kernel.org/r/20230606014559.21783-2-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-06-06 09:45:54 +08:00
// SPDX-License-Identifier: GPL-2.0
#include "../perf_regs.h"
#include "../../../arch/powerpc/include/uapi/asm/perf_regs.h"
const char *__perf_reg_name_powerpc(int id)
{
switch (id) {
case PERF_REG_POWERPC_R0:
return "r0";
case PERF_REG_POWERPC_R1:
return "r1";
case PERF_REG_POWERPC_R2:
return "r2";
case PERF_REG_POWERPC_R3:
return "r3";
case PERF_REG_POWERPC_R4:
return "r4";
case PERF_REG_POWERPC_R5:
return "r5";
case PERF_REG_POWERPC_R6:
return "r6";
case PERF_REG_POWERPC_R7:
return "r7";
case PERF_REG_POWERPC_R8:
return "r8";
case PERF_REG_POWERPC_R9:
return "r9";
case PERF_REG_POWERPC_R10:
return "r10";
case PERF_REG_POWERPC_R11:
return "r11";
case PERF_REG_POWERPC_R12:
return "r12";
case PERF_REG_POWERPC_R13:
return "r13";
case PERF_REG_POWERPC_R14:
return "r14";
case PERF_REG_POWERPC_R15:
return "r15";
case PERF_REG_POWERPC_R16:
return "r16";
case PERF_REG_POWERPC_R17:
return "r17";
case PERF_REG_POWERPC_R18:
return "r18";
case PERF_REG_POWERPC_R19:
return "r19";
case PERF_REG_POWERPC_R20:
return "r20";
case PERF_REG_POWERPC_R21:
return "r21";
case PERF_REG_POWERPC_R22:
return "r22";
case PERF_REG_POWERPC_R23:
return "r23";
case PERF_REG_POWERPC_R24:
return "r24";
case PERF_REG_POWERPC_R25:
return "r25";
case PERF_REG_POWERPC_R26:
return "r26";
case PERF_REG_POWERPC_R27:
return "r27";
case PERF_REG_POWERPC_R28:
return "r28";
case PERF_REG_POWERPC_R29:
return "r29";
case PERF_REG_POWERPC_R30:
return "r30";
case PERF_REG_POWERPC_R31:
return "r31";
case PERF_REG_POWERPC_NIP:
return "nip";
case PERF_REG_POWERPC_MSR:
return "msr";
case PERF_REG_POWERPC_ORIG_R3:
return "orig_r3";
case PERF_REG_POWERPC_CTR:
return "ctr";
case PERF_REG_POWERPC_LINK:
return "link";
case PERF_REG_POWERPC_XER:
return "xer";
case PERF_REG_POWERPC_CCR:
return "ccr";
case PERF_REG_POWERPC_SOFTE:
return "softe";
case PERF_REG_POWERPC_TRAP:
return "trap";
case PERF_REG_POWERPC_DAR:
return "dar";
case PERF_REG_POWERPC_DSISR:
return "dsisr";
case PERF_REG_POWERPC_SIER:
return "sier";
case PERF_REG_POWERPC_MMCRA:
return "mmcra";
case PERF_REG_POWERPC_MMCR0:
return "mmcr0";
case PERF_REG_POWERPC_MMCR1:
return "mmcr1";
case PERF_REG_POWERPC_MMCR2:
return "mmcr2";
case PERF_REG_POWERPC_MMCR3:
return "mmcr3";
case PERF_REG_POWERPC_SIER2:
return "sier2";
case PERF_REG_POWERPC_SIER3:
return "sier3";
case PERF_REG_POWERPC_PMC1:
return "pmc1";
case PERF_REG_POWERPC_PMC2:
return "pmc2";
case PERF_REG_POWERPC_PMC3:
return "pmc3";
case PERF_REG_POWERPC_PMC4:
return "pmc4";
case PERF_REG_POWERPC_PMC5:
return "pmc5";
case PERF_REG_POWERPC_PMC6:
return "pmc6";
case PERF_REG_POWERPC_SDAR:
return "sdar";
case PERF_REG_POWERPC_SIAR:
return "siar";
default:
break;
}
return NULL;
}
perf parse-regs: Introduce functions perf_arch_reg_{ip|sp}() The current code uses macros PERF_REG_IP and PERF_REG_SP for parsing registers and we build perf with these macros statically, which means it only can correctly analyze CPU registers for the native architecture and fails to support cross analysis (e.g. we build perf on x86 and cannot analyze Arm64's registers). We need to generalize util/perf_regs.c for support multi architectures, as a first step, this commit introduces new functions perf_arch_reg_ip() and perf_arch_reg_sp(), these two functions dynamically return IP and SP register index respectively according to the parameter "arch". Every architecture has its own functions (like __perf_reg_ip_arm64 and __perf_reg_sp_arm64), these architecture specific functions are defined in each arch source file under folder util/perf-regs-arch; at the end all of them are built into the tool for cross analysis. Committer notes: Make DWARF_MINIMAL_REGS() an inline function, so that we can use the __maybe_unused attribute for the 'arch' parameter, as this will avoid a build failure when that variable is unused in the callers. That happens when building on unsupported architectures, the ones without HAVE_PERF_REGS_SUPPORT defined. Signed-off-by: Leo Yan <leo.yan@linaro.org> Acked-by: Ian Rogers <irogers@google.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Eric Lin <eric.lin@sifive.com> Cc: Fangrui Song <maskray@google.com> Cc: Guo Ren <guoren@kernel.org> Cc: Huacai Chen <chenhuacai@kernel.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Ivan Babrou <ivan@cloudflare.com> Cc: James Clark <james.clark@arm.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Ming Wang <wangming01@loongson.cn> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sandipan Das <sandipan.das@amd.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-csky@vger.kernel.org Cc: linux-riscv@lists.infradead.org Link: https://lore.kernel.org/r/20230606014559.21783-3-leo.yan@linaro.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2023-06-06 09:45:55 +08:00
uint64_t __perf_reg_ip_powerpc(void)
{
return PERF_REG_POWERPC_NIP;
}
uint64_t __perf_reg_sp_powerpc(void)
{
return PERF_REG_POWERPC_R1;
}