2018-04-18 16:05:18 -06:00
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// SPDX-License-Identifier: GPL-2.0
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2016-09-16 09:50:00 -06:00
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/*
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* Copyright(C) 2015 Linaro Limited. All rights reserved.
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* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
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*/
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2022-09-27 16:13:59 +08:00
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#include <dirent.h>
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2016-09-16 09:50:00 -06:00
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#include <stdbool.h>
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#include <linux/coresight-pmu.h>
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2019-07-04 11:32:27 -03:00
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#include <linux/zalloc.h>
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2022-09-27 16:13:59 +08:00
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#include <api/fs/fs.h>
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2016-09-16 09:50:00 -06:00
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2021-09-23 08:42:54 -07:00
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#include "../../../util/auxtrace.h"
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#include "../../../util/debug.h"
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#include "../../../util/evlist.h"
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#include "../../../util/pmu.h"
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2023-05-27 00:22:03 -07:00
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#include "../../../util/pmus.h"
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2016-09-16 09:50:00 -06:00
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#include "cs-etm.h"
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2018-01-14 13:28:50 -06:00
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#include "arm-spe.h"
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2022-09-27 16:13:59 +08:00
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#include "hisi-ptt.h"
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2018-01-14 13:28:50 -06:00
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static struct perf_pmu **find_all_arm_spe_pmus(int *nr_spes, int *err)
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{
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struct perf_pmu **arm_spe_pmus = NULL;
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int ret, i, nr_cpus = sysconf(_SC_NPROCESSORS_CONF);
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/* arm_spe_xxxxxxxxx\0 */
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char arm_spe_pmu_name[sizeof(ARM_SPE_PMU_NAME) + 10];
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arm_spe_pmus = zalloc(sizeof(struct perf_pmu *) * nr_cpus);
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if (!arm_spe_pmus) {
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pr_err("spes alloc failed\n");
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*err = -ENOMEM;
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return NULL;
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}
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for (i = 0; i < nr_cpus; i++) {
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ret = sprintf(arm_spe_pmu_name, "%s%d", ARM_SPE_PMU_NAME, i);
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if (ret < 0) {
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pr_err("sprintf failed\n");
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*err = -ENOMEM;
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return NULL;
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}
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2023-05-27 00:22:03 -07:00
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arm_spe_pmus[*nr_spes] = perf_pmus__find(arm_spe_pmu_name);
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2018-01-14 13:28:50 -06:00
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if (arm_spe_pmus[*nr_spes]) {
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pr_debug2("%s %d: arm_spe_pmu %d type %d name %s\n",
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__func__, __LINE__, *nr_spes,
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arm_spe_pmus[*nr_spes]->type,
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arm_spe_pmus[*nr_spes]->name);
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(*nr_spes)++;
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}
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}
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return arm_spe_pmus;
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}
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2016-09-16 09:50:00 -06:00
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2022-09-27 16:13:59 +08:00
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static struct perf_pmu **find_all_hisi_ptt_pmus(int *nr_ptts, int *err)
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{
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struct perf_pmu **hisi_ptt_pmus = NULL;
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struct dirent *dent;
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char path[PATH_MAX];
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DIR *dir = NULL;
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int idx = 0;
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2023-01-20 14:36:54 +00:00
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perf_pmu__event_source_devices_scnprintf(path, sizeof(path));
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2022-09-27 16:13:59 +08:00
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dir = opendir(path);
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if (!dir) {
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2023-01-20 14:36:54 +00:00
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pr_err("can't read directory '%s'\n", path);
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2022-09-27 16:13:59 +08:00
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*err = -EINVAL;
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return NULL;
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}
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while ((dent = readdir(dir))) {
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if (strstr(dent->d_name, HISI_PTT_PMU_NAME))
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(*nr_ptts)++;
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}
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if (!(*nr_ptts))
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goto out;
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hisi_ptt_pmus = zalloc(sizeof(struct perf_pmu *) * (*nr_ptts));
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if (!hisi_ptt_pmus) {
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pr_err("hisi_ptt alloc failed\n");
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*err = -ENOMEM;
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goto out;
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}
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rewinddir(dir);
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while ((dent = readdir(dir))) {
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if (strstr(dent->d_name, HISI_PTT_PMU_NAME) && idx < *nr_ptts) {
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2023-05-27 00:22:03 -07:00
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hisi_ptt_pmus[idx] = perf_pmus__find(dent->d_name);
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2022-09-27 16:13:59 +08:00
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if (hisi_ptt_pmus[idx])
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idx++;
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}
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}
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out:
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closedir(dir);
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return hisi_ptt_pmus;
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}
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2022-09-27 16:13:58 +08:00
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static struct perf_pmu *find_pmu_for_event(struct perf_pmu **pmus,
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int pmu_nr, struct evsel *evsel)
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{
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int i;
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if (!pmus)
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return NULL;
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for (i = 0; i < pmu_nr; i++) {
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if (evsel->core.attr.type == pmus[i]->type)
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return pmus[i];
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}
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return NULL;
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}
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2016-09-16 09:50:00 -06:00
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struct auxtrace_record
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2019-07-21 13:23:52 +02:00
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*auxtrace_record__init(struct evlist *evlist, int *err)
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2016-09-16 09:50:00 -06:00
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{
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2022-09-27 16:13:58 +08:00
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struct perf_pmu *cs_etm_pmu = NULL;
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struct perf_pmu **arm_spe_pmus = NULL;
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2022-09-27 16:13:59 +08:00
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struct perf_pmu **hisi_ptt_pmus = NULL;
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2019-07-21 13:23:51 +02:00
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struct evsel *evsel;
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2022-09-27 16:13:58 +08:00
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struct perf_pmu *found_etm = NULL;
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perf tools: Fix record failure when mixed with ARM SPE event
When recording with cache-misses and arm_spe_x event, I found that it
will just fail without showing any error info if i put cache-misses
after 'arm_spe_x' event.
[root@localhost 0620]# perf record -e cache-misses \
-e arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,jitter=1,store_filter=1,min_latency=0/ sleep 1
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.067 MB perf.data ]
[root@localhost 0620]#
[root@localhost 0620]# perf record -e arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,jitter=1,store_filter=1,min_latency=0/ \
-e cache-misses sleep 1
[root@localhost 0620]#
The current code can only work if the only event to be traced is an
'arm_spe_x', or if it is the last event to be specified. Otherwise the
last event type will be checked against all the arm_spe_pmus[i]->types,
none will match and an out of bound 'i' index will be used in
arm_spe_recording_init().
We don't support concurrent multiple arm_spe_x events currently, that
is checked in arm_spe_recording_options(), and it will show the relevant
info. So add the check and record of the first found 'arm_spe_pmu' to
fix this issue here.
Fixes: ffd3d18c20b8 ("perf tools: Add ARM Statistical Profiling Extensions (SPE) support")
Signed-off-by: Wei Li <liwei391@huawei.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by-by: Leo Yan <leo.yan@linaro.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Hanjun Guo <guohanjun@huawei.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kim Phillips <kim.phillips@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Suzuki Poulouse <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lore.kernel.org/lkml/20200724071111.35593-2-liwei391@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-07-24 15:11:10 +08:00
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struct perf_pmu *found_spe = NULL;
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2022-09-27 16:13:59 +08:00
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struct perf_pmu *found_ptt = NULL;
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2022-09-27 16:13:58 +08:00
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int auxtrace_event_cnt = 0;
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2020-07-24 15:11:11 +08:00
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int nr_spes = 0;
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2022-09-27 16:13:59 +08:00
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int nr_ptts = 0;
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2018-01-14 13:28:50 -06:00
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if (!evlist)
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return NULL;
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2016-09-16 09:50:00 -06:00
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2023-05-27 00:22:03 -07:00
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cs_etm_pmu = perf_pmus__find(CORESIGHT_ETM_PMU_NAME);
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2020-07-24 15:11:11 +08:00
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arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err);
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2022-09-27 16:13:59 +08:00
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hisi_ptt_pmus = find_all_hisi_ptt_pmus(&nr_ptts, err);
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2018-01-14 13:28:50 -06:00
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evlist__for_each_entry(evlist, evsel) {
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2022-09-27 16:13:58 +08:00
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if (cs_etm_pmu && !found_etm)
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found_etm = find_pmu_for_event(&cs_etm_pmu, 1, evsel);
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if (arm_spe_pmus && !found_spe)
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found_spe = find_pmu_for_event(arm_spe_pmus, nr_spes, evsel);
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2022-09-27 16:13:59 +08:00
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if (hisi_ptt_pmus && !found_ptt)
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found_ptt = find_pmu_for_event(hisi_ptt_pmus, nr_ptts, evsel);
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2016-09-16 09:50:00 -06:00
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}
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2022-09-27 16:13:58 +08:00
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2020-07-24 15:11:11 +08:00
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free(arm_spe_pmus);
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2022-09-27 16:13:59 +08:00
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free(hisi_ptt_pmus);
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2016-09-16 09:50:00 -06:00
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2022-09-27 16:13:58 +08:00
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if (found_etm)
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auxtrace_event_cnt++;
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if (found_spe)
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auxtrace_event_cnt++;
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2022-09-27 16:13:59 +08:00
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if (found_ptt)
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auxtrace_event_cnt++;
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2022-09-27 16:13:58 +08:00
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if (auxtrace_event_cnt > 1) {
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pr_err("Concurrent AUX trace operation not currently supported\n");
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2018-01-14 13:28:50 -06:00
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*err = -EOPNOTSUPP;
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return NULL;
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}
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2016-09-16 09:50:00 -06:00
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if (found_etm)
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return cs_etm_record_init(err);
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2018-01-14 13:28:50 -06:00
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#if defined(__aarch64__)
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if (found_spe)
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perf tools: Fix record failure when mixed with ARM SPE event
When recording with cache-misses and arm_spe_x event, I found that it
will just fail without showing any error info if i put cache-misses
after 'arm_spe_x' event.
[root@localhost 0620]# perf record -e cache-misses \
-e arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,jitter=1,store_filter=1,min_latency=0/ sleep 1
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.067 MB perf.data ]
[root@localhost 0620]#
[root@localhost 0620]# perf record -e arm_spe_0/ts_enable=1,pct_enable=1,pa_enable=1,load_filter=1,jitter=1,store_filter=1,min_latency=0/ \
-e cache-misses sleep 1
[root@localhost 0620]#
The current code can only work if the only event to be traced is an
'arm_spe_x', or if it is the last event to be specified. Otherwise the
last event type will be checked against all the arm_spe_pmus[i]->types,
none will match and an out of bound 'i' index will be used in
arm_spe_recording_init().
We don't support concurrent multiple arm_spe_x events currently, that
is checked in arm_spe_recording_options(), and it will show the relevant
info. So add the check and record of the first found 'arm_spe_pmu' to
fix this issue here.
Fixes: ffd3d18c20b8 ("perf tools: Add ARM Statistical Profiling Extensions (SPE) support")
Signed-off-by: Wei Li <liwei391@huawei.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by-by: Leo Yan <leo.yan@linaro.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Hanjun Guo <guohanjun@huawei.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kim Phillips <kim.phillips@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Suzuki Poulouse <suzuki.poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lore.kernel.org/lkml/20200724071111.35593-2-liwei391@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2020-07-24 15:11:10 +08:00
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return arm_spe_recording_init(err, found_spe);
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2022-09-27 16:13:59 +08:00
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if (found_ptt)
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return hisi_ptt_recording_init(err, found_ptt);
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2018-01-14 13:28:50 -06:00
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#endif
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2016-09-16 09:50:00 -06:00
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/*
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2018-01-14 13:28:50 -06:00
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* Clear 'err' even if we haven't found an event - that way perf
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2016-09-16 09:50:00 -06:00
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* record can still be used even if tracers aren't present. The NULL
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* return value will take care of telling the infrastructure HW tracing
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* isn't available.
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*/
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*err = 0;
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return NULL;
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}
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2021-08-29 18:22:38 +08:00
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#if defined(__arm__)
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u64 compat_auxtrace_mmap__read_head(struct auxtrace_mmap *mm)
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{
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struct perf_event_mmap_page *pc = mm->userpg;
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u64 result;
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__asm__ __volatile__(
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" ldrd %0, %H0, [%1]"
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: "=&r" (result)
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: "r" (&pc->aux_head), "Qo" (pc->aux_head)
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);
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return result;
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}
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int compat_auxtrace_mmap__write_tail(struct auxtrace_mmap *mm, u64 tail)
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{
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struct perf_event_mmap_page *pc = mm->userpg;
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/* Ensure all reads are done before we write the tail out */
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smp_mb();
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__asm__ __volatile__(
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" strd %2, %H2, [%1]"
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: "=Qo" (pc->aux_tail)
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: "r" (&pc->aux_tail), "r" (tail)
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);
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return 0;
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}
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#endif
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