linux/include/dt-bindings/clock/mediatek,mt6735-mfgcfg.h

/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */

#ifndef _DT_BINDINGS_CLK_MT6735_MFGCFG_H
#define _DT_BINDINGS_CLK_MT6735_MFGCFG_H

#define CLK_MFG_BG3D			0

#endif /* _DT_BINDINGS_CLK_MT6735_MFGCFG_H */
dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers Add device tree bindings for syscon clock and reset controllers (IMGSYS, MFGCFG, VDECSYS and VENCSYS). Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241106111402.200940-2-y.oudjana@protonmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> 2024-11-06 11:14:30 +00:00			`/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */`

			`#ifndef _DT_BINDINGS_CLK_MT6735_MFGCFG_H`
			`#define _DT_BINDINGS_CLK_MT6735_MFGCFG_H`

			`#define CLK_MFG_BG3D 0`

			`#endif /* _DT_BINDINGS_CLK_MT6735_MFGCFG_H */`