linux/drivers/pci/pcie/ptm.c

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// SPDX-License-Identifier: GPL-2.0
/*
* PCI Express Precision Time Measurement
* Copyright (c) 2016, Intel Corporation.
*/
#include <linux/bitfield.h>
PCI: Add debugfs support for exposing PTM context Precision Time Management (PTM) mechanism defined in PCIe spec r6.0, sec 6.21 allows precise coordination of timing information across multiple components in a PCIe hierarchy with independent local time clocks. PCI core already supports enabling PTM in the root port and endpoint devices through PTM Extended Capability registers. But the PTM context supported by the PTM capable components such as Root Complex (RC) and Endpoint (EP) controllers were not exposed as of now. Part of the reason is that the spec doesn't define how the context information is exposed to the software and left it to the vendor implementation. So there is no standardized way to get access to the context information and each vendor have defined their own way. This commit adds debugfs support to expose the PTM context to userspace from both PCIe RC and EP controllers. Since the context information is exposed in a vendor specific way, the debugfs interface allows the controller drivers to implement callbacks for each attribute, to be called by the generic PTM driver. The Controller drivers are expected to call pcie_ptm_create_debugfs() to create the debugfs attributes for the PTM context and call pcie_ptm_destroy_debugfs() to destroy them. The drivers should also populate the relevant callbacks in the 'struct pcie_ptm_ops' structure based on the controller implementation. Below PTM context are exposed through debugfs: PCIe RC ======= 1. PTM Local clock 2. PTM T2 timestamp 3. PTM T3 timestamp 4. PTM Context valid PCIe EP ======= 1. PTM Local clock 2. PTM T1 timestamp 3. PTM T4 timestamp 4. PTM Master clock 5. PTM Context update Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [kwilczynski: fix overflow issue reported by Dan Carpenter from https://lore.kernel.org/linux-pci/b41c1754-c6b7-4805-9f14-7c643d6c5304@suswa.mountain] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Link: https://patch.msgid.link/20250505-pcie-ptm-v4-1-02d26d51400b@linaro.org
2025-05-05 19:54:39 +05:30
#include <linux/debugfs.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include "../pci.h"
/*
* If the next upstream device supports PTM, return it; otherwise return
* NULL. PTM Messages are local, so both link partners must support it.
*/
static struct pci_dev *pci_upstream_ptm(struct pci_dev *dev)
{
struct pci_dev *ups = pci_upstream_bridge(dev);
/*
* Switch Downstream Ports are not permitted to have a PTM
* capability; their PTM behavior is controlled by the Upstream
* Port (PCIe r5.0, sec 7.9.16), so if the upstream bridge is a
* Switch Downstream Port, look up one more level.
*/
if (ups && pci_pcie_type(ups) == PCI_EXP_TYPE_DOWNSTREAM)
ups = pci_upstream_bridge(ups);
if (ups && ups->ptm_cap)
return ups;
return NULL;
}
/*
* Find the PTM Capability (if present) and extract the information we need
* to use it.
*/
void pci_ptm_init(struct pci_dev *dev)
{
u16 ptm;
u32 cap;
struct pci_dev *ups;
if (!pci_is_pcie(dev))
return;
ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
if (!ptm)
return;
dev->ptm_cap = ptm;
pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_PTM, sizeof(u32));
pci_read_config_dword(dev, ptm + PCI_PTM_CAP, &cap);
dev->ptm_granularity = FIELD_GET(PCI_PTM_GRANULARITY_MASK, cap);
/*
* Per the spec recommendation (PCIe r6.0, sec 7.9.15.3), select the
* furthest upstream Time Source as the PTM Root. For Endpoints,
* "the Effective Granularity is the maximum Local Clock Granularity
* reported by the PTM Root and all intervening PTM Time Sources."
*/
ups = pci_upstream_ptm(dev);
if (ups) {
if (ups->ptm_granularity == 0)
dev->ptm_granularity = 0;
else if (ups->ptm_granularity > dev->ptm_granularity)
dev->ptm_granularity = ups->ptm_granularity;
} else if (cap & PCI_PTM_CAP_ROOT) {
dev->ptm_root = 1;
} else if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) {
/*
* Per sec 7.9.15.3, this should be the Local Clock
* Granularity of the associated Time Source. But it
* doesn't say how to find that Time Source.
*/
dev->ptm_granularity = 0;
}
if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
pci_pcie_type(dev) == PCI_EXP_TYPE_UPSTREAM)
pci_enable_ptm(dev, NULL);
}
void pci_save_ptm_state(struct pci_dev *dev)
{
u16 ptm = dev->ptm_cap;
struct pci_cap_saved_state *save_state;
u32 *cap;
if (!ptm)
return;
save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_PTM);
if (!save_state)
return;
cap = (u32 *)&save_state->cap.data[0];
pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, cap);
}
void pci_restore_ptm_state(struct pci_dev *dev)
{
u16 ptm = dev->ptm_cap;
struct pci_cap_saved_state *save_state;
u32 *cap;
if (!ptm)
return;
save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_PTM);
if (!save_state)
return;
cap = (u32 *)&save_state->cap.data[0];
pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, *cap);
}
PCI/PTM: Add pci_suspend_ptm() and pci_resume_ptm() We disable PTM during suspend because that allows some Root Ports to enter lower-power PM states, which means we also need to disable PTM for all downstream devices. Add pci_suspend_ptm() and pci_resume_ptm() for this purpose. pci_enable_ptm() and pci_disable_ptm() are for drivers to use to enable or disable PTM. They use dev->ptm_enabled to keep track of whether PTM should be enabled. pci_suspend_ptm() and pci_resume_ptm() are PCI core-internal functions to temporarily disable PTM during suspend and (depending on dev->ptm_enabled) re-enable PTM during resume. Enable/disable/suspend/resume all use internal __pci_enable_ptm() and __pci_disable_ptm() functions that only update the PTM Control register. Outline: pci_enable_ptm(struct pci_dev *dev) { __pci_enable_ptm(dev); dev->ptm_enabled = 1; pci_ptm_info(dev); } pci_disable_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) { __pci_disable_ptm(dev); dev->ptm_enabled = 0; } } pci_suspend_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) __pci_disable_ptm(dev); } pci_resume_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) __pci_enable_ptm(dev); } Nothing currently calls pci_resume_ptm(); the suspend path saves the PTM state before disabling PTM, so the PTM state restore in the resume path implicitly re-enables it. A future change will use pci_resume_ptm() to fix some problems with this approach. Link: https://lore.kernel.org/r/20220909202505.314195-5-helgaas@kernel.org Tested-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-09-09 15:25:00 -05:00
/* Enable PTM in the Control register if possible */
static int __pci_enable_ptm(struct pci_dev *dev)
{
u16 ptm = dev->ptm_cap;
struct pci_dev *ups;
u32 ctrl;
if (!ptm)
return -EINVAL;
/*
* A device uses local PTM Messages to request time information
* from a PTM Root that's farther upstream. Every device along the
* path must support PTM and have it enabled so it can handle the
* messages. Therefore, if this device is not a PTM Root, the
* upstream link partner must have PTM enabled before we can enable
* PTM.
*/
if (!dev->ptm_root) {
ups = pci_upstream_ptm(dev);
if (!ups || !ups->ptm_enabled)
return -EINVAL;
}
pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, &ctrl);
ctrl |= PCI_PTM_CTRL_ENABLE;
ctrl &= ~PCI_PTM_GRANULARITY_MASK;
ctrl |= FIELD_PREP(PCI_PTM_GRANULARITY_MASK, dev->ptm_granularity);
if (dev->ptm_root)
ctrl |= PCI_PTM_CTRL_ROOT;
pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, ctrl);
PCI/PTM: Add pci_suspend_ptm() and pci_resume_ptm() We disable PTM during suspend because that allows some Root Ports to enter lower-power PM states, which means we also need to disable PTM for all downstream devices. Add pci_suspend_ptm() and pci_resume_ptm() for this purpose. pci_enable_ptm() and pci_disable_ptm() are for drivers to use to enable or disable PTM. They use dev->ptm_enabled to keep track of whether PTM should be enabled. pci_suspend_ptm() and pci_resume_ptm() are PCI core-internal functions to temporarily disable PTM during suspend and (depending on dev->ptm_enabled) re-enable PTM during resume. Enable/disable/suspend/resume all use internal __pci_enable_ptm() and __pci_disable_ptm() functions that only update the PTM Control register. Outline: pci_enable_ptm(struct pci_dev *dev) { __pci_enable_ptm(dev); dev->ptm_enabled = 1; pci_ptm_info(dev); } pci_disable_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) { __pci_disable_ptm(dev); dev->ptm_enabled = 0; } } pci_suspend_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) __pci_disable_ptm(dev); } pci_resume_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) __pci_enable_ptm(dev); } Nothing currently calls pci_resume_ptm(); the suspend path saves the PTM state before disabling PTM, so the PTM state restore in the resume path implicitly re-enables it. A future change will use pci_resume_ptm() to fix some problems with this approach. Link: https://lore.kernel.org/r/20220909202505.314195-5-helgaas@kernel.org Tested-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-09-09 15:25:00 -05:00
return 0;
}
PCI/PTM: Add pci_suspend_ptm() and pci_resume_ptm() We disable PTM during suspend because that allows some Root Ports to enter lower-power PM states, which means we also need to disable PTM for all downstream devices. Add pci_suspend_ptm() and pci_resume_ptm() for this purpose. pci_enable_ptm() and pci_disable_ptm() are for drivers to use to enable or disable PTM. They use dev->ptm_enabled to keep track of whether PTM should be enabled. pci_suspend_ptm() and pci_resume_ptm() are PCI core-internal functions to temporarily disable PTM during suspend and (depending on dev->ptm_enabled) re-enable PTM during resume. Enable/disable/suspend/resume all use internal __pci_enable_ptm() and __pci_disable_ptm() functions that only update the PTM Control register. Outline: pci_enable_ptm(struct pci_dev *dev) { __pci_enable_ptm(dev); dev->ptm_enabled = 1; pci_ptm_info(dev); } pci_disable_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) { __pci_disable_ptm(dev); dev->ptm_enabled = 0; } } pci_suspend_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) __pci_disable_ptm(dev); } pci_resume_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) __pci_enable_ptm(dev); } Nothing currently calls pci_resume_ptm(); the suspend path saves the PTM state before disabling PTM, so the PTM state restore in the resume path implicitly re-enables it. A future change will use pci_resume_ptm() to fix some problems with this approach. Link: https://lore.kernel.org/r/20220909202505.314195-5-helgaas@kernel.org Tested-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-09-09 15:25:00 -05:00
/**
* pci_enable_ptm() - Enable Precision Time Measurement
* @dev: PCI device
* @granularity: pointer to return granularity
*
* Enable Precision Time Measurement for @dev. If successful and
* @granularity is non-NULL, return the Effective Granularity.
*
* Return: zero if successful, or -EINVAL if @dev lacks a PTM Capability or
* is not a PTM Root and lacks an upstream path of PTM-enabled devices.
*/
int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)
{
int rc;
char clock_desc[8];
PCI/PTM: Add pci_suspend_ptm() and pci_resume_ptm() We disable PTM during suspend because that allows some Root Ports to enter lower-power PM states, which means we also need to disable PTM for all downstream devices. Add pci_suspend_ptm() and pci_resume_ptm() for this purpose. pci_enable_ptm() and pci_disable_ptm() are for drivers to use to enable or disable PTM. They use dev->ptm_enabled to keep track of whether PTM should be enabled. pci_suspend_ptm() and pci_resume_ptm() are PCI core-internal functions to temporarily disable PTM during suspend and (depending on dev->ptm_enabled) re-enable PTM during resume. Enable/disable/suspend/resume all use internal __pci_enable_ptm() and __pci_disable_ptm() functions that only update the PTM Control register. Outline: pci_enable_ptm(struct pci_dev *dev) { __pci_enable_ptm(dev); dev->ptm_enabled = 1; pci_ptm_info(dev); } pci_disable_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) { __pci_disable_ptm(dev); dev->ptm_enabled = 0; } } pci_suspend_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) __pci_disable_ptm(dev); } pci_resume_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) __pci_enable_ptm(dev); } Nothing currently calls pci_resume_ptm(); the suspend path saves the PTM state before disabling PTM, so the PTM state restore in the resume path implicitly re-enables it. A future change will use pci_resume_ptm() to fix some problems with this approach. Link: https://lore.kernel.org/r/20220909202505.314195-5-helgaas@kernel.org Tested-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-09-09 15:25:00 -05:00
rc = __pci_enable_ptm(dev);
if (rc)
return rc;
dev->ptm_enabled = 1;
if (granularity)
*granularity = dev->ptm_granularity;
switch (dev->ptm_granularity) {
case 0:
snprintf(clock_desc, sizeof(clock_desc), "unknown");
break;
case 255:
snprintf(clock_desc, sizeof(clock_desc), ">254ns");
break;
default:
snprintf(clock_desc, sizeof(clock_desc), "%uns",
dev->ptm_granularity);
break;
}
pci_info(dev, "PTM enabled%s, %s granularity\n",
dev->ptm_root ? " (root)" : "", clock_desc);
return 0;
}
EXPORT_SYMBOL(pci_enable_ptm);
static void __pci_disable_ptm(struct pci_dev *dev)
{
u16 ptm = dev->ptm_cap;
u32 ctrl;
if (!ptm)
return;
pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, &ctrl);
ctrl &= ~(PCI_PTM_CTRL_ENABLE | PCI_PTM_CTRL_ROOT);
pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, ctrl);
}
/**
* pci_disable_ptm() - Disable Precision Time Measurement
* @dev: PCI device
*
* Disable Precision Time Measurement for @dev.
*/
void pci_disable_ptm(struct pci_dev *dev)
{
if (dev->ptm_enabled) {
__pci_disable_ptm(dev);
dev->ptm_enabled = 0;
}
}
EXPORT_SYMBOL(pci_disable_ptm);
PCI/PTM: Add pci_suspend_ptm() and pci_resume_ptm() We disable PTM during suspend because that allows some Root Ports to enter lower-power PM states, which means we also need to disable PTM for all downstream devices. Add pci_suspend_ptm() and pci_resume_ptm() for this purpose. pci_enable_ptm() and pci_disable_ptm() are for drivers to use to enable or disable PTM. They use dev->ptm_enabled to keep track of whether PTM should be enabled. pci_suspend_ptm() and pci_resume_ptm() are PCI core-internal functions to temporarily disable PTM during suspend and (depending on dev->ptm_enabled) re-enable PTM during resume. Enable/disable/suspend/resume all use internal __pci_enable_ptm() and __pci_disable_ptm() functions that only update the PTM Control register. Outline: pci_enable_ptm(struct pci_dev *dev) { __pci_enable_ptm(dev); dev->ptm_enabled = 1; pci_ptm_info(dev); } pci_disable_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) { __pci_disable_ptm(dev); dev->ptm_enabled = 0; } } pci_suspend_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) __pci_disable_ptm(dev); } pci_resume_ptm(struct pci_dev *dev) { if (dev->ptm_enabled) __pci_enable_ptm(dev); } Nothing currently calls pci_resume_ptm(); the suspend path saves the PTM state before disabling PTM, so the PTM state restore in the resume path implicitly re-enables it. A future change will use pci_resume_ptm() to fix some problems with this approach. Link: https://lore.kernel.org/r/20220909202505.314195-5-helgaas@kernel.org Tested-by: Rajvi Jingar <rajvi.jingar@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2022-09-09 15:25:00 -05:00
/*
* Disable PTM, but preserve dev->ptm_enabled so we silently re-enable it on
* resume if necessary.
*/
void pci_suspend_ptm(struct pci_dev *dev)
{
if (dev->ptm_enabled)
__pci_disable_ptm(dev);
}
/* If PTM was enabled before suspend, re-enable it when resuming */
void pci_resume_ptm(struct pci_dev *dev)
{
if (dev->ptm_enabled)
__pci_enable_ptm(dev);
}
bool pcie_ptm_enabled(struct pci_dev *dev)
{
if (!dev)
return false;
return dev->ptm_enabled;
}
EXPORT_SYMBOL(pcie_ptm_enabled);
PCI: Add debugfs support for exposing PTM context Precision Time Management (PTM) mechanism defined in PCIe spec r6.0, sec 6.21 allows precise coordination of timing information across multiple components in a PCIe hierarchy with independent local time clocks. PCI core already supports enabling PTM in the root port and endpoint devices through PTM Extended Capability registers. But the PTM context supported by the PTM capable components such as Root Complex (RC) and Endpoint (EP) controllers were not exposed as of now. Part of the reason is that the spec doesn't define how the context information is exposed to the software and left it to the vendor implementation. So there is no standardized way to get access to the context information and each vendor have defined their own way. This commit adds debugfs support to expose the PTM context to userspace from both PCIe RC and EP controllers. Since the context information is exposed in a vendor specific way, the debugfs interface allows the controller drivers to implement callbacks for each attribute, to be called by the generic PTM driver. The Controller drivers are expected to call pcie_ptm_create_debugfs() to create the debugfs attributes for the PTM context and call pcie_ptm_destroy_debugfs() to destroy them. The drivers should also populate the relevant callbacks in the 'struct pcie_ptm_ops' structure based on the controller implementation. Below PTM context are exposed through debugfs: PCIe RC ======= 1. PTM Local clock 2. PTM T2 timestamp 3. PTM T3 timestamp 4. PTM Context valid PCIe EP ======= 1. PTM Local clock 2. PTM T1 timestamp 3. PTM T4 timestamp 4. PTM Master clock 5. PTM Context update Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [kwilczynski: fix overflow issue reported by Dan Carpenter from https://lore.kernel.org/linux-pci/b41c1754-c6b7-4805-9f14-7c643d6c5304@suswa.mountain] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Link: https://patch.msgid.link/20250505-pcie-ptm-v4-1-02d26d51400b@linaro.org
2025-05-05 19:54:39 +05:30
#if IS_ENABLED(CONFIG_DEBUG_FS)
PCI: Add debugfs support for exposing PTM context Precision Time Management (PTM) mechanism defined in PCIe spec r6.0, sec 6.21 allows precise coordination of timing information across multiple components in a PCIe hierarchy with independent local time clocks. PCI core already supports enabling PTM in the root port and endpoint devices through PTM Extended Capability registers. But the PTM context supported by the PTM capable components such as Root Complex (RC) and Endpoint (EP) controllers were not exposed as of now. Part of the reason is that the spec doesn't define how the context information is exposed to the software and left it to the vendor implementation. So there is no standardized way to get access to the context information and each vendor have defined their own way. This commit adds debugfs support to expose the PTM context to userspace from both PCIe RC and EP controllers. Since the context information is exposed in a vendor specific way, the debugfs interface allows the controller drivers to implement callbacks for each attribute, to be called by the generic PTM driver. The Controller drivers are expected to call pcie_ptm_create_debugfs() to create the debugfs attributes for the PTM context and call pcie_ptm_destroy_debugfs() to destroy them. The drivers should also populate the relevant callbacks in the 'struct pcie_ptm_ops' structure based on the controller implementation. Below PTM context are exposed through debugfs: PCIe RC ======= 1. PTM Local clock 2. PTM T2 timestamp 3. PTM T3 timestamp 4. PTM Context valid PCIe EP ======= 1. PTM Local clock 2. PTM T1 timestamp 3. PTM T4 timestamp 4. PTM Master clock 5. PTM Context update Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [kwilczynski: fix overflow issue reported by Dan Carpenter from https://lore.kernel.org/linux-pci/b41c1754-c6b7-4805-9f14-7c643d6c5304@suswa.mountain] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Link: https://patch.msgid.link/20250505-pcie-ptm-v4-1-02d26d51400b@linaro.org
2025-05-05 19:54:39 +05:30
static ssize_t context_update_write(struct file *file, const char __user *ubuf,
size_t count, loff_t *ppos)
{
struct pci_ptm_debugfs *ptm_debugfs = file->private_data;
char buf[7];
int ret;
u8 mode;
if (!ptm_debugfs->ops->context_update_write)
return -EOPNOTSUPP;
if (count < 1 || count >= sizeof(buf))
return -EINVAL;
ret = copy_from_user(buf, ubuf, count);
if (ret)
return -EFAULT;
buf[count] = '\0';
if (sysfs_streq(buf, "auto"))
mode = PCIE_PTM_CONTEXT_UPDATE_AUTO;
else if (sysfs_streq(buf, "manual"))
mode = PCIE_PTM_CONTEXT_UPDATE_MANUAL;
else
return -EINVAL;
mutex_lock(&ptm_debugfs->lock);
ret = ptm_debugfs->ops->context_update_write(ptm_debugfs->pdata, mode);
mutex_unlock(&ptm_debugfs->lock);
if (ret)
return ret;
return count;
}
static ssize_t context_update_read(struct file *file, char __user *ubuf,
size_t count, loff_t *ppos)
{
struct pci_ptm_debugfs *ptm_debugfs = file->private_data;
char buf[8]; /* Extra space for NULL termination at the end */
ssize_t pos;
u8 mode;
if (!ptm_debugfs->ops->context_update_read)
return -EOPNOTSUPP;
mutex_lock(&ptm_debugfs->lock);
ptm_debugfs->ops->context_update_read(ptm_debugfs->pdata, &mode);
mutex_unlock(&ptm_debugfs->lock);
if (mode == PCIE_PTM_CONTEXT_UPDATE_AUTO)
pos = scnprintf(buf, sizeof(buf), "auto\n");
else
pos = scnprintf(buf, sizeof(buf), "manual\n");
return simple_read_from_buffer(ubuf, count, ppos, buf, pos);
}
static const struct file_operations context_update_fops = {
.open = simple_open,
.read = context_update_read,
.write = context_update_write,
};
static int context_valid_get(void *data, u64 *val)
{
struct pci_ptm_debugfs *ptm_debugfs = data;
bool valid;
int ret;
if (!ptm_debugfs->ops->context_valid_read)
return -EOPNOTSUPP;
mutex_lock(&ptm_debugfs->lock);
ret = ptm_debugfs->ops->context_valid_read(ptm_debugfs->pdata, &valid);
mutex_unlock(&ptm_debugfs->lock);
if (ret)
return ret;
*val = valid;
return 0;
}
static int context_valid_set(void *data, u64 val)
{
struct pci_ptm_debugfs *ptm_debugfs = data;
int ret;
if (!ptm_debugfs->ops->context_valid_write)
return -EOPNOTSUPP;
mutex_lock(&ptm_debugfs->lock);
ret = ptm_debugfs->ops->context_valid_write(ptm_debugfs->pdata, !!val);
mutex_unlock(&ptm_debugfs->lock);
return ret;
}
DEFINE_DEBUGFS_ATTRIBUTE(context_valid_fops, context_valid_get,
context_valid_set, "%llu\n");
static int local_clock_get(void *data, u64 *val)
{
struct pci_ptm_debugfs *ptm_debugfs = data;
u64 clock;
int ret;
if (!ptm_debugfs->ops->local_clock_read)
return -EOPNOTSUPP;
ret = ptm_debugfs->ops->local_clock_read(ptm_debugfs->pdata, &clock);
if (ret)
return ret;
*val = clock;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(local_clock_fops, local_clock_get, NULL, "%llu\n");
static int master_clock_get(void *data, u64 *val)
{
struct pci_ptm_debugfs *ptm_debugfs = data;
u64 clock;
int ret;
if (!ptm_debugfs->ops->master_clock_read)
return -EOPNOTSUPP;
ret = ptm_debugfs->ops->master_clock_read(ptm_debugfs->pdata, &clock);
if (ret)
return ret;
*val = clock;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(master_clock_fops, master_clock_get, NULL, "%llu\n");
static int t1_get(void *data, u64 *val)
{
struct pci_ptm_debugfs *ptm_debugfs = data;
u64 clock;
int ret;
if (!ptm_debugfs->ops->t1_read)
return -EOPNOTSUPP;
ret = ptm_debugfs->ops->t1_read(ptm_debugfs->pdata, &clock);
if (ret)
return ret;
*val = clock;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(t1_fops, t1_get, NULL, "%llu\n");
static int t2_get(void *data, u64 *val)
{
struct pci_ptm_debugfs *ptm_debugfs = data;
u64 clock;
int ret;
if (!ptm_debugfs->ops->t2_read)
return -EOPNOTSUPP;
ret = ptm_debugfs->ops->t2_read(ptm_debugfs->pdata, &clock);
if (ret)
return ret;
*val = clock;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(t2_fops, t2_get, NULL, "%llu\n");
static int t3_get(void *data, u64 *val)
{
struct pci_ptm_debugfs *ptm_debugfs = data;
u64 clock;
int ret;
if (!ptm_debugfs->ops->t3_read)
return -EOPNOTSUPP;
ret = ptm_debugfs->ops->t3_read(ptm_debugfs->pdata, &clock);
if (ret)
return ret;
*val = clock;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(t3_fops, t3_get, NULL, "%llu\n");
static int t4_get(void *data, u64 *val)
{
struct pci_ptm_debugfs *ptm_debugfs = data;
u64 clock;
int ret;
if (!ptm_debugfs->ops->t4_read)
return -EOPNOTSUPP;
ret = ptm_debugfs->ops->t4_read(ptm_debugfs->pdata, &clock);
if (ret)
return ret;
*val = clock;
return 0;
}
DEFINE_DEBUGFS_ATTRIBUTE(t4_fops, t4_get, NULL, "%llu\n");
#define pcie_ptm_create_debugfs_file(pdata, mode, attr) \
do { \
if (ops->attr##_visible && ops->attr##_visible(pdata)) \
debugfs_create_file(#attr, mode, ptm_debugfs->debugfs, \
ptm_debugfs, &attr##_fops); \
} while (0)
/*
* pcie_ptm_create_debugfs() - Create debugfs entries for the PTM context
* @dev: PTM capable component device
* @pdata: Private data of the PTM capable component device
* @ops: PTM callback structure
*
* Create debugfs entries for exposing the PTM context of the PTM capable
* components such as Root Complex and Endpoint controllers.
*
* Return: Pointer to 'struct pci_ptm_debugfs' if success, NULL otherwise.
*/
struct pci_ptm_debugfs *pcie_ptm_create_debugfs(struct device *dev, void *pdata,
const struct pcie_ptm_ops *ops)
{
struct pci_ptm_debugfs *ptm_debugfs;
char *dirname;
int ret;
/* Caller must provide check_capability() callback */
if (!ops->check_capability)
return NULL;
/* Check for PTM capability before creating debugfs attributes */
PCI: Add debugfs support for exposing PTM context Precision Time Management (PTM) mechanism defined in PCIe spec r6.0, sec 6.21 allows precise coordination of timing information across multiple components in a PCIe hierarchy with independent local time clocks. PCI core already supports enabling PTM in the root port and endpoint devices through PTM Extended Capability registers. But the PTM context supported by the PTM capable components such as Root Complex (RC) and Endpoint (EP) controllers were not exposed as of now. Part of the reason is that the spec doesn't define how the context information is exposed to the software and left it to the vendor implementation. So there is no standardized way to get access to the context information and each vendor have defined their own way. This commit adds debugfs support to expose the PTM context to userspace from both PCIe RC and EP controllers. Since the context information is exposed in a vendor specific way, the debugfs interface allows the controller drivers to implement callbacks for each attribute, to be called by the generic PTM driver. The Controller drivers are expected to call pcie_ptm_create_debugfs() to create the debugfs attributes for the PTM context and call pcie_ptm_destroy_debugfs() to destroy them. The drivers should also populate the relevant callbacks in the 'struct pcie_ptm_ops' structure based on the controller implementation. Below PTM context are exposed through debugfs: PCIe RC ======= 1. PTM Local clock 2. PTM T2 timestamp 3. PTM T3 timestamp 4. PTM Context valid PCIe EP ======= 1. PTM Local clock 2. PTM T1 timestamp 3. PTM T4 timestamp 4. PTM Master clock 5. PTM Context update Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [kwilczynski: fix overflow issue reported by Dan Carpenter from https://lore.kernel.org/linux-pci/b41c1754-c6b7-4805-9f14-7c643d6c5304@suswa.mountain] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Link: https://patch.msgid.link/20250505-pcie-ptm-v4-1-02d26d51400b@linaro.org
2025-05-05 19:54:39 +05:30
ret = ops->check_capability(pdata);
if (!ret) {
dev_dbg(dev, "PTM capability not present\n");
return NULL;
}
ptm_debugfs = kzalloc(sizeof(*ptm_debugfs), GFP_KERNEL);
if (!ptm_debugfs)
return NULL;
dirname = devm_kasprintf(dev, GFP_KERNEL, "pcie_ptm_%s", dev_name(dev));
if (!dirname)
return NULL;
ptm_debugfs->debugfs = debugfs_create_dir(dirname, NULL);
ptm_debugfs->pdata = pdata;
ptm_debugfs->ops = ops;
mutex_init(&ptm_debugfs->lock);
pcie_ptm_create_debugfs_file(pdata, 0644, context_update);
pcie_ptm_create_debugfs_file(pdata, 0644, context_valid);
pcie_ptm_create_debugfs_file(pdata, 0444, local_clock);
pcie_ptm_create_debugfs_file(pdata, 0444, master_clock);
pcie_ptm_create_debugfs_file(pdata, 0444, t1);
pcie_ptm_create_debugfs_file(pdata, 0444, t2);
pcie_ptm_create_debugfs_file(pdata, 0444, t3);
pcie_ptm_create_debugfs_file(pdata, 0444, t4);
return ptm_debugfs;
}
EXPORT_SYMBOL_GPL(pcie_ptm_create_debugfs);
/*
* pcie_ptm_destroy_debugfs() - Destroy debugfs entries for the PTM context
* @ptm_debugfs: Pointer to the PTM debugfs struct
*/
void pcie_ptm_destroy_debugfs(struct pci_ptm_debugfs *ptm_debugfs)
{
if (!ptm_debugfs)
return;
mutex_destroy(&ptm_debugfs->lock);
debugfs_remove_recursive(ptm_debugfs->debugfs);
}
EXPORT_SYMBOL_GPL(pcie_ptm_destroy_debugfs);
#endif