linux/drivers/net/ethernet/hisilicon/hibmcge/hbg_err.h

/* SPDX-License-Identifier: GPL-2.0+ */
/* Copyright (c) 2024 Hisilicon Limited. */

#ifndef __HBG_ERR_H
#define __HBG_ERR_H

#include <linux/pci.h>

void hbg_set_pci_err_handler(struct pci_driver *pdrv);
int hbg_reset(struct hbg_priv *priv);
int hbg_rebuild(struct hbg_priv *priv);
void hbg_err_reset(struct hbg_priv *priv);

#endif
net: hibmcge: Add reset supported in this module Sometimes, if the port doesn't work, we can try to fix it by resetting it. This patch supports reset triggered by ethtool or FLR of PCIe, For example: ethtool --reset eth0 dedicated echo 1 > /sys/bus/pci/devices/0000\:83\:00.1/reset We hope that the reset can be performed only when the port is down, and the port cannot be up during the reset. Therefore, the entire reset process is protected by the rtnl lock. After the reset is complete, the hardware registers are restored to their default values. Therefore, some rebuild operations are required to rewrite the user configuration to the registers. Signed-off-by: Jijie Shao <shaojijie@huawei.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20241216040532.1566229-7-shaojijie@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> 2024-12-16 12:05:31 +08:00			`/* SPDX-License-Identifier: GPL-2.0+ */`
			`/* Copyright (c) 2024 Hisilicon Limited. */`

			`#ifndef __HBG_ERR_H`
			`#define __HBG_ERR_H`

			`#include <linux/pci.h>`

			`void hbg_set_pci_err_handler(struct pci_driver *pdrv);`
			`int hbg_reset(struct hbg_priv *priv);`
			`int hbg_rebuild(struct hbg_priv *priv);`
net: hibmcge: Add support for abnormal irq handling feature the hardware error was reported by interrupt, and need be fixed by doing function reset, but the whole reset flow takes a long time, should not do it in irq handler, so do it in scheduled task. Signed-off-by: Jijie Shao <shaojijie@huawei.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com> 2025-02-28 19:54:08 +08:00			`void hbg_err_reset(struct hbg_priv *priv);`
net: hibmcge: Add reset supported in this module Sometimes, if the port doesn't work, we can try to fix it by resetting it. This patch supports reset triggered by ethtool or FLR of PCIe, For example: ethtool --reset eth0 dedicated echo 1 > /sys/bus/pci/devices/0000\:83\:00.1/reset We hope that the reset can be performed only when the port is down, and the port cannot be up during the reset. Therefore, the entire reset process is protected by the rtnl lock. After the reset is complete, the hardware registers are restored to their default values. Therefore, some rebuild operations are required to rewrite the user configuration to the registers. Signed-off-by: Jijie Shao <shaojijie@huawei.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20241216040532.1566229-7-shaojijie@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org> 2024-12-16 12:05:31 +08:00
			`#endif`