2022-08-18 12:16:26 -04:00
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/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later */
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/*
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* Copyright 2008 - 2015 Freescale Semiconductor Inc.
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2015-12-21 02:21:30 +02:00
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*/
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#ifndef __MAC_H
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#define __MAC_H
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#include <linux/device.h>
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#include <linux/if_ether.h>
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#include <linux/phy.h>
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net: dpaa: Convert to phylink
This converts DPAA to phylink. All macs are converted. This should work
with no device tree modifications (including those made in this series),
except for QSGMII (as noted previously).
The mEMAC configuration is one of the tricker areas. I have tried to
capture all the restrictions across the various models. Most of the time,
we assume that if the serdes supports a mode or the phy-interface-mode
specifies it, then we support it. The only place we can't do this is
(RG)MII, since there's no serdes. In that case, we rely on a (new)
devicetree property. There are also several cases where half-duplex is
broken. Unfortunately, only a single compatible is used for the MAC, so we
have to use the board compatible instead.
The 10GEC conversion is very straightforward, since it only supports XAUI.
There is generally nothing to configure.
The dTSEC conversion is broadly similar to mEMAC, but is simpler because we
don't support configuring the SerDes (though this can be easily added) and
we don't have multiple PCSs. From what I can tell, there's nothing
different in the driver or documentation between SGMII and 1000BASE-X
except for the advertising. Similarly, I couldn't find anything about
2500BASE-X. In both cases, I treat them like SGMII. These modes aren't used
by any in-tree boards. Similarly, despite being mentioned in the driver, I
couldn't find any documented SoCs which supported QSGMII. I have left it
unimplemented for now.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-10-17 16:22:38 -04:00
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#include <linux/phylink.h>
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2015-12-21 02:21:30 +02:00
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#include <linux/list.h>
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#include "fman_port.h"
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#include "fman.h"
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#include "fman_mac.h"
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struct fman_mac;
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struct mac_priv_s;
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2024-10-15 09:01:21 +03:00
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#define PORT_NUM 2
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2015-12-21 02:21:30 +02:00
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struct mac_device {
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2022-09-02 17:57:27 -04:00
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void __iomem *vaddr;
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2022-08-18 12:16:32 -04:00
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struct device *dev;
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2022-10-20 11:50:41 -04:00
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struct resource *res;
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2015-12-21 02:21:30 +02:00
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u8 addr[ETH_ALEN];
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2024-10-15 09:01:21 +03:00
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struct fman_port *port[PORT_NUM];
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net: dpaa: Convert to phylink
This converts DPAA to phylink. All macs are converted. This should work
with no device tree modifications (including those made in this series),
except for QSGMII (as noted previously).
The mEMAC configuration is one of the tricker areas. I have tried to
capture all the restrictions across the various models. Most of the time,
we assume that if the serdes supports a mode or the phy-interface-mode
specifies it, then we support it. The only place we can't do this is
(RG)MII, since there's no serdes. In that case, we rely on a (new)
devicetree property. There are also several cases where half-duplex is
broken. Unfortunately, only a single compatible is used for the MAC, so we
have to use the board compatible instead.
The 10GEC conversion is very straightforward, since it only supports XAUI.
There is generally nothing to configure.
The dTSEC conversion is broadly similar to mEMAC, but is simpler because we
don't support configuring the SerDes (though this can be easily added) and
we don't have multiple PCSs. From what I can tell, there's nothing
different in the driver or documentation between SGMII and 1000BASE-X
except for the advertising. Similarly, I couldn't find anything about
2500BASE-X. In both cases, I treat them like SGMII. These modes aren't used
by any in-tree boards. Similarly, despite being mentioned in the driver, I
couldn't find any documented SoCs which supported QSGMII. I have left it
unimplemented for now.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-10-17 16:22:38 -04:00
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struct phylink *phylink;
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struct phylink_config phylink_config;
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2017-10-16 21:36:06 +03:00
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phy_interface_t phy_if;
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2015-12-21 02:21:30 +02:00
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bool promisc;
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2018-02-26 11:24:04 -06:00
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bool allmulti;
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2015-12-21 02:21:30 +02:00
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net: dpaa: Convert to phylink
This converts DPAA to phylink. All macs are converted. This should work
with no device tree modifications (including those made in this series),
except for QSGMII (as noted previously).
The mEMAC configuration is one of the tricker areas. I have tried to
capture all the restrictions across the various models. Most of the time,
we assume that if the serdes supports a mode or the phy-interface-mode
specifies it, then we support it. The only place we can't do this is
(RG)MII, since there's no serdes. In that case, we rely on a (new)
devicetree property. There are also several cases where half-duplex is
broken. Unfortunately, only a single compatible is used for the MAC, so we
have to use the board compatible instead.
The 10GEC conversion is very straightforward, since it only supports XAUI.
There is generally nothing to configure.
The dTSEC conversion is broadly similar to mEMAC, but is simpler because we
don't support configuring the SerDes (though this can be easily added) and
we don't have multiple PCSs. From what I can tell, there's nothing
different in the driver or documentation between SGMII and 1000BASE-X
except for the advertising. Similarly, I couldn't find anything about
2500BASE-X. In both cases, I treat them like SGMII. These modes aren't used
by any in-tree boards. Similarly, despite being mentioned in the driver, I
couldn't find any documented SoCs which supported QSGMII. I have left it
unimplemented for now.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-10-17 16:22:38 -04:00
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const struct phylink_mac_ops *phylink_ops;
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2022-08-18 12:16:28 -04:00
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int (*enable)(struct fman_mac *mac_dev);
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2022-09-02 17:57:32 -04:00
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void (*disable)(struct fman_mac *mac_dev);
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2015-12-21 02:21:30 +02:00
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int (*set_promisc)(struct fman_mac *mac_dev, bool enable);
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2021-10-14 07:24:31 -07:00
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int (*change_addr)(struct fman_mac *mac_dev, const enet_addr_t *enet_addr);
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2018-02-26 11:24:04 -06:00
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int (*set_allmulti)(struct fman_mac *mac_dev, bool enable);
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2018-06-25 20:37:12 +08:00
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int (*set_tstamp)(struct fman_mac *mac_dev, bool enable);
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2015-12-21 02:21:30 +02:00
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int (*set_exception)(struct fman_mac *mac_dev,
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enum fman_mac_exceptions exception, bool enable);
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int (*add_hash_mac_addr)(struct fman_mac *mac_dev,
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enet_addr_t *eth_addr);
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int (*remove_hash_mac_addr)(struct fman_mac *mac_dev,
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enet_addr_t *eth_addr);
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2022-09-02 17:57:36 -04:00
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void (*update_speed)(struct mac_device *mac_dev, int speed);
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2015-12-21 02:21:30 +02:00
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struct fman_mac *fman_mac;
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struct mac_priv_s *priv;
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2024-10-15 09:01:21 +03:00
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struct device *fman_dev;
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struct device *fman_port_devs[PORT_NUM];
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2015-12-21 02:21:30 +02:00
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};
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net: dpaa: Convert to phylink
This converts DPAA to phylink. All macs are converted. This should work
with no device tree modifications (including those made in this series),
except for QSGMII (as noted previously).
The mEMAC configuration is one of the tricker areas. I have tried to
capture all the restrictions across the various models. Most of the time,
we assume that if the serdes supports a mode or the phy-interface-mode
specifies it, then we support it. The only place we can't do this is
(RG)MII, since there's no serdes. In that case, we rely on a (new)
devicetree property. There are also several cases where half-duplex is
broken. Unfortunately, only a single compatible is used for the MAC, so we
have to use the board compatible instead.
The 10GEC conversion is very straightforward, since it only supports XAUI.
There is generally nothing to configure.
The dTSEC conversion is broadly similar to mEMAC, but is simpler because we
don't support configuring the SerDes (though this can be easily added) and
we don't have multiple PCSs. From what I can tell, there's nothing
different in the driver or documentation between SGMII and 1000BASE-X
except for the advertising. Similarly, I couldn't find anything about
2500BASE-X. In both cases, I treat them like SGMII. These modes aren't used
by any in-tree boards. Similarly, despite being mentioned in the driver, I
couldn't find any documented SoCs which supported QSGMII. I have left it
unimplemented for now.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2022-10-17 16:22:38 -04:00
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static inline struct mac_device
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*fman_config_to_mac(struct phylink_config *config)
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{
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return container_of(config, struct mac_device, phylink_config);
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}
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2015-12-21 02:21:30 +02:00
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struct dpaa_eth_data {
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struct mac_device *mac_dev;
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int mac_hw_id;
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int fman_hw_id;
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};
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extern const char *mac_driver_description;
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2022-08-18 12:16:34 -04:00
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int fman_set_multi(struct net_device *net_dev, struct mac_device *mac_dev);
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2015-12-21 02:21:30 +02:00
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#endif /* __MAC_H */
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