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linux/drivers/misc/mchp_pci1xxxx/Kconfig

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misc: microchip: pci1xxxx: load auxiliary bus driver for the PIO function in the multi-function endpoint of pci1xxxx device. pci1xxxx is a PCIe switch with a multi-function endpoint on one of its downstream ports. PIO function is one of the functions in the multi-function endpoint. PIO function combines a GPIO controller and also an interface to program pci1xxxx's OTP & EEPROM. This auxiliary bus driver is loaded for the PIO function and separate child devices are enumerated for GPIO controller and OTP/EEPROM interface. Signed-off-by: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com> Link: https://lore.kernel.org/r/20220824200047.150308-2-kumaravel.thiagarajan@microchip.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-08-25 01:30:43 +05:30
config GP_PCI1XXXX
tristate "Microchip PCI1XXXX PCIe to GPIO Expander + OTP/EEPROM manager"
misc: microchip: pci1xxxx: fix dependency issues in building the pci1xxxx's aux bus driver. build errors and warnings listed below and reported by kernel test robot <lkp@intel.com> on the char-misc-next branch are fixed in this add-on patch. errors: ERROR: modpost: "auxiliary_device_init" [drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.ko] undefined! ERROR: modpost: "__auxiliary_device_add" [drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.ko] undefined! ERROR: modpost: "auxiliary_driver_unregister" [drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.ko] undefined! ERROR: modpost: "__auxiliary_driver_register" [drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.ko] undefined! ia64-linux-ld: drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.o: in function `gp_aux_bus_probe.part.0': mchp_pci1xxxx_gp.c:(.text+0x342): undefined reference to `auxiliary_device_init' ia64-linux-ld: mchp_pci1xxxx_gp.c:(.text+0x392): undefined reference to `__auxiliary_device_add' ia64-linux-ld: mchp_pci1xxxx_gp.c:(.text+0x5c2): undefined reference to `auxiliary_device_init' ia64-linux-ld: mchp_pci1xxxx_gp.c:(.text+0x612): undefined reference to `__auxiliary_device_add' ia64-linux-ld: drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.o: in function `pci1xxxx_gpio_driver_init': mchp_pci1xxxx_gpio.c:(.init.text+0x42): undefined reference to `__auxiliary_driver_register' warnings: unmet direct dependencies detected for GPIOLIB_IRQCHIP when selected by GP_PCI1XXXX Fixes: 393fc2f5948f ("misc: microchip: pci1xxxx: load auxiliary bus driver for the PIO function in the multi-function endpoint of pci1xxxx device.") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com> Link: https://lore.kernel.org/r/20220906124951.696776-1-kumaravel.thiagarajan@microchip.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-09-06 18:19:51 +05:30
depends on PCI
depends on GPIOLIB
misc: microchip: pci1xxxx: Add support to read and write into PCI1XXXX OTP via NVMEM sysfs Microchip's pci1xxxx is an unmanaged PCIe3.1a switch for consumer, industrial, and automotive applications. This switch integrates OTP and EEPROM to enable customization of the part in the field. This patch adds support to read and write into PCI1XXXX OTP via NVMEM sysfs. Signed-off-by: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com> Co-developed-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com> Signed-off-by: Tharun Kumar P <tharunkumar.pasumarthi@microchip.com> Co-developed-by: Vaibhaav Ram T.L <vaibhaavram.tl@microchip.com> Signed-off-by: Vaibhaav Ram T.L <vaibhaavram.tl@microchip.com> Link: https://lore.kernel.org/r/20230620143520.858-2-vaibhaavram.tl@microchip.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-06-20 20:05:19 +05:30
depends on NVMEM_SYSFS
misc: microchip: pci1xxxx: load auxiliary bus driver for the PIO function in the multi-function endpoint of pci1xxxx device. pci1xxxx is a PCIe switch with a multi-function endpoint on one of its downstream ports. PIO function is one of the functions in the multi-function endpoint. PIO function combines a GPIO controller and also an interface to program pci1xxxx's OTP & EEPROM. This auxiliary bus driver is loaded for the PIO function and separate child devices are enumerated for GPIO controller and OTP/EEPROM interface. Signed-off-by: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com> Link: https://lore.kernel.org/r/20220824200047.150308-2-kumaravel.thiagarajan@microchip.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-08-25 01:30:43 +05:30
select GPIOLIB_IRQCHIP
misc: microchip: pci1xxxx: fix dependency issues in building the pci1xxxx's aux bus driver. build errors and warnings listed below and reported by kernel test robot <lkp@intel.com> on the char-misc-next branch are fixed in this add-on patch. errors: ERROR: modpost: "auxiliary_device_init" [drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.ko] undefined! ERROR: modpost: "__auxiliary_device_add" [drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.ko] undefined! ERROR: modpost: "auxiliary_driver_unregister" [drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.ko] undefined! ERROR: modpost: "__auxiliary_driver_register" [drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.ko] undefined! ia64-linux-ld: drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gp.o: in function `gp_aux_bus_probe.part.0': mchp_pci1xxxx_gp.c:(.text+0x342): undefined reference to `auxiliary_device_init' ia64-linux-ld: mchp_pci1xxxx_gp.c:(.text+0x392): undefined reference to `__auxiliary_device_add' ia64-linux-ld: mchp_pci1xxxx_gp.c:(.text+0x5c2): undefined reference to `auxiliary_device_init' ia64-linux-ld: mchp_pci1xxxx_gp.c:(.text+0x612): undefined reference to `__auxiliary_device_add' ia64-linux-ld: drivers/misc/mchp_pci1xxxx/mchp_pci1xxxx_gpio.o: in function `pci1xxxx_gpio_driver_init': mchp_pci1xxxx_gpio.c:(.init.text+0x42): undefined reference to `__auxiliary_driver_register' warnings: unmet direct dependencies detected for GPIOLIB_IRQCHIP when selected by GP_PCI1XXXX Fixes: 393fc2f5948f ("misc: microchip: pci1xxxx: load auxiliary bus driver for the PIO function in the multi-function endpoint of pci1xxxx device.") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com> Link: https://lore.kernel.org/r/20220906124951.696776-1-kumaravel.thiagarajan@microchip.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-09-06 18:19:51 +05:30
select AUXILIARY_BUS
misc: microchip: pci1xxxx: load auxiliary bus driver for the PIO function in the multi-function endpoint of pci1xxxx device. pci1xxxx is a PCIe switch with a multi-function endpoint on one of its downstream ports. PIO function is one of the functions in the multi-function endpoint. PIO function combines a GPIO controller and also an interface to program pci1xxxx's OTP & EEPROM. This auxiliary bus driver is loaded for the PIO function and separate child devices are enumerated for GPIO controller and OTP/EEPROM interface. Signed-off-by: Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com> Link: https://lore.kernel.org/r/20220824200047.150308-2-kumaravel.thiagarajan@microchip.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-08-25 01:30:43 +05:30
help
PCI1XXXX is a PCIe GEN 3 switch with one of the endpoints having
multiple functions and one of the functions is a GPIO controller
which also has registers to interface with the OTP and EEPROM.
Select yes, no or module here to include or exclude the driver
for the GPIO function.
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