2022-02-24 11:10:04 +08:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2020-2021 NXP
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*/
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#include <linux/init.h>
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#include <linux/interconnect.h>
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#include <linux/ioctl.h>
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#include <linux/list.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/videodev2.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-event.h>
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#include <media/v4l2-mem2mem.h>
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#include <media/v4l2-ioctl.h>
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#include <media/videobuf2-v4l2.h>
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#include <media/videobuf2-dma-contig.h>
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#include <media/videobuf2-vmalloc.h>
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#include "vpu.h"
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#include "vpu_core.h"
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#include "vpu_v4l2.h"
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#include "vpu_msgs.h"
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#include "vpu_helpers.h"
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void vpu_inst_lock(struct vpu_inst *inst)
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{
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mutex_lock(&inst->lock);
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}
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void vpu_inst_unlock(struct vpu_inst *inst)
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{
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mutex_unlock(&inst->lock);
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}
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dma_addr_t vpu_get_vb_phy_addr(struct vb2_buffer *vb, u32 plane_no)
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{
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if (plane_no >= vb->num_planes)
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return 0;
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return vb2_dma_contig_plane_dma_addr(vb, plane_no) +
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vb->planes[plane_no].data_offset;
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}
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unsigned int vpu_get_vb_length(struct vb2_buffer *vb, u32 plane_no)
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{
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if (plane_no >= vb->num_planes)
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return 0;
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return vb2_plane_size(vb, plane_no) - vb->planes[plane_no].data_offset;
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}
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void vpu_set_buffer_state(struct vb2_v4l2_buffer *vbuf, unsigned int state)
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{
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struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf);
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vpu_buf->state = state;
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}
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unsigned int vpu_get_buffer_state(struct vb2_v4l2_buffer *vbuf)
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{
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struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf);
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return vpu_buf->state;
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}
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2024-05-06 17:49:18 +09:00
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void vpu_set_buffer_average_qp(struct vb2_v4l2_buffer *vbuf, u32 qp)
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{
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struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf);
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vpu_buf->average_qp = qp;
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}
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2022-02-24 11:10:04 +08:00
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void vpu_v4l2_set_error(struct vpu_inst *inst)
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{
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vpu_inst_lock(inst);
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dev_err(inst->dev, "some error occurs in codec\n");
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if (inst->fh.m2m_ctx) {
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2022-11-01 08:04:53 +00:00
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vb2_queue_error(v4l2_m2m_get_src_vq(inst->fh.m2m_ctx));
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vb2_queue_error(v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx));
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2022-02-24 11:10:04 +08:00
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}
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vpu_inst_unlock(inst);
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}
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int vpu_notify_eos(struct vpu_inst *inst)
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{
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static const struct v4l2_event ev = {
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.id = 0,
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.type = V4L2_EVENT_EOS
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};
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vpu_trace(inst->dev, "[%d]\n", inst->id);
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v4l2_event_queue_fh(&inst->fh, &ev);
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return 0;
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}
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int vpu_notify_source_change(struct vpu_inst *inst)
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{
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static const struct v4l2_event ev = {
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.id = 0,
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.type = V4L2_EVENT_SOURCE_CHANGE,
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.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION
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};
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vpu_trace(inst->dev, "[%d]\n", inst->id);
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v4l2_event_queue_fh(&inst->fh, &ev);
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return 0;
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}
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2023-05-06 16:47:35 +08:00
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int vpu_set_last_buffer_dequeued(struct vpu_inst *inst, bool eos)
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2022-02-24 11:10:04 +08:00
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{
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struct vb2_queue *q;
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if (!inst || !inst->fh.m2m_ctx)
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return -EINVAL;
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q = v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx);
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if (!list_empty(&q->done_list))
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return -EINVAL;
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if (q->last_buffer_dequeued)
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return 0;
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vpu_trace(inst->dev, "last buffer dequeued\n");
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q->last_buffer_dequeued = true;
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wake_up(&q->done_wq);
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2023-05-06 16:47:35 +08:00
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if (eos)
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vpu_notify_eos(inst);
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2022-02-24 11:10:04 +08:00
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return 0;
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}
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2022-04-20 13:34:53 +02:00
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bool vpu_is_source_empty(struct vpu_inst *inst)
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{
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struct v4l2_m2m_buffer *buf = NULL;
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if (!inst->fh.m2m_ctx)
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return true;
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v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) {
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if (vpu_get_buffer_state(&buf->vb) == VPU_BUF_STATE_IDLE)
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return false;
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}
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return true;
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}
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2022-08-25 02:38:30 +01:00
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static int vpu_init_format(struct vpu_inst *inst, struct vpu_format *fmt)
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{
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const struct vpu_format *info;
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info = vpu_helper_find_format(inst, fmt->type, fmt->pixfmt);
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if (!info) {
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info = vpu_helper_enum_format(inst, fmt->type, 0);
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if (!info)
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return -EINVAL;
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}
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memcpy(fmt, info, sizeof(*fmt));
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return 0;
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}
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static int vpu_calc_fmt_bytesperline(struct v4l2_format *f, struct vpu_format *fmt)
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2022-02-24 11:10:04 +08:00
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{
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struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp;
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2022-08-25 02:38:30 +01:00
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int i;
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if (fmt->flags & V4L2_FMT_FLAG_COMPRESSED) {
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for (i = 0; i < fmt->comp_planes; i++)
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fmt->bytesperline[i] = 0;
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return 0;
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}
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if (pixmp->num_planes == fmt->comp_planes) {
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for (i = 0; i < fmt->comp_planes; i++)
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fmt->bytesperline[i] = pixmp->plane_fmt[i].bytesperline;
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return 0;
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}
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if (pixmp->num_planes > 1)
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return -EINVAL;
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/*amphion vpu only support nv12 and nv12 tiled,
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* so the bytesperline of luma and chroma should be same
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*/
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for (i = 0; i < fmt->comp_planes; i++)
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fmt->bytesperline[i] = pixmp->plane_fmt[0].bytesperline;
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return 0;
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}
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static int vpu_calc_fmt_sizeimage(struct vpu_inst *inst, struct vpu_format *fmt)
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{
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2022-02-24 11:10:04 +08:00
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u32 stride = 1;
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int i;
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2022-08-25 02:38:30 +01:00
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if (!(fmt->flags & V4L2_FMT_FLAG_COMPRESSED)) {
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const struct vpu_core_resources *res = vpu_get_resource(inst);
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if (res)
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stride = res->stride;
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}
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for (i = 0; i < fmt->comp_planes; i++) {
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fmt->sizeimage[i] = vpu_helper_get_plane_size(fmt->pixfmt,
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fmt->width,
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fmt->height,
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i,
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stride,
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fmt->field != V4L2_FIELD_NONE ? 1 : 0,
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&fmt->bytesperline[i]);
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fmt->sizeimage[i] = max_t(u32, fmt->sizeimage[i], PAGE_SIZE);
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if (fmt->flags & V4L2_FMT_FLAG_COMPRESSED) {
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fmt->sizeimage[i] = clamp_val(fmt->sizeimage[i], SZ_128K, SZ_8M);
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fmt->bytesperline[i] = 0;
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}
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2022-02-24 11:10:04 +08:00
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}
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2022-08-25 02:38:30 +01:00
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return 0;
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}
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u32 vpu_get_fmt_plane_size(struct vpu_format *fmt, u32 plane_no)
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{
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u32 size;
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int i;
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if (plane_no >= fmt->mem_planes)
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return 0;
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if (fmt->comp_planes == fmt->mem_planes)
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return fmt->sizeimage[plane_no];
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if (plane_no < fmt->mem_planes - 1)
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return fmt->sizeimage[plane_no];
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size = fmt->sizeimage[plane_no];
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for (i = fmt->mem_planes; i < fmt->comp_planes; i++)
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size += fmt->sizeimage[i];
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return size;
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}
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int vpu_try_fmt_common(struct vpu_inst *inst, struct v4l2_format *f, struct vpu_format *fmt)
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{
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struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp;
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int i;
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int ret;
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fmt->pixfmt = pixmp->pixelformat;
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fmt->type = f->type;
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ret = vpu_init_format(inst, fmt);
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if (ret < 0)
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return ret;
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fmt->width = pixmp->width;
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fmt->height = pixmp->height;
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if (fmt->width)
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fmt->width = vpu_helper_valid_frame_width(inst, fmt->width);
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if (fmt->height)
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fmt->height = vpu_helper_valid_frame_height(inst, fmt->height);
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fmt->field = pixmp->field == V4L2_FIELD_ANY ? V4L2_FIELD_NONE : pixmp->field;
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vpu_calc_fmt_bytesperline(f, fmt);
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vpu_calc_fmt_sizeimage(inst, fmt);
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if ((fmt->flags & V4L2_FMT_FLAG_COMPRESSED) && pixmp->plane_fmt[0].sizeimage)
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fmt->sizeimage[0] = clamp_val(pixmp->plane_fmt[0].sizeimage, SZ_128K, SZ_8M);
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pixmp->pixelformat = fmt->pixfmt;
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pixmp->width = fmt->width;
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pixmp->height = fmt->height;
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2022-02-24 11:10:04 +08:00
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pixmp->flags = fmt->flags;
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2022-08-25 02:38:30 +01:00
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pixmp->num_planes = fmt->mem_planes;
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pixmp->field = fmt->field;
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memset(pixmp->reserved, 0, sizeof(pixmp->reserved));
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2022-02-24 11:10:04 +08:00
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for (i = 0; i < pixmp->num_planes; i++) {
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2022-08-25 02:38:30 +01:00
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pixmp->plane_fmt[i].bytesperline = fmt->bytesperline[i];
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pixmp->plane_fmt[i].sizeimage = vpu_get_fmt_plane_size(fmt, i);
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memset(pixmp->plane_fmt[i].reserved, 0, sizeof(pixmp->plane_fmt[i].reserved));
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2022-02-24 11:10:04 +08:00
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}
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2022-08-25 02:38:30 +01:00
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return 0;
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2022-02-24 11:10:04 +08:00
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}
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static bool vpu_check_ready(struct vpu_inst *inst, u32 type)
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{
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if (!inst)
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return false;
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if (inst->state == VPU_CODEC_STATE_DEINIT || inst->id < 0)
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return false;
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if (!inst->ops->check_ready)
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return true;
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return call_vop(inst, check_ready, type);
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}
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int vpu_process_output_buffer(struct vpu_inst *inst)
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{
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struct v4l2_m2m_buffer *buf = NULL;
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struct vb2_v4l2_buffer *vbuf = NULL;
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if (!inst || !inst->fh.m2m_ctx)
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return -EINVAL;
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if (!vpu_check_ready(inst, inst->out_format.type))
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return -EINVAL;
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v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) {
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vbuf = &buf->vb;
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if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_IDLE)
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break;
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vbuf = NULL;
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}
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if (!vbuf)
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return -EINVAL;
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dev_dbg(inst->dev, "[%d]frame id = %d / %d\n",
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inst->id, vbuf->sequence, inst->sequence);
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return call_vop(inst, process_output, &vbuf->vb2_buf);
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}
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int vpu_process_capture_buffer(struct vpu_inst *inst)
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{
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struct v4l2_m2m_buffer *buf = NULL;
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struct vb2_v4l2_buffer *vbuf = NULL;
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if (!inst || !inst->fh.m2m_ctx)
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return -EINVAL;
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if (!vpu_check_ready(inst, inst->cap_format.type))
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return -EINVAL;
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v4l2_m2m_for_each_dst_buf(inst->fh.m2m_ctx, buf) {
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vbuf = &buf->vb;
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if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_IDLE)
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break;
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vbuf = NULL;
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}
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if (!vbuf)
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return -EINVAL;
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return call_vop(inst, process_capture, &vbuf->vb2_buf);
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}
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2022-04-20 13:34:53 +02:00
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struct vb2_v4l2_buffer *vpu_next_src_buf(struct vpu_inst *inst)
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{
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2022-11-21 06:34:42 +00:00
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struct vb2_v4l2_buffer *src_buf = NULL;
|
2022-04-20 13:34:53 +02:00
|
|
|
|
2022-11-21 06:34:42 +00:00
|
|
|
if (!inst->fh.m2m_ctx)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
src_buf = v4l2_m2m_next_src_buf(inst->fh.m2m_ctx);
|
2022-04-20 13:34:53 +02:00
|
|
|
if (!src_buf || vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_IDLE)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
while (vpu_vb_is_codecconfig(src_buf)) {
|
|
|
|
v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx);
|
|
|
|
vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE);
|
|
|
|
v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
|
|
|
|
|
|
|
|
src_buf = v4l2_m2m_next_src_buf(inst->fh.m2m_ctx);
|
|
|
|
if (!src_buf || vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_IDLE)
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return src_buf;
|
|
|
|
}
|
|
|
|
|
|
|
|
void vpu_skip_frame(struct vpu_inst *inst, int count)
|
|
|
|
{
|
|
|
|
struct vb2_v4l2_buffer *src_buf;
|
|
|
|
enum vb2_buffer_state state;
|
|
|
|
int i = 0;
|
|
|
|
|
2022-11-21 06:34:42 +00:00
|
|
|
if (count <= 0 || !inst->fh.m2m_ctx)
|
2022-04-20 13:34:53 +02:00
|
|
|
return;
|
|
|
|
|
|
|
|
while (i < count) {
|
|
|
|
src_buf = v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx);
|
|
|
|
if (!src_buf || vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_IDLE)
|
|
|
|
return;
|
|
|
|
if (vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_DECODED)
|
|
|
|
state = VB2_BUF_STATE_DONE;
|
|
|
|
else
|
|
|
|
state = VB2_BUF_STATE_ERROR;
|
|
|
|
i++;
|
|
|
|
vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE);
|
|
|
|
v4l2_m2m_buf_done(src_buf, state);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-02-24 11:10:04 +08:00
|
|
|
struct vb2_v4l2_buffer *vpu_find_buf_by_sequence(struct vpu_inst *inst, u32 type, u32 sequence)
|
|
|
|
{
|
|
|
|
struct v4l2_m2m_buffer *buf = NULL;
|
|
|
|
struct vb2_v4l2_buffer *vbuf = NULL;
|
|
|
|
|
|
|
|
if (!inst || !inst->fh.m2m_ctx)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
if (V4L2_TYPE_IS_OUTPUT(type)) {
|
|
|
|
v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) {
|
|
|
|
vbuf = &buf->vb;
|
|
|
|
if (vbuf->sequence == sequence)
|
|
|
|
break;
|
|
|
|
vbuf = NULL;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
v4l2_m2m_for_each_dst_buf(inst->fh.m2m_ctx, buf) {
|
|
|
|
vbuf = &buf->vb;
|
|
|
|
if (vbuf->sequence == sequence)
|
|
|
|
break;
|
|
|
|
vbuf = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return vbuf;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct vb2_v4l2_buffer *vpu_find_buf_by_idx(struct vpu_inst *inst, u32 type, u32 idx)
|
|
|
|
{
|
|
|
|
struct v4l2_m2m_buffer *buf = NULL;
|
|
|
|
struct vb2_v4l2_buffer *vbuf = NULL;
|
|
|
|
|
|
|
|
if (!inst || !inst->fh.m2m_ctx)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
if (V4L2_TYPE_IS_OUTPUT(type)) {
|
|
|
|
v4l2_m2m_for_each_src_buf(inst->fh.m2m_ctx, buf) {
|
|
|
|
vbuf = &buf->vb;
|
|
|
|
if (vbuf->vb2_buf.index == idx)
|
|
|
|
break;
|
|
|
|
vbuf = NULL;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
v4l2_m2m_for_each_dst_buf(inst->fh.m2m_ctx, buf) {
|
|
|
|
vbuf = &buf->vb;
|
|
|
|
if (vbuf->vb2_buf.index == idx)
|
|
|
|
break;
|
|
|
|
vbuf = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return vbuf;
|
|
|
|
}
|
|
|
|
|
|
|
|
int vpu_get_num_buffers(struct vpu_inst *inst, u32 type)
|
|
|
|
{
|
|
|
|
struct vb2_queue *q;
|
|
|
|
|
|
|
|
if (!inst || !inst->fh.m2m_ctx)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (V4L2_TYPE_IS_OUTPUT(type))
|
|
|
|
q = v4l2_m2m_get_src_vq(inst->fh.m2m_ctx);
|
|
|
|
else
|
|
|
|
q = v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx);
|
|
|
|
|
2023-11-09 17:29:22 +01:00
|
|
|
return vb2_get_num_buffers(q);
|
2022-02-24 11:10:04 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void vpu_m2m_device_run(void *priv)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vpu_m2m_job_abort(void *priv)
|
|
|
|
{
|
|
|
|
struct vpu_inst *inst = priv;
|
|
|
|
struct v4l2_m2m_ctx *m2m_ctx = inst->fh.m2m_ctx;
|
|
|
|
|
|
|
|
v4l2_m2m_job_finish(m2m_ctx->m2m_dev, m2m_ctx);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct v4l2_m2m_ops vpu_m2m_ops = {
|
|
|
|
.device_run = vpu_m2m_device_run,
|
|
|
|
.job_abort = vpu_m2m_job_abort
|
|
|
|
};
|
|
|
|
|
|
|
|
static int vpu_vb2_queue_setup(struct vb2_queue *vq,
|
|
|
|
unsigned int *buf_count,
|
|
|
|
unsigned int *plane_count,
|
|
|
|
unsigned int psize[],
|
|
|
|
struct device *allocators[])
|
|
|
|
{
|
|
|
|
struct vpu_inst *inst = vb2_get_drv_priv(vq);
|
|
|
|
struct vpu_format *cur_fmt;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
cur_fmt = vpu_get_format(inst, vq->type);
|
|
|
|
|
|
|
|
if (*plane_count) {
|
2022-08-25 02:38:30 +01:00
|
|
|
if (*plane_count != cur_fmt->mem_planes)
|
2022-02-24 11:10:04 +08:00
|
|
|
return -EINVAL;
|
2022-08-25 02:38:30 +01:00
|
|
|
for (i = 0; i < cur_fmt->mem_planes; i++) {
|
|
|
|
if (psize[i] < vpu_get_fmt_plane_size(cur_fmt, i))
|
2022-02-24 11:10:04 +08:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2022-03-22 09:28:59 +01:00
|
|
|
if (V4L2_TYPE_IS_OUTPUT(vq->type))
|
|
|
|
*buf_count = max_t(unsigned int, *buf_count, inst->min_buffer_out);
|
|
|
|
else
|
|
|
|
*buf_count = max_t(unsigned int, *buf_count, inst->min_buffer_cap);
|
2022-08-25 02:38:30 +01:00
|
|
|
*plane_count = cur_fmt->mem_planes;
|
|
|
|
for (i = 0; i < cur_fmt->mem_planes; i++)
|
|
|
|
psize[i] = vpu_get_fmt_plane_size(cur_fmt, i);
|
2022-02-24 11:10:04 +08:00
|
|
|
|
2023-06-13 15:48:46 +08:00
|
|
|
if (V4L2_TYPE_IS_OUTPUT(vq->type) && inst->state == VPU_CODEC_STATE_SEEK) {
|
|
|
|
vpu_trace(inst->dev, "reinit when VIDIOC_REQBUFS(OUTPUT, 0)\n");
|
|
|
|
call_void_vop(inst, release);
|
|
|
|
}
|
|
|
|
|
2025-04-24 18:33:24 +08:00
|
|
|
if (V4L2_TYPE_IS_CAPTURE(vq->type))
|
|
|
|
call_void_vop(inst, reset_frame_store);
|
|
|
|
|
2022-02-24 11:10:04 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vpu_vb2_buf_init(struct vb2_buffer *vb)
|
|
|
|
{
|
|
|
|
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
|
2025-04-24 18:33:24 +08:00
|
|
|
struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf);
|
|
|
|
struct vpu_inst *inst = vb2_get_drv_priv(vb->vb2_queue);
|
2022-02-24 11:10:04 +08:00
|
|
|
|
2025-04-24 18:33:24 +08:00
|
|
|
vpu_buf->fs_id = -1;
|
2022-02-24 11:10:04 +08:00
|
|
|
vpu_set_buffer_state(vbuf, VPU_BUF_STATE_IDLE);
|
2025-04-24 18:33:24 +08:00
|
|
|
|
|
|
|
if (!inst->ops->attach_frame_store || V4L2_TYPE_IS_OUTPUT(vb->type))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
call_void_vop(inst, attach_frame_store, vb);
|
2022-02-24 11:10:04 +08:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vpu_vb2_buf_out_validate(struct vb2_buffer *vb)
|
|
|
|
{
|
|
|
|
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
|
|
|
|
|
|
|
|
vbuf->field = V4L2_FIELD_NONE;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vpu_vb2_buf_prepare(struct vb2_buffer *vb)
|
|
|
|
{
|
|
|
|
struct vpu_inst *inst = vb2_get_drv_priv(vb->vb2_queue);
|
|
|
|
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
|
|
|
|
struct vpu_format *cur_fmt;
|
|
|
|
u32 i;
|
|
|
|
|
|
|
|
cur_fmt = vpu_get_format(inst, vb->type);
|
2022-08-25 02:38:30 +01:00
|
|
|
for (i = 0; i < cur_fmt->mem_planes; i++) {
|
|
|
|
if (vpu_get_vb_length(vb, i) < vpu_get_fmt_plane_size(cur_fmt, i)) {
|
2022-02-24 11:10:04 +08:00
|
|
|
dev_dbg(inst->dev, "[%d] %s buf[%d] is invalid\n",
|
|
|
|
inst->id, vpu_type_name(vb->type), vb->index);
|
|
|
|
vpu_set_buffer_state(vbuf, VPU_BUF_STATE_ERROR);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vpu_vb2_buf_finish(struct vb2_buffer *vb)
|
|
|
|
{
|
|
|
|
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
|
|
|
|
struct vpu_inst *inst = vb2_get_drv_priv(vb->vb2_queue);
|
|
|
|
struct vb2_queue *q = vb->vb2_queue;
|
|
|
|
|
2024-05-06 17:49:18 +09:00
|
|
|
if (V4L2_TYPE_IS_CAPTURE(vb->type)) {
|
|
|
|
struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf);
|
|
|
|
struct v4l2_ctrl *ctrl = v4l2_ctrl_find(&inst->ctrl_handler,
|
|
|
|
V4L2_CID_MPEG_VIDEO_AVERAGE_QP);
|
|
|
|
|
|
|
|
if (ctrl)
|
|
|
|
v4l2_ctrl_s_ctrl(ctrl, vpu_buf->average_qp);
|
|
|
|
}
|
|
|
|
|
2022-02-24 11:10:04 +08:00
|
|
|
if (vbuf->flags & V4L2_BUF_FLAG_LAST)
|
|
|
|
vpu_notify_eos(inst);
|
|
|
|
|
|
|
|
if (list_empty(&q->done_list))
|
|
|
|
call_void_vop(inst, on_queue_empty, q->type);
|
|
|
|
}
|
|
|
|
|
|
|
|
void vpu_vb2_buffers_return(struct vpu_inst *inst, unsigned int type, enum vb2_buffer_state state)
|
|
|
|
{
|
|
|
|
struct vb2_v4l2_buffer *buf;
|
|
|
|
|
|
|
|
if (V4L2_TYPE_IS_OUTPUT(type)) {
|
2022-03-11 06:17:07 +01:00
|
|
|
while ((buf = v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx))) {
|
|
|
|
vpu_set_buffer_state(buf, VPU_BUF_STATE_IDLE);
|
2022-02-24 11:10:04 +08:00
|
|
|
v4l2_m2m_buf_done(buf, state);
|
2022-03-11 06:17:07 +01:00
|
|
|
}
|
2022-02-24 11:10:04 +08:00
|
|
|
} else {
|
2022-03-11 06:17:07 +01:00
|
|
|
while ((buf = v4l2_m2m_dst_buf_remove(inst->fh.m2m_ctx))) {
|
|
|
|
vpu_set_buffer_state(buf, VPU_BUF_STATE_IDLE);
|
2022-02-24 11:10:04 +08:00
|
|
|
v4l2_m2m_buf_done(buf, state);
|
2022-03-11 06:17:07 +01:00
|
|
|
}
|
2022-02-24 11:10:04 +08:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vpu_vb2_start_streaming(struct vb2_queue *q, unsigned int count)
|
|
|
|
{
|
|
|
|
struct vpu_inst *inst = vb2_get_drv_priv(q);
|
|
|
|
struct vpu_format *fmt = vpu_get_format(inst, q->type);
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
vpu_inst_unlock(inst);
|
|
|
|
ret = vpu_inst_register(inst);
|
|
|
|
vpu_inst_lock(inst);
|
|
|
|
if (ret) {
|
|
|
|
vpu_vb2_buffers_return(inst, q->type, VB2_BUF_STATE_QUEUED);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
vpu_trace(inst->dev, "[%d] %s %c%c%c%c %dx%d %u(%u) %u(%u) %u(%u) %d\n",
|
|
|
|
inst->id, vpu_type_name(q->type),
|
|
|
|
fmt->pixfmt,
|
|
|
|
fmt->pixfmt >> 8,
|
|
|
|
fmt->pixfmt >> 16,
|
|
|
|
fmt->pixfmt >> 24,
|
|
|
|
fmt->width, fmt->height,
|
|
|
|
fmt->sizeimage[0], fmt->bytesperline[0],
|
|
|
|
fmt->sizeimage[1], fmt->bytesperline[1],
|
|
|
|
fmt->sizeimage[2], fmt->bytesperline[2],
|
2023-11-09 17:29:22 +01:00
|
|
|
vb2_get_num_buffers(q));
|
2022-02-24 11:10:04 +08:00
|
|
|
vb2_clear_last_buffer_dequeued(q);
|
2022-06-28 06:21:12 +01:00
|
|
|
ret = call_vop(inst, start, q->type);
|
2022-06-09 10:27:59 +01:00
|
|
|
if (ret)
|
|
|
|
vpu_vb2_buffers_return(inst, q->type, VB2_BUF_STATE_QUEUED);
|
2022-02-24 11:10:04 +08:00
|
|
|
|
2022-06-09 10:27:59 +01:00
|
|
|
return ret;
|
2022-02-24 11:10:04 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
static void vpu_vb2_stop_streaming(struct vb2_queue *q)
|
|
|
|
{
|
|
|
|
struct vpu_inst *inst = vb2_get_drv_priv(q);
|
|
|
|
|
|
|
|
vpu_trace(inst->dev, "[%d] %s\n", inst->id, vpu_type_name(q->type));
|
|
|
|
|
|
|
|
call_void_vop(inst, stop, q->type);
|
|
|
|
vpu_vb2_buffers_return(inst, q->type, VB2_BUF_STATE_ERROR);
|
|
|
|
if (V4L2_TYPE_IS_OUTPUT(q->type))
|
|
|
|
inst->sequence = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vpu_vb2_buf_queue(struct vb2_buffer *vb)
|
|
|
|
{
|
|
|
|
struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
|
|
|
|
struct vpu_inst *inst = vb2_get_drv_priv(vb->vb2_queue);
|
|
|
|
|
2022-03-11 06:16:34 +01:00
|
|
|
if (V4L2_TYPE_IS_OUTPUT(vb->type))
|
2022-02-24 11:10:04 +08:00
|
|
|
vbuf->sequence = inst->sequence++;
|
|
|
|
|
|
|
|
v4l2_m2m_buf_queue(inst->fh.m2m_ctx, vbuf);
|
|
|
|
vpu_process_output_buffer(inst);
|
|
|
|
vpu_process_capture_buffer(inst);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct vb2_ops vpu_vb2_ops = {
|
|
|
|
.queue_setup = vpu_vb2_queue_setup,
|
|
|
|
.buf_init = vpu_vb2_buf_init,
|
|
|
|
.buf_out_validate = vpu_vb2_buf_out_validate,
|
|
|
|
.buf_prepare = vpu_vb2_buf_prepare,
|
|
|
|
.buf_finish = vpu_vb2_buf_finish,
|
|
|
|
.start_streaming = vpu_vb2_start_streaming,
|
|
|
|
.stop_streaming = vpu_vb2_stop_streaming,
|
|
|
|
.buf_queue = vpu_vb2_buf_queue,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int vpu_m2m_queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
|
|
|
|
{
|
|
|
|
struct vpu_inst *inst = priv;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
|
|
|
|
inst->out_format.type = src_vq->type;
|
|
|
|
src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
|
|
|
|
src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
|
|
|
|
src_vq->ops = &vpu_vb2_ops;
|
|
|
|
src_vq->mem_ops = &vb2_dma_contig_memops;
|
|
|
|
if (inst->type == VPU_CORE_TYPE_DEC && inst->use_stream_buffer)
|
|
|
|
src_vq->mem_ops = &vb2_vmalloc_memops;
|
|
|
|
src_vq->drv_priv = inst;
|
|
|
|
src_vq->buf_struct_size = sizeof(struct vpu_vb2_buffer);
|
2023-12-11 14:32:49 +01:00
|
|
|
src_vq->min_queued_buffers = 1;
|
2022-02-24 11:10:04 +08:00
|
|
|
src_vq->dev = inst->vpu->dev;
|
|
|
|
src_vq->lock = &inst->lock;
|
|
|
|
ret = vb2_queue_init(src_vq);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
|
|
|
|
inst->cap_format.type = dst_vq->type;
|
|
|
|
dst_vq->io_modes = VB2_MMAP | VB2_DMABUF;
|
|
|
|
dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
|
|
|
|
dst_vq->ops = &vpu_vb2_ops;
|
|
|
|
dst_vq->mem_ops = &vb2_dma_contig_memops;
|
|
|
|
if (inst->type == VPU_CORE_TYPE_ENC && inst->use_stream_buffer)
|
|
|
|
dst_vq->mem_ops = &vb2_vmalloc_memops;
|
|
|
|
dst_vq->drv_priv = inst;
|
|
|
|
dst_vq->buf_struct_size = sizeof(struct vpu_vb2_buffer);
|
2023-12-11 14:32:49 +01:00
|
|
|
dst_vq->min_queued_buffers = 1;
|
2022-02-24 11:10:04 +08:00
|
|
|
dst_vq->dev = inst->vpu->dev;
|
|
|
|
dst_vq->lock = &inst->lock;
|
|
|
|
ret = vb2_queue_init(dst_vq);
|
|
|
|
if (ret) {
|
|
|
|
vb2_queue_release(src_vq);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vpu_v4l2_release(struct vpu_inst *inst)
|
|
|
|
{
|
|
|
|
vpu_trace(inst->vpu->dev, "%p\n", inst);
|
|
|
|
|
|
|
|
vpu_release_core(inst->core);
|
|
|
|
put_device(inst->dev);
|
|
|
|
|
|
|
|
if (inst->workqueue) {
|
|
|
|
cancel_work_sync(&inst->msg_work);
|
|
|
|
destroy_workqueue(inst->workqueue);
|
|
|
|
inst->workqueue = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
v4l2_ctrl_handler_free(&inst->ctrl_handler);
|
|
|
|
mutex_destroy(&inst->lock);
|
|
|
|
v4l2_fh_del(&inst->fh);
|
|
|
|
v4l2_fh_exit(&inst->fh);
|
|
|
|
|
|
|
|
call_void_vop(inst, cleanup);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int vpu_v4l2_open(struct file *file, struct vpu_inst *inst)
|
|
|
|
{
|
|
|
|
struct vpu_dev *vpu = video_drvdata(file);
|
|
|
|
struct vpu_func *func;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
if (!inst || !inst->ops)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (inst->type == VPU_CORE_TYPE_ENC)
|
|
|
|
func = &vpu->encoder;
|
|
|
|
else
|
|
|
|
func = &vpu->decoder;
|
|
|
|
|
|
|
|
atomic_set(&inst->ref_count, 0);
|
2023-12-08 15:33:42 +08:00
|
|
|
atomic_long_set(&inst->last_response_cmd, 0);
|
2022-02-24 11:10:04 +08:00
|
|
|
vpu_inst_get(inst);
|
|
|
|
inst->vpu = vpu;
|
|
|
|
inst->core = vpu_request_core(vpu, inst->type);
|
|
|
|
if (inst->core)
|
|
|
|
inst->dev = get_device(inst->core->dev);
|
|
|
|
mutex_init(&inst->lock);
|
|
|
|
INIT_LIST_HEAD(&inst->cmd_q);
|
|
|
|
inst->id = VPU_INST_NULL_ID;
|
|
|
|
inst->release = vpu_v4l2_release;
|
|
|
|
inst->pid = current->pid;
|
|
|
|
inst->tgid = current->tgid;
|
|
|
|
inst->min_buffer_cap = 2;
|
|
|
|
inst->min_buffer_out = 2;
|
|
|
|
v4l2_fh_init(&inst->fh, func->vfd);
|
|
|
|
v4l2_fh_add(&inst->fh);
|
|
|
|
|
|
|
|
ret = call_vop(inst, ctrl_init);
|
|
|
|
if (ret)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
inst->fh.m2m_ctx = v4l2_m2m_ctx_init(func->m2m_dev, inst, vpu_m2m_queue_init);
|
|
|
|
if (IS_ERR(inst->fh.m2m_ctx)) {
|
|
|
|
dev_err(vpu->dev, "v4l2_m2m_ctx_init fail\n");
|
|
|
|
ret = PTR_ERR(inst->fh.m2m_ctx);
|
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
inst->fh.ctrl_handler = &inst->ctrl_handler;
|
|
|
|
file->private_data = &inst->fh;
|
|
|
|
inst->state = VPU_CODEC_STATE_DEINIT;
|
media: amphion: Use alloc_ordered_workqueue() to create ordered workqueues
BACKGROUND
==========
When multiple work items are queued to a workqueue, their execution order
doesn't match the queueing order. They may get executed in any order and
simultaneously. When fully serialized execution - one by one in the
queueing order - is needed, an ordered workqueue should be used which can
be created with alloc_ordered_workqueue().
However, alloc_ordered_workqueue() was a later addition. Before it, an
ordered workqueue could be obtained by creating an UNBOUND workqueue with
@max_active==1. This originally was an implementation side-effect which was
broken by 4c16bd327c74 ("workqueue: restore WQ_UNBOUND/max_active==1 to be
ordered"). Because there were users that depended on the ordered execution,
5c0338c68706 ("workqueue: restore WQ_UNBOUND/max_active==1 to be ordered")
made workqueue allocation path to implicitly promote UNBOUND workqueues w/
@max_active==1 to ordered workqueues.
While this has worked okay, overloading the UNBOUND allocation interface
this way creates other issues. It's difficult to tell whether a given
workqueue actually needs to be ordered and users that legitimately want a
min concurrency level wq unexpectedly gets an ordered one instead. With
planned UNBOUND workqueue updates to improve execution locality and more
prevalence of chiplet designs which can benefit from such improvements,
this isn't a state we wanna be in forever.
This patch series audits all callsites that create an UNBOUND workqueue w/
@max_active==1 and converts them to alloc_ordered_workqueue() as necessary.
WHAT TO LOOK FOR
================
The conversions are from
alloc_workqueue(WQ_UNBOUND | flags, 1, args..)
to
alloc_ordered_workqueue(flags, args...)
which don't cause any functional changes. If you know that fully ordered
execution is not necessary, please let me know. I'll drop the conversion
and instead add a comment noting the fact to reduce confusion while
conversion is in progress.
If you aren't fully sure, it's completely fine to let the conversion
through. The behavior will stay exactly the same and we can always
reconsider later.
As there are follow-up workqueue core changes, I'd really appreciate if the
patch can be routed through the workqueue tree w/ your acks. Thanks.
Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Cc: Ming Qian <ming.qian@nxp.com>
Cc: Shijie Qin <shijie.qin@nxp.com>
Cc: Zhou Peng <eagle.zhou@nxp.com>
Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: linux-media@vger.kernel.org
Signed-off-by: Tejun Heo <tj@kernel.org>
2023-05-23 11:23:22 -10:00
|
|
|
inst->workqueue = alloc_ordered_workqueue("vpu_inst", WQ_MEM_RECLAIM);
|
2022-02-24 11:10:04 +08:00
|
|
|
if (inst->workqueue) {
|
|
|
|
INIT_WORK(&inst->msg_work, vpu_inst_run_work);
|
|
|
|
ret = kfifo_init(&inst->msg_fifo,
|
|
|
|
inst->msg_buffer,
|
|
|
|
rounddown_pow_of_two(sizeof(inst->msg_buffer)));
|
|
|
|
if (ret) {
|
|
|
|
destroy_workqueue(inst->workqueue);
|
|
|
|
inst->workqueue = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
vpu_trace(vpu->dev, "tgid = %d, pid = %d, type = %s, inst = %p\n",
|
|
|
|
inst->tgid, inst->pid, vpu_core_type_desc(inst->type), inst);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
error:
|
|
|
|
vpu_inst_put(inst);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
int vpu_v4l2_close(struct file *file)
|
|
|
|
{
|
|
|
|
struct vpu_dev *vpu = video_drvdata(file);
|
|
|
|
struct vpu_inst *inst = to_inst(file);
|
|
|
|
|
|
|
|
vpu_trace(vpu->dev, "tgid = %d, pid = %d, inst = %p\n", inst->tgid, inst->pid, inst);
|
|
|
|
|
2022-11-21 06:34:07 +00:00
|
|
|
vpu_inst_lock(inst);
|
|
|
|
if (inst->fh.m2m_ctx) {
|
|
|
|
v4l2_m2m_ctx_release(inst->fh.m2m_ctx);
|
|
|
|
inst->fh.m2m_ctx = NULL;
|
|
|
|
}
|
2023-06-13 15:48:46 +08:00
|
|
|
call_void_vop(inst, release);
|
2022-11-21 06:34:07 +00:00
|
|
|
vpu_inst_unlock(inst);
|
|
|
|
|
2022-02-24 11:10:04 +08:00
|
|
|
vpu_inst_unregister(inst);
|
|
|
|
vpu_inst_put(inst);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int vpu_add_func(struct vpu_dev *vpu, struct vpu_func *func)
|
|
|
|
{
|
|
|
|
struct video_device *vfd;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (!vpu || !func)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (func->vfd)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
func->m2m_dev = v4l2_m2m_init(&vpu_m2m_ops);
|
|
|
|
if (IS_ERR(func->m2m_dev)) {
|
|
|
|
dev_err(vpu->dev, "v4l2_m2m_init fail\n");
|
|
|
|
func->vfd = NULL;
|
|
|
|
return PTR_ERR(func->m2m_dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
vfd = video_device_alloc();
|
|
|
|
if (!vfd) {
|
|
|
|
v4l2_m2m_release(func->m2m_dev);
|
|
|
|
dev_err(vpu->dev, "alloc vpu decoder video device fail\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
vfd->release = video_device_release;
|
|
|
|
vfd->vfl_dir = VFL_DIR_M2M;
|
|
|
|
vfd->v4l2_dev = &vpu->v4l2_dev;
|
|
|
|
vfd->device_caps = V4L2_CAP_VIDEO_M2M_MPLANE | V4L2_CAP_STREAMING;
|
|
|
|
if (func->type == VPU_CORE_TYPE_ENC) {
|
|
|
|
strscpy(vfd->name, "amphion-vpu-encoder", sizeof(vfd->name));
|
|
|
|
vfd->fops = venc_get_fops();
|
|
|
|
vfd->ioctl_ops = venc_get_ioctl_ops();
|
|
|
|
} else {
|
|
|
|
strscpy(vfd->name, "amphion-vpu-decoder", sizeof(vfd->name));
|
|
|
|
vfd->fops = vdec_get_fops();
|
|
|
|
vfd->ioctl_ops = vdec_get_ioctl_ops();
|
|
|
|
}
|
2024-09-13 15:21:45 +09:00
|
|
|
video_set_drvdata(vfd, vpu);
|
2022-02-24 11:10:04 +08:00
|
|
|
|
|
|
|
ret = video_register_device(vfd, VFL_TYPE_VIDEO, -1);
|
|
|
|
if (ret) {
|
|
|
|
video_device_release(vfd);
|
|
|
|
v4l2_m2m_release(func->m2m_dev);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
func->vfd = vfd;
|
|
|
|
|
|
|
|
ret = v4l2_m2m_register_media_controller(func->m2m_dev, func->vfd, func->function);
|
|
|
|
if (ret) {
|
|
|
|
v4l2_m2m_release(func->m2m_dev);
|
|
|
|
func->m2m_dev = NULL;
|
|
|
|
video_unregister_device(func->vfd);
|
|
|
|
func->vfd = NULL;
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void vpu_remove_func(struct vpu_func *func)
|
|
|
|
{
|
|
|
|
if (!func)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (func->m2m_dev) {
|
|
|
|
v4l2_m2m_unregister_media_controller(func->m2m_dev);
|
|
|
|
v4l2_m2m_release(func->m2m_dev);
|
|
|
|
func->m2m_dev = NULL;
|
|
|
|
}
|
|
|
|
if (func->vfd) {
|
|
|
|
video_unregister_device(func->vfd);
|
|
|
|
func->vfd = NULL;
|
|
|
|
}
|
|
|
|
}
|