2019-06-03 07:44:50 +02:00
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// SPDX-License-Identifier: GPL-2.0-only
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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/*
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2015-01-07 16:27:27 -05:00
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* Copyright (c) 2014 The Linux Foundation. All rights reserved.
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*/
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2024-03-04 19:51:52 +02:00
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#include <linux/gpio/consumer.h>
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drm/msm/mdp5: use irqdomains
For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the
mdp block. In order to decouple hdmi/eDP/etc, register an irq domain
in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup
their irqs in their DT nodes as normal. When used with mdp5, instead
set the mdp device as the interrupt-parent, as in:
mdp: qcom,mdss_mdp@fd900000 {
compatible = "qcom,mdss_mdp";
interrupt-controller;
#interrupt-cells = <1>;
...
};
hdmi: qcom,hdmi_tx@fd922100 {
compatible = "qcom,hdmi-tx-8074";
interrupt-parent = <&mdp>;
interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */
...
};
There is a slight awkwardness, in that we cannot disable child irqs
at the mdp level, they can only be cleared in the child block. So
you must not use threaded irq handlers in the child. I'm not sure
if there is a better way to deal with that.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-17 15:28:07 -05:00
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#include <linux/of_irq.h>
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2023-07-14 11:45:34 -06:00
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#include <linux/of_platform.h>
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2025-05-05 03:14:53 +03:00
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#include <linux/pinctrl/consumer.h>
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2023-07-14 11:45:34 -06:00
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#include <linux/platform_device.h>
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2015-10-30 12:35:55 +05:30
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2021-10-15 03:11:00 +03:00
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#include <drm/drm_bridge_connector.h>
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2022-06-16 11:50:57 +03:00
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#include <drm/drm_of.h>
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2025-02-26 10:59:26 +02:00
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#include <drm/display/drm_hdmi_state_helper.h>
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2021-10-15 03:11:00 +03:00
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2025-07-05 13:02:30 +03:00
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#include "msm_kms.h"
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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#include "hdmi.h"
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2016-02-22 22:08:35 +01:00
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void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on)
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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{
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uint32_t ctrl = 0;
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2015-04-02 17:49:01 -04:00
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unsigned long flags;
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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2015-04-02 17:49:01 -04:00
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spin_lock_irqsave(&hdmi->reg_lock, flags);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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if (power_on) {
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ctrl |= HDMI_CTRL_ENABLE;
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2025-02-26 10:59:27 +02:00
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if (!hdmi->connector->display_info.is_hdmi) {
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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ctrl |= HDMI_CTRL_HDMI;
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hdmi_write(hdmi, REG_HDMI_CTRL, ctrl);
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ctrl &= ~HDMI_CTRL_HDMI;
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} else {
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ctrl |= HDMI_CTRL_HDMI;
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}
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} else {
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ctrl = HDMI_CTRL_HDMI;
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}
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hdmi_write(hdmi, REG_HDMI_CTRL, ctrl);
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2015-04-02 17:49:01 -04:00
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spin_unlock_irqrestore(&hdmi->reg_lock, flags);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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DBG("HDMI Core: %s, HDMI_CTRL=0x%08x",
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power_on ? "Enable" : "Disable", ctrl);
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}
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2016-02-22 22:08:35 +01:00
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static irqreturn_t msm_hdmi_irq(int irq, void *dev_id)
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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{
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struct hdmi *hdmi = dev_id;
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/* Process HPD: */
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2021-10-15 03:11:00 +03:00
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msm_hdmi_hpd_irq(hdmi->bridge);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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/* Process DDC: */
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2016-02-22 22:08:35 +01:00
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msm_hdmi_i2c_irq(hdmi->i2c);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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2015-04-02 17:49:01 -04:00
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/* Process HDCP: */
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if (hdmi->hdcp_ctrl)
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2016-02-22 22:08:35 +01:00
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msm_hdmi_hdcp_irq(hdmi->hdcp_ctrl);
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2015-04-02 17:49:01 -04:00
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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/* TODO audio.. */
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return IRQ_HANDLED;
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}
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2016-02-22 22:08:35 +01:00
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static void msm_hdmi_destroy(struct hdmi *hdmi)
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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{
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2015-04-02 17:49:01 -04:00
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/*
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* at this point, hpd has been disabled,
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* after flush workq, it's safe to deinit hdcp
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*/
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2021-10-10 15:59:40 +02:00
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if (hdmi->workq)
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2015-04-02 17:49:01 -04:00
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destroy_workqueue(hdmi->workq);
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2016-02-22 22:08:35 +01:00
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msm_hdmi_hdcp_destroy(hdmi);
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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2022-08-26 12:39:27 +03:00
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if (hdmi->i2c)
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msm_hdmi_i2c_destroy(hdmi->i2c);
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}
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static void msm_hdmi_put_phy(struct hdmi *hdmi)
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{
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2016-02-25 11:22:40 +05:30
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if (hdmi->phy_dev) {
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put_device(hdmi->phy_dev);
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hdmi->phy = NULL;
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hdmi->phy_dev = NULL;
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}
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drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
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}
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2016-02-22 22:08:35 +01:00
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static int msm_hdmi_get_phy(struct hdmi *hdmi)
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2016-02-25 11:22:40 +05:30
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{
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struct platform_device *pdev = hdmi->pdev;
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struct platform_device *phy_pdev;
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struct device_node *phy_node;
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phy_node = of_parse_phandle(pdev->dev.of_node, "phys", 0);
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if (!phy_node) {
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2018-10-20 23:19:26 +05:30
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DRM_DEV_ERROR(&pdev->dev, "cannot find phy device\n");
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2016-02-25 11:22:40 +05:30
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return -ENXIO;
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}
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phy_pdev = of_find_device_by_node(phy_node);
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of_node_put(phy_node);
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2022-08-26 12:39:27 +03:00
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if (!phy_pdev)
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return dev_err_probe(&pdev->dev, -EPROBE_DEFER, "phy driver is not ready\n");
|
|
|
|
|
|
|
|
hdmi->phy = platform_get_drvdata(phy_pdev);
|
2022-01-07 08:50:22 +00:00
|
|
|
if (!hdmi->phy) {
|
|
|
|
put_device(&phy_pdev->dev);
|
2022-08-26 12:39:27 +03:00
|
|
|
return dev_err_probe(&pdev->dev, -EPROBE_DEFER, "phy driver is not ready\n");
|
2022-01-07 08:50:22 +00:00
|
|
|
}
|
2016-02-25 11:22:40 +05:30
|
|
|
|
2022-08-26 12:39:26 +03:00
|
|
|
hdmi->phy_dev = &phy_pdev->dev;
|
2016-02-25 11:22:40 +05:30
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-11-04 13:33:14 -05:00
|
|
|
/* construct hdmi at bind/probe time, grab all the resources. If
|
|
|
|
* we are to EPROBE_DEFER we want to do it here, rather than later
|
|
|
|
* at modeset_init() time
|
|
|
|
*/
|
2022-08-26 12:39:25 +03:00
|
|
|
static int msm_hdmi_init(struct hdmi *hdmi)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
{
|
2022-08-26 12:39:25 +03:00
|
|
|
struct platform_device *pdev = hdmi->pdev;
|
|
|
|
int ret;
|
2017-07-28 16:17:02 +05:30
|
|
|
|
2015-04-02 17:49:01 -04:00
|
|
|
hdmi->workq = alloc_ordered_workqueue("msm_hdmi", 0);
|
2023-01-06 10:30:11 +08:00
|
|
|
if (!hdmi->workq) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto fail;
|
|
|
|
}
|
2015-04-02 17:49:01 -04:00
|
|
|
|
2016-02-22 22:08:35 +01:00
|
|
|
hdmi->i2c = msm_hdmi_i2c_init(hdmi);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
if (IS_ERR(hdmi->i2c)) {
|
|
|
|
ret = PTR_ERR(hdmi->i2c);
|
2018-10-20 23:19:26 +05:30
|
|
|
DRM_DEV_ERROR(&pdev->dev, "failed to get i2c: %d\n", ret);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
hdmi->i2c = NULL;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2016-02-22 22:08:35 +01:00
|
|
|
hdmi->hdcp_ctrl = msm_hdmi_hdcp_init(hdmi);
|
2015-04-02 17:49:01 -04:00
|
|
|
if (IS_ERR(hdmi->hdcp_ctrl)) {
|
|
|
|
dev_warn(&pdev->dev, "failed to init hdcp: disabled\n");
|
|
|
|
hdmi->hdcp_ctrl = NULL;
|
|
|
|
}
|
|
|
|
|
2022-08-26 12:39:25 +03:00
|
|
|
return 0;
|
2014-11-04 13:33:14 -05:00
|
|
|
|
|
|
|
fail:
|
2022-11-18 16:03:37 +03:00
|
|
|
msm_hdmi_destroy(hdmi);
|
2014-11-04 13:33:14 -05:00
|
|
|
|
2022-08-26 12:39:25 +03:00
|
|
|
return ret;
|
2014-11-04 13:33:14 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Second part of initialization, the drm/kms level modeset_init,
|
|
|
|
* constructs/initializes mode objects, etc, is called from master
|
|
|
|
* driver (not hdmi sub-device's probe/bind!)
|
|
|
|
*
|
|
|
|
* Any resource (regulator/clk/etc) which could be missing at boot
|
2016-02-22 22:08:35 +01:00
|
|
|
* should be handled in msm_hdmi_init() so that failure happens from
|
2014-11-04 13:33:14 -05:00
|
|
|
* hdmi sub-device's probe.
|
|
|
|
*/
|
2016-02-22 22:08:35 +01:00
|
|
|
int msm_hdmi_modeset_init(struct hdmi *hdmi,
|
2014-11-04 13:33:14 -05:00
|
|
|
struct drm_device *dev, struct drm_encoder *encoder)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
hdmi->dev = dev;
|
|
|
|
hdmi->encoder = encoder;
|
|
|
|
|
2023-10-09 21:10:29 +03:00
|
|
|
ret = msm_hdmi_bridge_init(hdmi);
|
|
|
|
if (ret) {
|
2018-10-20 23:19:26 +05:30
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to create HDMI bridge: %d\n", ret);
|
2013-08-30 13:02:15 -04:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2022-06-16 11:50:57 +03:00
|
|
|
if (hdmi->next_bridge) {
|
|
|
|
ret = drm_bridge_attach(hdmi->encoder, hdmi->next_bridge, hdmi->bridge,
|
|
|
|
DRM_BRIDGE_ATTACH_NO_CONNECTOR);
|
|
|
|
if (ret) {
|
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to attach next HDMI bridge: %d\n", ret);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-10-15 03:11:00 +03:00
|
|
|
hdmi->connector = drm_bridge_connector_init(hdmi->dev, encoder);
|
2013-08-30 13:02:15 -04:00
|
|
|
if (IS_ERR(hdmi->connector)) {
|
|
|
|
ret = PTR_ERR(hdmi->connector);
|
2018-10-20 23:19:26 +05:30
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to create HDMI connector: %d\n", ret);
|
2013-08-30 13:02:15 -04:00
|
|
|
hdmi->connector = NULL;
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2021-10-15 03:11:00 +03:00
|
|
|
drm_connector_attach_encoder(hdmi->connector, hdmi->encoder);
|
|
|
|
|
2022-09-13 10:53:18 +02:00
|
|
|
ret = devm_request_irq(dev->dev, hdmi->irq,
|
2022-02-01 17:47:33 +00:00
|
|
|
msm_hdmi_irq, IRQF_TRIGGER_HIGH,
|
drm/msm/mdp5: use irqdomains
For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the
mdp block. In order to decouple hdmi/eDP/etc, register an irq domain
in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup
their irqs in their DT nodes as normal. When used with mdp5, instead
set the mdp device as the interrupt-parent, as in:
mdp: qcom,mdss_mdp@fd900000 {
compatible = "qcom,mdss_mdp";
interrupt-controller;
#interrupt-cells = <1>;
...
};
hdmi: qcom,hdmi_tx@fd922100 {
compatible = "qcom,hdmi-tx-8074";
interrupt-parent = <&mdp>;
interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */
...
};
There is a slight awkwardness, in that we cannot disable child irqs
at the mdp level, they can only be cleared in the child block. So
you must not use threaded irq handlers in the child. I'm not sure
if there is a better way to deal with that.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-17 15:28:07 -05:00
|
|
|
"hdmi_isr", hdmi);
|
|
|
|
if (ret < 0) {
|
2018-10-20 23:19:26 +05:30
|
|
|
DRM_DEV_ERROR(dev->dev, "failed to request IRQ%u: %d\n",
|
drm/msm/mdp5: use irqdomains
For mdp5, the irqs of hdmi/eDP/dsi0/dsi1 blocks get routed through the
mdp block. In order to decouple hdmi/eDP/etc, register an irq domain
in mdp5. When hdmi/dsi/etc are used with mdp4, they can directly setup
their irqs in their DT nodes as normal. When used with mdp5, instead
set the mdp device as the interrupt-parent, as in:
mdp: qcom,mdss_mdp@fd900000 {
compatible = "qcom,mdss_mdp";
interrupt-controller;
#interrupt-cells = <1>;
...
};
hdmi: qcom,hdmi_tx@fd922100 {
compatible = "qcom,hdmi-tx-8074";
interrupt-parent = <&mdp>;
interrupts = <8 0>; /* MDP5_HW_INTR_STATUS.INTR_HDMI */
...
};
There is a slight awkwardness, in that we cannot disable child irqs
at the mdp level, they can only be cleared in the child block. So
you must not use threaded irq handlers in the child. I'm not sure
if there is a better way to deal with that.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-17 15:28:07 -05:00
|
|
|
hdmi->irq, ret);
|
|
|
|
goto fail;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
}
|
|
|
|
|
2014-11-04 13:33:14 -05:00
|
|
|
return 0;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
|
|
|
|
fail:
|
2014-11-04 13:33:14 -05:00
|
|
|
if (hdmi->connector) {
|
|
|
|
hdmi->connector->funcs->destroy(hdmi->connector);
|
|
|
|
hdmi->connector = NULL;
|
2013-08-30 13:02:15 -04:00
|
|
|
}
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
|
2014-11-04 13:33:14 -05:00
|
|
|
return ret;
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* The hdmi device:
|
|
|
|
*/
|
|
|
|
|
2025-05-05 03:14:53 +03:00
|
|
|
static const char * const pwr_reg_names_8960[] = {"core-vdda"};
|
2025-05-05 03:14:54 +03:00
|
|
|
static const char * const pwr_clk_names_8960[] = {"core", "master_iface", "slave_iface"};
|
2015-01-07 16:27:27 -05:00
|
|
|
|
2022-08-26 12:39:25 +03:00
|
|
|
static const struct hdmi_platform_config hdmi_tx_8960_config = {
|
2025-05-05 03:14:55 +03:00
|
|
|
.pwr_reg_names = pwr_reg_names_8960,
|
|
|
|
.pwr_reg_cnt = ARRAY_SIZE(pwr_reg_names_8960),
|
|
|
|
.pwr_clk_names = pwr_clk_names_8960,
|
|
|
|
.pwr_clk_cnt = ARRAY_SIZE(pwr_clk_names_8960),
|
2015-01-07 16:27:27 -05:00
|
|
|
};
|
|
|
|
|
2025-05-05 03:14:46 +03:00
|
|
|
static const char * const pwr_reg_names_8x74[] = {"core-vdda", "core-vcc"};
|
2025-05-05 03:14:54 +03:00
|
|
|
static const char * const pwr_clk_names_8x74[] = {"iface", "core", "mdp_core", "alt_iface"};
|
2015-01-07 16:27:27 -05:00
|
|
|
|
2022-08-26 12:39:25 +03:00
|
|
|
static const struct hdmi_platform_config hdmi_tx_8974_config = {
|
2025-05-05 03:14:55 +03:00
|
|
|
.pwr_reg_names = pwr_reg_names_8x74,
|
|
|
|
.pwr_reg_cnt = ARRAY_SIZE(pwr_reg_names_8x74),
|
|
|
|
.pwr_clk_names = pwr_clk_names_8x74,
|
|
|
|
.pwr_clk_cnt = ARRAY_SIZE(pwr_clk_names_8x74),
|
2015-01-07 16:27:27 -05:00
|
|
|
};
|
|
|
|
|
2016-02-22 22:08:35 +01:00
|
|
|
static int msm_hdmi_bind(struct device *dev, struct device *master, void *data)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
{
|
2021-12-01 11:52:09 +01:00
|
|
|
struct msm_drm_private *priv = dev_get_drvdata(master);
|
2022-08-26 12:39:25 +03:00
|
|
|
struct hdmi *hdmi = dev_get_drvdata(dev);
|
2022-06-09 15:23:42 +03:00
|
|
|
int err;
|
2013-12-01 12:12:54 -05:00
|
|
|
|
2022-08-26 12:39:25 +03:00
|
|
|
err = msm_hdmi_init(hdmi);
|
|
|
|
if (err)
|
|
|
|
return err;
|
2025-07-05 13:02:30 +03:00
|
|
|
priv->kms->hdmi = hdmi;
|
2015-01-07 16:27:27 -05:00
|
|
|
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-02-22 22:08:35 +01:00
|
|
|
static void msm_hdmi_unbind(struct device *dev, struct device *master,
|
2014-03-03 14:19:12 -05:00
|
|
|
void *data)
|
|
|
|
{
|
2021-12-01 11:52:09 +01:00
|
|
|
struct msm_drm_private *priv = dev_get_drvdata(master);
|
|
|
|
|
2025-07-05 13:02:30 +03:00
|
|
|
if (priv->kms->hdmi) {
|
|
|
|
msm_hdmi_destroy(priv->kms->hdmi);
|
|
|
|
priv->kms->hdmi = NULL;
|
2014-11-18 08:40:44 -05:00
|
|
|
}
|
2014-03-03 14:19:12 -05:00
|
|
|
}
|
|
|
|
|
2016-02-22 22:08:35 +01:00
|
|
|
static const struct component_ops msm_hdmi_ops = {
|
|
|
|
.bind = msm_hdmi_bind,
|
|
|
|
.unbind = msm_hdmi_unbind,
|
2014-03-03 14:19:12 -05:00
|
|
|
};
|
|
|
|
|
2016-02-22 22:08:35 +01:00
|
|
|
static int msm_hdmi_dev_probe(struct platform_device *pdev)
|
2014-03-03 14:19:12 -05:00
|
|
|
{
|
2022-08-26 12:39:25 +03:00
|
|
|
const struct hdmi_platform_config *config;
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
struct hdmi *hdmi;
|
|
|
|
struct resource *res;
|
|
|
|
int i, ret;
|
|
|
|
|
|
|
|
config = of_device_get_match_data(dev);
|
|
|
|
if (!config)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
|
|
|
|
if (!hdmi)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
hdmi->pdev = pdev;
|
|
|
|
hdmi->config = config;
|
|
|
|
spin_lock_init(&hdmi->reg_lock);
|
2025-05-05 03:14:56 +03:00
|
|
|
mutex_init(&hdmi->state_mutex);
|
2022-08-26 12:39:25 +03:00
|
|
|
|
|
|
|
ret = drm_of_find_panel_or_bridge(pdev->dev.of_node, 1, 0, NULL, &hdmi->next_bridge);
|
|
|
|
if (ret && ret != -ENODEV)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
hdmi->mmio = msm_ioremap(pdev, "core_physical");
|
|
|
|
if (IS_ERR(hdmi->mmio))
|
|
|
|
return PTR_ERR(hdmi->mmio);
|
|
|
|
|
|
|
|
/* HDCP needs physical address of hdmi register */
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
|
|
|
"core_physical");
|
|
|
|
if (!res)
|
|
|
|
return -EINVAL;
|
|
|
|
hdmi->mmio_phy_addr = res->start;
|
|
|
|
|
|
|
|
hdmi->qfprom_mmio = msm_ioremap(pdev, "qfprom_physical");
|
|
|
|
if (IS_ERR(hdmi->qfprom_mmio)) {
|
|
|
|
DRM_DEV_INFO(&pdev->dev, "can't find qfprom resource\n");
|
|
|
|
hdmi->qfprom_mmio = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
hdmi->irq = platform_get_irq(pdev, 0);
|
|
|
|
if (hdmi->irq < 0)
|
|
|
|
return hdmi->irq;
|
|
|
|
|
|
|
|
hdmi->pwr_regs = devm_kcalloc(&pdev->dev,
|
|
|
|
config->pwr_reg_cnt,
|
|
|
|
sizeof(hdmi->pwr_regs[0]),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!hdmi->pwr_regs)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
for (i = 0; i < config->pwr_reg_cnt; i++)
|
|
|
|
hdmi->pwr_regs[i].supply = config->pwr_reg_names[i];
|
|
|
|
|
|
|
|
ret = devm_regulator_bulk_get(&pdev->dev, config->pwr_reg_cnt, hdmi->pwr_regs);
|
|
|
|
if (ret)
|
|
|
|
return dev_err_probe(dev, ret, "failed to get pwr regulators\n");
|
|
|
|
|
2025-05-05 03:14:54 +03:00
|
|
|
hdmi->pwr_clks = devm_kcalloc(&pdev->dev,
|
|
|
|
config->pwr_clk_cnt,
|
|
|
|
sizeof(hdmi->pwr_clks[0]),
|
2022-08-26 12:39:25 +03:00
|
|
|
GFP_KERNEL);
|
2025-05-05 03:14:54 +03:00
|
|
|
if (!hdmi->pwr_clks)
|
2022-08-26 12:39:25 +03:00
|
|
|
return -ENOMEM;
|
|
|
|
|
2025-05-05 03:14:54 +03:00
|
|
|
for (i = 0; i < config->pwr_clk_cnt; i++)
|
|
|
|
hdmi->pwr_clks[i].id = config->pwr_clk_names[i];
|
2022-08-26 12:39:25 +03:00
|
|
|
|
2025-05-05 03:14:54 +03:00
|
|
|
ret = devm_clk_bulk_get(&pdev->dev, config->pwr_clk_cnt, hdmi->pwr_clks);
|
2025-05-05 03:14:50 +03:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
2022-08-26 12:39:25 +03:00
|
|
|
|
2025-05-05 03:14:48 +03:00
|
|
|
hdmi->extp_clk = devm_clk_get_optional(&pdev->dev, "extp");
|
|
|
|
if (IS_ERR(hdmi->extp_clk))
|
|
|
|
return dev_err_probe(dev, PTR_ERR(hdmi->extp_clk),
|
|
|
|
"failed to get extp clock\n");
|
2022-08-26 12:39:25 +03:00
|
|
|
|
|
|
|
hdmi->hpd_gpiod = devm_gpiod_get_optional(&pdev->dev, "hpd", GPIOD_IN);
|
|
|
|
/* This will catch e.g. -EPROBE_DEFER */
|
|
|
|
if (IS_ERR(hdmi->hpd_gpiod))
|
|
|
|
return dev_err_probe(dev, PTR_ERR(hdmi->hpd_gpiod),
|
|
|
|
"failed to get hpd gpio\n");
|
|
|
|
|
|
|
|
if (!hdmi->hpd_gpiod)
|
|
|
|
DBG("failed to get HPD gpio");
|
|
|
|
|
|
|
|
if (hdmi->hpd_gpiod)
|
|
|
|
gpiod_set_consumer_name(hdmi->hpd_gpiod, "HDMI_HPD");
|
|
|
|
|
2022-08-26 12:39:27 +03:00
|
|
|
ret = msm_hdmi_get_phy(hdmi);
|
|
|
|
if (ret) {
|
|
|
|
DRM_DEV_ERROR(&pdev->dev, "failed to get phy\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2022-08-26 12:39:25 +03:00
|
|
|
ret = devm_pm_runtime_enable(&pdev->dev);
|
|
|
|
if (ret)
|
2022-12-13 07:15:33 +01:00
|
|
|
goto err_put_phy;
|
2022-08-26 12:39:25 +03:00
|
|
|
|
|
|
|
platform_set_drvdata(pdev, hdmi);
|
|
|
|
|
2022-12-13 07:15:33 +01:00
|
|
|
ret = component_add(&pdev->dev, &msm_hdmi_ops);
|
|
|
|
if (ret)
|
|
|
|
goto err_put_phy;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_put_phy:
|
|
|
|
msm_hdmi_put_phy(hdmi);
|
|
|
|
return ret;
|
2014-03-03 14:19:12 -05:00
|
|
|
}
|
|
|
|
|
2023-05-07 18:25:54 +02:00
|
|
|
static void msm_hdmi_dev_remove(struct platform_device *pdev)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
{
|
2022-08-26 12:39:27 +03:00
|
|
|
struct hdmi *hdmi = dev_get_drvdata(&pdev->dev);
|
|
|
|
|
2016-02-22 22:08:35 +01:00
|
|
|
component_del(&pdev->dev, &msm_hdmi_ops);
|
2022-08-26 12:39:27 +03:00
|
|
|
|
|
|
|
msm_hdmi_put_phy(hdmi);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
}
|
|
|
|
|
2025-05-05 03:14:53 +03:00
|
|
|
static int msm_hdmi_runtime_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct hdmi *hdmi = dev_get_drvdata(dev);
|
|
|
|
const struct hdmi_platform_config *config = hdmi->config;
|
|
|
|
|
2025-05-05 03:14:54 +03:00
|
|
|
clk_bulk_disable_unprepare(config->pwr_clk_cnt, hdmi->pwr_clks);
|
2025-05-05 03:14:53 +03:00
|
|
|
|
|
|
|
pinctrl_pm_select_sleep_state(dev);
|
|
|
|
|
|
|
|
regulator_bulk_disable(config->pwr_reg_cnt, hdmi->pwr_regs);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int msm_hdmi_runtime_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct hdmi *hdmi = dev_get_drvdata(dev);
|
|
|
|
const struct hdmi_platform_config *config = hdmi->config;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = regulator_bulk_enable(config->pwr_reg_cnt, hdmi->pwr_regs);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = pinctrl_pm_select_default_state(dev);
|
|
|
|
if (ret)
|
|
|
|
goto fail;
|
|
|
|
|
2025-05-05 03:14:54 +03:00
|
|
|
ret = clk_bulk_prepare_enable(config->pwr_clk_cnt, hdmi->pwr_clks);
|
2025-05-05 03:14:53 +03:00
|
|
|
if (ret)
|
|
|
|
goto fail;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
pinctrl_pm_select_sleep_state(dev);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
DEFINE_RUNTIME_DEV_PM_OPS(msm_hdmi_pm_ops, msm_hdmi_runtime_suspend, msm_hdmi_runtime_resume, NULL);
|
|
|
|
|
2016-02-22 22:08:35 +01:00
|
|
|
static const struct of_device_id msm_hdmi_dt_match[] = {
|
2024-07-24 17:01:36 +02:00
|
|
|
{ .compatible = "qcom,hdmi-tx-8998", .data = &hdmi_tx_8974_config },
|
2022-06-09 15:23:46 +03:00
|
|
|
{ .compatible = "qcom,hdmi-tx-8996", .data = &hdmi_tx_8974_config },
|
|
|
|
{ .compatible = "qcom,hdmi-tx-8994", .data = &hdmi_tx_8974_config },
|
|
|
|
{ .compatible = "qcom,hdmi-tx-8084", .data = &hdmi_tx_8974_config },
|
2015-10-30 12:35:55 +05:30
|
|
|
{ .compatible = "qcom,hdmi-tx-8974", .data = &hdmi_tx_8974_config },
|
|
|
|
{ .compatible = "qcom,hdmi-tx-8960", .data = &hdmi_tx_8960_config },
|
2022-06-09 15:23:47 +03:00
|
|
|
{ .compatible = "qcom,hdmi-tx-8660", .data = &hdmi_tx_8960_config },
|
2015-10-30 12:35:55 +05:30
|
|
|
{}
|
|
|
|
};
|
|
|
|
|
2016-02-22 22:08:35 +01:00
|
|
|
static struct platform_driver msm_hdmi_driver = {
|
|
|
|
.probe = msm_hdmi_dev_probe,
|
2024-12-01 15:12:43 -08:00
|
|
|
.remove = msm_hdmi_dev_remove,
|
2013-12-01 12:12:54 -05:00
|
|
|
.driver = {
|
|
|
|
.name = "hdmi_msm",
|
2016-02-22 22:08:35 +01:00
|
|
|
.of_match_table = msm_hdmi_dt_match,
|
2025-05-05 03:14:53 +03:00
|
|
|
.pm = &msm_hdmi_pm_ops,
|
2013-12-01 12:12:54 -05:00
|
|
|
},
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
};
|
|
|
|
|
2016-02-22 22:08:35 +01:00
|
|
|
void __init msm_hdmi_register(void)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
{
|
2016-02-22 22:08:35 +01:00
|
|
|
msm_hdmi_phy_driver_register();
|
|
|
|
platform_driver_register(&msm_hdmi_driver);
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
}
|
|
|
|
|
2016-02-22 22:08:35 +01:00
|
|
|
void __exit msm_hdmi_unregister(void)
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
{
|
2016-02-22 22:08:35 +01:00
|
|
|
platform_driver_unregister(&msm_hdmi_driver);
|
|
|
|
msm_hdmi_phy_driver_unregister();
|
drm/msm: basic KMS driver for snapdragon
The snapdragon chips have multiple different display controllers,
depending on which chip variant/version. (As far as I can tell, current
devices have either MDP3 or MDP4, and upcoming devices have MDSS.) And
then external to the display controller are HDMI, DSI, etc. blocks which
may be shared across devices which have different display controller
blocks.
To more easily add support for different display controller blocks, the
display controller specific bits are split out into a "kms" module,
which provides the kms plane/crtc/encoder objects.
The external HDMI, DSI, etc. blocks are part encoder, and part connector
currently. But I think I will pull in the drm_bridge patches from
chromeos tree, and split them into a bridge+connector, with the
registers that need to be set in modeset handled by the bridge. This
would remove the 'msm_connector' base class. But some things need to be
double checked to make sure I could get the correct ON/OFF sequencing..
This patch adds support for mdp4 crtc (including hw cursor), dtv encoder
(part of MDP4 block), and hdmi.
Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-06-26 12:44:06 -04:00
|
|
|
}
|