License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 15:07:57 +01:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2015-12-01 09:06:28 +05:30
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#ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
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#define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
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2016-04-29 23:25:47 +10:00
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2020-06-04 16:46:44 -07:00
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#include <asm-generic/pgtable-nop4d.h>
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2017-03-09 17:24:05 +03:00
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2017-02-24 14:59:21 -08:00
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#ifndef __ASSEMBLY__
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#include <linux/mmdebug.h>
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2017-06-28 11:32:34 +10:00
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#include <linux/bug.h>
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2021-04-20 13:32:48 +00:00
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#include <linux/sizes.h>
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2017-02-24 14:59:21 -08:00
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#endif
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2017-03-09 17:24:05 +03:00
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2016-04-29 23:25:47 +10:00
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/*
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* Common bits between hash and Radix page table
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*/
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#define _PAGE_EXEC 0x00001 /* execute permission */
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#define _PAGE_WRITE 0x00002 /* write access allowed */
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#define _PAGE_READ 0x00004 /* read access allowed */
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#define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
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2020-08-21 13:55:56 -05:00
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#define _PAGE_SAO 0x00010 /* Strong access order */
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2016-04-29 23:25:47 +10:00
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#define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
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#define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
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#define _PAGE_DIRTY 0x00080 /* C: page changed */
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#define _PAGE_ACCESSED 0x00100 /* R: page referenced */
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2015-12-01 09:06:28 +05:30
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/*
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2016-04-29 23:25:47 +10:00
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* Software bits
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2015-12-01 09:06:28 +05:30
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*/
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2016-04-29 23:26:33 +10:00
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#define _RPAGE_SW0 0x2000000000000000UL
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#define _RPAGE_SW1 0x00800
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#define _RPAGE_SW2 0x00400
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#define _RPAGE_SW3 0x00200
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2020-07-09 08:59:27 +05:30
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#define _RPAGE_RSV1 0x00040UL
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#define _RPAGE_PKEY_BIT4 0x1000000000000000UL
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#define _RPAGE_PKEY_BIT3 0x0800000000000000UL
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#define _RPAGE_PKEY_BIT2 0x0400000000000000UL
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#define _RPAGE_PKEY_BIT1 0x0200000000000000UL
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#define _RPAGE_PKEY_BIT0 0x0100000000000000UL
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2017-03-28 15:21:12 +11:00
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#define _PAGE_PTE 0x4000000000000000UL /* distinguishes PTEs from pointers */
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#define _PAGE_PRESENT 0x8000000000000000UL /* pte contains a translation */
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2018-08-22 22:46:04 +05:30
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/*
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* We need to mark a pmd pte invalid while splitting. We can do that by clearing
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* the _PAGE_PRESENT bit. But then that will be taken as a swap pte. In order to
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* differentiate between two use a SW field when invalidating.
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*
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* We do that temporary invalidate for regular pte entry in ptep_set_access_flags
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*
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* This is used only when _PAGE_PRESENT is cleared.
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*/
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#define _PAGE_INVALID _RPAGE_SW0
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2017-03-28 15:21:12 +11:00
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/*
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* Top and bottom bits of RPN which can be used by hash
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* translation mode, because we expect them to be zero
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* otherwise.
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*/
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2017-03-21 22:59:58 +05:30
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#define _RPAGE_RPN0 0x01000
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#define _RPAGE_RPN1 0x02000
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2017-03-28 15:21:12 +11:00
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#define _RPAGE_RPN43 0x0080000000000000UL
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#define _RPAGE_RPN42 0x0040000000000000UL
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#define _RPAGE_RPN41 0x0020000000000000UL
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2016-11-28 11:47:00 +05:30
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2017-03-21 22:59:59 +05:30
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/* Max physical address bit as per radix table */
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2020-07-09 08:59:27 +05:30
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#define _RPAGE_PA_MAX 56
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2017-03-21 22:59:59 +05:30
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/*
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* Max physical address bit we will use for now.
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*
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* This is mostly a hardware limitation and for now Power9 has
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* a 51 bit limit.
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*
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* This is different from the number of physical bit required to address
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* the last byte of memory. That is defined by MAX_PHYSMEM_BITS.
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* MAX_PHYSMEM_BITS is a linux limitation imposed by the maximum
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* number of sections we can support (SECTIONS_SHIFT).
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*
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* This is different from Radix page table limitation above and
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* should always be less than that. The limit is done such that
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* we can overload the bits between _RPAGE_PA_MAX and _PAGE_PA_MAX
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* for hash linux page table specific bits.
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*
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* In order to be compatible with future hardware generations we keep
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* some offsets and limit this for now to 53
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*/
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#define _PAGE_PA_MAX 53
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2016-04-29 23:26:33 +10:00
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#define _PAGE_SOFT_DIRTY _RPAGE_SW3 /* software: software dirty tracking */
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#define _PAGE_SPECIAL _RPAGE_SW2 /* software: special page */
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2017-06-28 11:32:34 +10:00
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2016-04-29 23:25:47 +10:00
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/*
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* Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE
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* Instead of fixing all of them, add an alternate define which
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* maps CI pte mapping.
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*/
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#define _PAGE_NO_CACHE _PAGE_TOLERANT
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/*
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2017-03-21 22:59:59 +05:30
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* We support _RPAGE_PA_MAX bit real address in pte. On the linux side
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* we are limited by _PAGE_PA_MAX. Clear everything above _PAGE_PA_MAX
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* and every thing below PAGE_SHIFT;
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2016-04-29 23:25:47 +10:00
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*/
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2017-03-21 22:59:59 +05:30
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#define PTE_RPN_MASK (((1UL << _PAGE_PA_MAX) - 1) & (PAGE_MASK))
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2023-08-02 16:13:49 +01:00
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#define PTE_RPN_SHIFT PAGE_SHIFT
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2016-04-29 23:25:47 +10:00
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/*
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* set of bits not changed in pmd_modify. Even though we have hash specific bits
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* in here, on radix we expect them to be zero.
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*/
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#define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
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_PAGE_ACCESSED | H_PAGE_THP_HUGE | _PAGE_PTE | \
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2025-06-19 18:58:03 +10:00
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_PAGE_SOFT_DIRTY)
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2016-04-29 23:25:47 +10:00
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/*
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* user access blocked by key
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*/
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#define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY)
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#define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_READ)
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2021-03-31 11:38:40 +11:00
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#define _PAGE_KERNEL_ROX (_PAGE_PRIVILEGED | _PAGE_READ | _PAGE_EXEC)
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2022-09-07 12:05:21 +02:00
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#define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | _PAGE_RW | _PAGE_EXEC)
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2016-04-29 23:25:47 +10:00
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/*
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* _PAGE_CHG_MASK masks of bits that are to be preserved across
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* pgprot changes
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*/
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#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
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_PAGE_ACCESSED | _PAGE_SPECIAL | _PAGE_PTE | \
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2025-06-19 18:58:03 +10:00
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_PAGE_SOFT_DIRTY)
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2018-01-18 17:50:35 -08:00
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2015-12-01 09:06:28 +05:30
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/*
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2016-04-29 23:25:47 +10:00
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* cacheable kernel and user pages) and one for non cacheable
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* pages. We always set _PAGE_COHERENT when SMP is enabled or
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* the processor might need it for DMA coherency.
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2015-12-01 09:06:28 +05:30
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*/
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2018-10-09 13:52:00 +00:00
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#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
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2016-04-29 23:25:47 +10:00
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#define _PAGE_BASE (_PAGE_BASE_NC)
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2023-09-25 20:31:41 +02:00
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#include <asm/pgtable-masks.h>
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2016-04-29 23:25:47 +10:00
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/* Permission masks used for kernel mappings */
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#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
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2022-09-07 12:05:21 +02:00
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#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | _PAGE_TOLERANT)
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#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | _PAGE_NON_IDEMPOTENT)
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2016-04-29 23:25:47 +10:00
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#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
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#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
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#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
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2016-04-29 23:25:49 +10:00
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#ifndef __ASSEMBLY__
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/*
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* page table defines
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*/
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extern unsigned long __pte_index_size;
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extern unsigned long __pmd_index_size;
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extern unsigned long __pud_index_size;
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extern unsigned long __pgd_index_size;
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2018-02-11 20:30:06 +05:30
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extern unsigned long __pud_cache_index;
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2016-04-29 23:25:49 +10:00
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#define PTE_INDEX_SIZE __pte_index_size
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#define PMD_INDEX_SIZE __pmd_index_size
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#define PUD_INDEX_SIZE __pud_index_size
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#define PGD_INDEX_SIZE __pgd_index_size
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2018-04-16 16:57:23 +05:30
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/* pmd table use page table fragments */
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#define PMD_CACHE_INDEX 0
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2018-02-11 20:30:06 +05:30
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#define PUD_CACHE_INDEX __pud_cache_index
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2016-04-29 23:25:49 +10:00
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/*
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* Because of use of pte fragments and THP, size of page table
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* are not always derived out of index size above.
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*/
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extern unsigned long __pte_table_size;
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extern unsigned long __pmd_table_size;
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extern unsigned long __pud_table_size;
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extern unsigned long __pgd_table_size;
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#define PTE_TABLE_SIZE __pte_table_size
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#define PMD_TABLE_SIZE __pmd_table_size
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#define PUD_TABLE_SIZE __pud_table_size
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#define PGD_TABLE_SIZE __pgd_table_size
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2016-04-29 23:26:19 +10:00
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extern unsigned long __pmd_val_bits;
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extern unsigned long __pud_val_bits;
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extern unsigned long __pgd_val_bits;
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#define PMD_VAL_BITS __pmd_val_bits
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#define PUD_VAL_BITS __pud_val_bits
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#define PGD_VAL_BITS __pgd_val_bits
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2016-04-29 23:26:23 +10:00
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extern unsigned long __pte_frag_nr;
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#define PTE_FRAG_NR __pte_frag_nr
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extern unsigned long __pte_frag_size_shift;
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#define PTE_FRAG_SIZE_SHIFT __pte_frag_size_shift
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#define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
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2016-04-29 23:25:49 +10:00
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2018-04-16 16:57:22 +05:30
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extern unsigned long __pmd_frag_nr;
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#define PMD_FRAG_NR __pmd_frag_nr
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extern unsigned long __pmd_frag_size_shift;
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#define PMD_FRAG_SIZE_SHIFT __pmd_frag_size_shift
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#define PMD_FRAG_SIZE (1UL << PMD_FRAG_SIZE_SHIFT)
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2016-04-29 23:25:49 +10:00
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#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
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#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
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#define PTRS_PER_PUD (1 << PUD_INDEX_SIZE)
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#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
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powerpc: Book3S 64-bit outline-only KASAN support
Implement a limited form of KASAN for Book3S 64-bit machines running under
the Radix MMU, supporting only outline mode.
- Enable the compiler instrumentation to check addresses and maintain the
shadow region. (This is the guts of KASAN which we can easily reuse.)
- Require kasan-vmalloc support to handle modules and anything else in
vmalloc space.
- KASAN needs to be able to validate all pointer accesses, but we can't
instrument all kernel addresses - only linear map and vmalloc. On boot,
set up a single page of read-only shadow that marks all iomap and
vmemmap accesses as valid.
- Document KASAN in powerpc docs.
Background
----------
KASAN support on Book3S is a bit tricky to get right:
- It would be good to support inline instrumentation so as to be able to
catch stack issues that cannot be caught with outline mode.
- Inline instrumentation requires a fixed offset.
- Book3S runs code with translations off ("real mode") during boot,
including a lot of generic device-tree parsing code which is used to
determine MMU features.
[ppc64 mm note: The kernel installs a linear mapping at effective
address c000...-c008.... This is a one-to-one mapping with physical
memory from 0000... onward. Because of how memory accesses work on
powerpc 64-bit Book3S, a kernel pointer in the linear map accesses the
same memory both with translations on (accessing as an 'effective
address'), and with translations off (accessing as a 'real
address'). This works in both guests and the hypervisor. For more
details, see s5.7 of Book III of version 3 of the ISA, in particular
the Storage Control Overview, s5.7.3, and s5.7.5 - noting that this
KASAN implementation currently only supports Radix.]
- Some code - most notably a lot of KVM code - also runs with translations
off after boot.
- Therefore any offset has to point to memory that is valid with
translations on or off.
One approach is just to give up on inline instrumentation. This way
boot-time checks can be delayed until after the MMU is set is up, and we
can just not instrument any code that runs with translations off after
booting. Take this approach for now and require outline instrumentation.
Previous attempts allowed inline instrumentation. However, they came with
some unfortunate restrictions: only physically contiguous memory could be
used and it had to be specified at compile time. Maybe we can do better in
the future.
[paulus@ozlabs.org - Rebased onto 5.17. Note that a kernel with
CONFIG_KASAN=y will crash during boot on a machine using HPT
translation because not all the entry points to the generic
KASAN code are protected with a call to kasan_arch_is_ready().]
Originally-by: Balbir Singh <bsingharora@gmail.com> # ppc64 out-of-line radix version
Signed-off-by: Daniel Axtens <dja@axtens.net>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
[mpe: Update copyright year and comment formatting]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/YoTE69OQwiG7z+Gu@cleo
2022-05-18 20:05:31 +10:00
|
|
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#define MAX_PTRS_PER_PTE ((H_PTRS_PER_PTE > R_PTRS_PER_PTE) ? H_PTRS_PER_PTE : R_PTRS_PER_PTE)
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#define MAX_PTRS_PER_PMD ((H_PTRS_PER_PMD > R_PTRS_PER_PMD) ? H_PTRS_PER_PMD : R_PTRS_PER_PMD)
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|
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#define MAX_PTRS_PER_PUD ((H_PTRS_PER_PUD > R_PTRS_PER_PUD) ? H_PTRS_PER_PUD : R_PTRS_PER_PUD)
|
2021-06-07 10:56:05 +00:00
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#define MAX_PTRS_PER_PGD (1 << (H_PGD_INDEX_SIZE > RADIX_PGD_INDEX_SIZE ? \
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|
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H_PGD_INDEX_SIZE : RADIX_PGD_INDEX_SIZE))
|
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2016-04-29 23:25:49 +10:00
|
|
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/* PMD_SHIFT determines what a second-level page table entry can map */
|
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|
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#define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE)
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#define PMD_SIZE (1UL << PMD_SHIFT)
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#define PMD_MASK (~(PMD_SIZE-1))
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/* PUD_SHIFT determines what a third-level page table entry can map */
|
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|
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#define PUD_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
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#define PUD_SIZE (1UL << PUD_SHIFT)
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#define PUD_MASK (~(PUD_SIZE-1))
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|
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/* PGDIR_SHIFT determines what a fourth-level page table entry can map */
|
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#define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE)
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE-1))
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/* Bits to mask out from a PMD to get to the PTE page */
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#define PMD_MASKED_BITS 0xc0000000000000ffUL
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/* Bits to mask out from a PUD to get to the PMD page */
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|
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#define PUD_MASKED_BITS 0xc0000000000000ffUL
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/* Bits to mask out from a PGD to get to the PUD page */
|
2020-06-04 16:46:44 -07:00
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#define P4D_MASKED_BITS 0xc0000000000000ffUL
|
2016-04-29 23:26:21 +10:00
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|
2018-04-16 16:57:21 +05:30
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|
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/*
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* Used as an indicator for rcu callback functions
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*/
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enum pgtable_index {
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PTE_INDEX = 0,
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PMD_INDEX,
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PUD_INDEX,
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PGD_INDEX,
|
2018-06-14 16:01:52 +05:30
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|
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/*
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* Below are used with 4k page size and hugetlb
|
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|
|
*/
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HTLB_16M_INDEX,
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HTLB_16G_INDEX,
|
2018-04-16 16:57:21 +05:30
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};
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2016-04-29 23:26:21 +10:00
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extern unsigned long __vmalloc_start;
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extern unsigned long __vmalloc_end;
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#define VMALLOC_START __vmalloc_start
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#define VMALLOC_END __vmalloc_end
|
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2019-06-10 13:08:18 +10:00
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static inline unsigned int ioremap_max_order(void)
|
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|
|
{
|
|
|
|
|
if (radix_enabled())
|
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|
|
return PUD_SHIFT;
|
|
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|
return 7 + PAGE_SHIFT; /* default from linux/vmalloc.h */
|
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|
|
}
|
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|
#define IOREMAP_MAX_ORDER ioremap_max_order()
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|
2016-04-29 23:26:21 +10:00
|
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|
extern unsigned long __kernel_virt_start;
|
2017-08-01 20:29:22 +10:00
|
|
|
extern unsigned long __kernel_io_start;
|
2019-04-17 18:29:13 +05:30
|
|
|
extern unsigned long __kernel_io_end;
|
2016-04-29 23:26:21 +10:00
|
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|
#define KERN_VIRT_START __kernel_virt_start
|
2017-08-01 20:29:22 +10:00
|
|
|
#define KERN_IO_START __kernel_io_start
|
2019-04-17 18:29:13 +05:30
|
|
|
#define KERN_IO_END __kernel_io_end
|
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|
2016-04-29 23:26:21 +10:00
|
|
|
extern struct page *vmemmap;
|
2016-06-29 21:06:28 +01:00
|
|
|
extern unsigned long pci_io_base;
|
2024-03-18 16:03:59 -04:00
|
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|
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|
|
#define pmd_leaf pmd_leaf
|
|
|
|
|
static inline bool pmd_leaf(pmd_t pmd)
|
|
|
|
|
{
|
|
|
|
|
return !!(pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define pud_leaf pud_leaf
|
|
|
|
|
static inline bool pud_leaf(pud_t pud)
|
|
|
|
|
{
|
|
|
|
|
return !!(pud_raw(pud) & cpu_to_be64(_PAGE_PTE));
|
|
|
|
|
}
|
2024-07-02 15:51:33 +02:00
|
|
|
|
|
|
|
|
#define pmd_leaf_size pmd_leaf_size
|
|
|
|
|
static inline unsigned long pmd_leaf_size(pmd_t pmd)
|
|
|
|
|
{
|
|
|
|
|
if (IS_ENABLED(CONFIG_PPC_4K_PAGES) && !radix_enabled())
|
|
|
|
|
return SZ_16M;
|
|
|
|
|
else
|
|
|
|
|
return PMD_SIZE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define pud_leaf_size pud_leaf_size
|
|
|
|
|
static inline unsigned long pud_leaf_size(pud_t pud)
|
|
|
|
|
{
|
|
|
|
|
if (IS_ENABLED(CONFIG_PPC_4K_PAGES) && !radix_enabled())
|
|
|
|
|
return SZ_16G;
|
|
|
|
|
else
|
|
|
|
|
return PUD_SIZE;
|
|
|
|
|
}
|
2016-04-29 23:25:49 +10:00
|
|
|
#endif /* __ASSEMBLY__ */
|
2015-12-01 09:06:28 +05:30
|
|
|
|
2015-12-01 09:06:30 +05:30
|
|
|
#include <asm/book3s/64/hash.h>
|
2016-04-29 23:25:52 +10:00
|
|
|
#include <asm/book3s/64/radix.h>
|
2015-12-01 09:06:28 +05:30
|
|
|
|
2020-06-08 12:39:04 +05:30
|
|
|
#if H_MAX_PHYSMEM_BITS > R_MAX_PHYSMEM_BITS
|
|
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|
|
#define MAX_PHYSMEM_BITS H_MAX_PHYSMEM_BITS
|
|
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|
|
#else
|
|
|
|
|
#define MAX_PHYSMEM_BITS R_MAX_PHYSMEM_BITS
|
|
|
|
|
#endif
|
|
|
|
|
|
2024-07-02 15:51:33 +02:00
|
|
|
/* hash 4k can't share hugetlb and also doesn't support THP */
|
2016-04-29 23:25:55 +10:00
|
|
|
#ifdef CONFIG_PPC_64K_PAGES
|
|
|
|
|
#include <asm/book3s/64/pgtable-64k.h>
|
|
|
|
|
#endif
|
|
|
|
|
|
2015-12-01 09:06:28 +05:30
|
|
|
#include <asm/barrier.h>
|
|
|
|
|
/*
|
2019-04-17 18:29:13 +05:30
|
|
|
* IO space itself carved into the PIO region (ISA and PHB IO space) and
|
2015-12-01 09:06:28 +05:30
|
|
|
* the ioremap space
|
|
|
|
|
*
|
|
|
|
|
* ISA_IO_BASE = KERN_IO_START, 64K reserved area
|
|
|
|
|
* PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
|
|
|
|
|
* IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
|
|
|
|
|
*/
|
|
|
|
|
#define FULL_IO_SIZE 0x80000000ul
|
|
|
|
|
#define ISA_IO_BASE (KERN_IO_START)
|
|
|
|
|
#define ISA_IO_END (KERN_IO_START + 0x10000ul)
|
|
|
|
|
#define PHB_IO_BASE (ISA_IO_END)
|
|
|
|
|
#define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
|
|
|
|
|
#define IOREMAP_BASE (PHB_IO_END)
|
2019-08-20 14:07:19 +00:00
|
|
|
#define IOREMAP_START (ioremap_bot)
|
2021-04-20 13:32:48 +00:00
|
|
|
#define IOREMAP_END (KERN_IO_END - FIXADDR_SIZE)
|
|
|
|
|
#define FIXADDR_SIZE SZ_32M
|
2023-09-25 20:31:21 +02:00
|
|
|
#define FIXADDR_TOP (IOREMAP_END + FIXADDR_SIZE)
|
2015-12-01 09:06:28 +05:30
|
|
|
|
|
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
|
|
2016-04-29 23:25:54 +10:00
|
|
|
static inline unsigned long pte_update(struct mm_struct *mm, unsigned long addr,
|
|
|
|
|
pte_t *ptep, unsigned long clr,
|
|
|
|
|
unsigned long set, int huge)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pte_update(mm, addr, ptep, clr, set, huge);
|
|
|
|
|
return hash__pte_update(mm, addr, ptep, clr, set, huge);
|
|
|
|
|
}
|
2016-04-29 23:25:48 +10:00
|
|
|
/*
|
|
|
|
|
* For hash even if we have _PAGE_ACCESSED = 0, we do a pte_update.
|
|
|
|
|
* We currently remove entries from the hashtable regardless of whether
|
|
|
|
|
* the entry was young or dirty.
|
|
|
|
|
*
|
|
|
|
|
* We should be more intelligent about this but for the moment we override
|
|
|
|
|
* these functions and force a tlb flush unconditionally
|
|
|
|
|
* For radix: H_PAGE_HASHPTE should be zero. Hence we can use the same
|
|
|
|
|
* function for both hash and radix.
|
|
|
|
|
*/
|
|
|
|
|
static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
|
|
|
|
|
unsigned long addr, pte_t *ptep)
|
|
|
|
|
{
|
|
|
|
|
unsigned long old;
|
|
|
|
|
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
|
2016-04-29 23:25:48 +10:00
|
|
|
return 0;
|
|
|
|
|
old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
|
|
|
|
|
return (old & _PAGE_ACCESSED) != 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
|
|
|
|
|
#define ptep_test_and_clear_young(__vma, __addr, __ptep) \
|
|
|
|
|
({ \
|
2020-12-17 23:47:31 +10:00
|
|
|
__ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
|
2016-04-29 23:25:48 +10:00
|
|
|
})
|
|
|
|
|
|
2020-12-17 23:47:31 +10:00
|
|
|
/*
|
|
|
|
|
* On Book3S CPUs, clearing the accessed bit without a TLB flush
|
|
|
|
|
* doesn't cause data corruption. [ It could cause incorrect
|
|
|
|
|
* page aging and the (mistaken) reclaim of hot pages, but the
|
|
|
|
|
* chance of that should be relatively low. ]
|
|
|
|
|
*
|
|
|
|
|
* So as a performance optimization don't flush the TLB when
|
|
|
|
|
* clearing the accessed bit, it will eventually be flushed by
|
|
|
|
|
* a context switch or a VM operation anyway. [ In the rare
|
|
|
|
|
* event of it not getting flushed for a long time the delay
|
|
|
|
|
* shouldn't really matter because there's no real memory
|
|
|
|
|
* pressure for swapout to react to. ]
|
2022-09-01 21:03:34 +10:00
|
|
|
*
|
|
|
|
|
* Note: this optimisation also exists in pte_needs_flush() and
|
|
|
|
|
* huge_pmd_needs_flush().
|
2020-12-17 23:47:31 +10:00
|
|
|
*/
|
|
|
|
|
#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
|
|
|
|
|
#define ptep_clear_flush_young ptep_test_and_clear_young
|
|
|
|
|
|
|
|
|
|
#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
|
|
|
|
|
#define pmdp_clear_flush_young pmdp_test_and_clear_young
|
|
|
|
|
|
2017-03-09 16:16:39 -08:00
|
|
|
static inline int pte_write(pte_t pte)
|
|
|
|
|
{
|
2022-11-08 18:46:51 +01:00
|
|
|
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_WRITE));
|
2017-03-09 16:16:39 -08:00
|
|
|
}
|
|
|
|
|
|
powerpc/hugetlb: fix page rights verification in gup_hugepte()
gup_hugepte() checks if pages are present and readable, and
when 'write' is set, also checks if the pages are writable.
Initially this was done by checking if _PAGE_PRESENT and
_PAGE_READ were set. In addition, _PAGE_WRITE was verified for write
accesses.
The problem is that we have to handle the three following cases:
1/ The target defines __PAGE_READ and __PAGE_WRITE
2/ The target defines __PAGE_RW
3/ The target defines __PAGE_RO
In case 1/, this is obvious
In case 2/, __PAGE_READ is defined as 0 and __PAGE_WRITE as __PAGE_RW
so it works as well.
But in case 3, __PAGE_RW is defined as 0, which means __PAGE_WRITE is 0
and then the test returns true (page writable) in all cases.
A first correction was attempted in commit 6b8cb66a6a7cc ("powerpc: Fix
usage of _PAGE_RO in hugepage"), but that fix is wrong:
instead of checking that the page is writable when write is requested,
it checks that the page is NOT writable when write is NOT requested.
This patch adds a new pte_read() helper to check whether a page is
readable or not. This avoids handling all possible cases in
gup_hugepte().
Then gup_hugepte() is modified to use pte_present(), pte_read()
and pte_write() instead of the raw flags.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-07-12 17:03:42 +02:00
|
|
|
static inline int pte_read(pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_READ));
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-29 23:25:48 +10:00
|
|
|
#define __HAVE_ARCH_PTEP_SET_WRPROTECT
|
|
|
|
|
static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
|
|
|
|
|
pte_t *ptep)
|
|
|
|
|
{
|
2022-11-08 18:46:51 +01:00
|
|
|
if (pte_write(*ptep))
|
2017-03-09 16:16:36 -08:00
|
|
|
pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 0);
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
2018-10-26 15:08:35 -07:00
|
|
|
#define __HAVE_ARCH_HUGE_PTEP_SET_WRPROTECT
|
2016-04-29 23:25:48 +10:00
|
|
|
static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
|
|
|
|
|
unsigned long addr, pte_t *ptep)
|
|
|
|
|
{
|
2022-11-08 18:46:51 +01:00
|
|
|
if (pte_write(*ptep))
|
2017-03-09 16:16:36 -08:00
|
|
|
pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 1);
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
|
|
|
|
|
static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
|
|
|
|
|
unsigned long addr, pte_t *ptep)
|
|
|
|
|
{
|
|
|
|
|
unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
|
|
|
|
|
return __pte(old);
|
|
|
|
|
}
|
|
|
|
|
|
2017-02-09 08:28:20 +05:30
|
|
|
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
|
|
|
|
|
static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
|
|
|
|
|
unsigned long addr,
|
|
|
|
|
pte_t *ptep, int full)
|
|
|
|
|
{
|
|
|
|
|
if (full && radix_enabled()) {
|
|
|
|
|
/*
|
2018-07-05 18:47:00 +10:00
|
|
|
* We know that this is a full mm pte clear and
|
|
|
|
|
* hence can be sure there is no parallel set_pte.
|
2017-02-09 08:28:20 +05:30
|
|
|
*/
|
|
|
|
|
return radix__ptep_get_and_clear_full(mm, addr, ptep, full);
|
|
|
|
|
}
|
|
|
|
|
return ptep_get_and_clear(mm, addr, ptep);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2016-04-29 23:25:48 +10:00
|
|
|
static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
|
|
|
|
|
pte_t * ptep)
|
|
|
|
|
{
|
|
|
|
|
pte_update(mm, addr, ptep, ~0UL, 0, 0);
|
|
|
|
|
}
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
|
|
|
|
|
static inline int pte_dirty(pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_DIRTY));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int pte_young(pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_ACCESSED));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int pte_special(pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SPECIAL));
|
|
|
|
|
}
|
|
|
|
|
|
2018-10-09 13:51:52 +00:00
|
|
|
static inline bool pte_exec(pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_EXEC));
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-29 23:25:48 +10:00
|
|
|
|
|
|
|
|
#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
|
|
|
|
|
static inline bool pte_soft_dirty(pte_t pte)
|
|
|
|
|
{
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SOFT_DIRTY));
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
|
2016-04-29 23:25:48 +10:00
|
|
|
static inline pte_t pte_mksoft_dirty(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SOFT_DIRTY));
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pte_t pte_clear_soft_dirty(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_SOFT_DIRTY));
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_NUMA_BALANCING
|
|
|
|
|
static inline int pte_protnone(pte_t pte)
|
|
|
|
|
{
|
2017-02-24 14:59:21 -08:00
|
|
|
return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PTE | _PAGE_RWX)) ==
|
|
|
|
|
cpu_to_be64(_PAGE_PRESENT | _PAGE_PTE);
|
|
|
|
|
}
|
2016-04-29 23:25:48 +10:00
|
|
|
#endif /* CONFIG_NUMA_BALANCING */
|
|
|
|
|
|
2020-05-05 12:47:10 +05:30
|
|
|
static inline bool pte_hw_valid(pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PTE)) ==
|
|
|
|
|
cpu_to_be64(_PAGE_PRESENT | _PAGE_PTE);
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-29 23:25:48 +10:00
|
|
|
static inline int pte_present(pte_t pte)
|
|
|
|
|
{
|
2018-08-22 22:46:04 +05:30
|
|
|
/*
|
|
|
|
|
* A pte is considerent present if _PAGE_PRESENT is set.
|
|
|
|
|
* We also need to consider the pte present which is marked
|
|
|
|
|
* invalid during ptep_set_access_flags. Hence we look for _PAGE_INVALID
|
|
|
|
|
* if we find _PAGE_PRESENT cleared.
|
|
|
|
|
*/
|
2017-12-04 07:49:11 +05:30
|
|
|
|
2020-05-05 12:47:10 +05:30
|
|
|
if (pte_hw_valid(pte))
|
|
|
|
|
return true;
|
|
|
|
|
return (pte_raw(pte) & cpu_to_be64(_PAGE_INVALID | _PAGE_PTE)) ==
|
|
|
|
|
cpu_to_be64(_PAGE_INVALID | _PAGE_PTE);
|
2018-10-09 13:51:52 +00:00
|
|
|
}
|
|
|
|
|
|
2018-01-18 17:50:38 -08:00
|
|
|
#ifdef CONFIG_PPC_MEM_KEYS
|
2018-01-18 17:50:37 -08:00
|
|
|
extern bool arch_pte_access_permitted(u64 pte, bool write, bool execute);
|
2018-01-18 17:50:38 -08:00
|
|
|
#else
|
|
|
|
|
static inline bool arch_pte_access_permitted(u64 pte, bool write, bool execute)
|
|
|
|
|
{
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
#endif /* CONFIG_PPC_MEM_KEYS */
|
2018-01-18 17:50:37 -08:00
|
|
|
|
2018-10-09 13:52:20 +00:00
|
|
|
static inline bool pte_user(pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
return !(pte_raw(pte) & cpu_to_be64(_PAGE_PRIVILEGED));
|
|
|
|
|
}
|
|
|
|
|
|
2017-12-04 07:49:11 +05:30
|
|
|
#define pte_access_permitted pte_access_permitted
|
|
|
|
|
static inline bool pte_access_permitted(pte_t pte, bool write)
|
|
|
|
|
{
|
|
|
|
|
/*
|
2023-12-04 15:06:37 +05:30
|
|
|
* _PAGE_READ is needed for any access and will be cleared for
|
|
|
|
|
* PROT_NONE. Execute-only mapping via PROT_EXEC also returns false.
|
2017-12-04 07:49:11 +05:30
|
|
|
*/
|
2018-10-09 13:52:20 +00:00
|
|
|
if (!pte_present(pte) || !pte_user(pte) || !pte_read(pte))
|
2017-12-04 07:49:11 +05:30
|
|
|
return false;
|
|
|
|
|
|
2018-10-09 13:52:20 +00:00
|
|
|
if (write && !pte_write(pte))
|
2017-12-04 07:49:11 +05:30
|
|
|
return false;
|
2018-01-18 17:50:38 -08:00
|
|
|
|
|
|
|
|
return arch_pte_access_permitted(pte_val(pte), write, 0);
|
2017-12-04 07:49:11 +05:30
|
|
|
}
|
|
|
|
|
|
2016-04-29 23:25:48 +10:00
|
|
|
/*
|
|
|
|
|
* Conversion functions: convert a page and protection to a page entry,
|
|
|
|
|
* and a page entry and page directory to the page they refer to.
|
|
|
|
|
*
|
|
|
|
|
* Even if PTEs can be unsigned long long, a PFN is always an unsigned
|
|
|
|
|
* long for now.
|
|
|
|
|
*/
|
|
|
|
|
static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
|
|
|
|
|
{
|
2019-07-24 18:46:38 +10:00
|
|
|
VM_BUG_ON(pfn >> (64 - PAGE_SHIFT));
|
|
|
|
|
VM_BUG_ON((pfn << PAGE_SHIFT) & ~PTE_RPN_MASK);
|
|
|
|
|
|
2020-10-15 20:04:29 -07:00
|
|
|
return __pte(((pte_basic_t)pfn << PAGE_SHIFT) | pgprot_val(pgprot) | _PAGE_PTE);
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Generic modifiers for PTE bits */
|
|
|
|
|
static inline pte_t pte_wrprotect(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_WRITE));
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
2018-10-09 13:51:52 +00:00
|
|
|
static inline pte_t pte_exprotect(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_EXEC));
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pte_t pte_mkclean(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_DIRTY));
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pte_t pte_mkold(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_ACCESSED));
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
2018-10-09 13:51:52 +00:00
|
|
|
static inline pte_t pte_mkexec(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_EXEC));
|
2018-10-09 13:51:52 +00:00
|
|
|
}
|
|
|
|
|
|
2023-06-12 17:10:27 -07:00
|
|
|
static inline pte_t pte_mkwrite_novma(pte_t pte)
|
2016-04-29 23:25:48 +10:00
|
|
|
{
|
|
|
|
|
/*
|
|
|
|
|
* write implies read, hence set both
|
|
|
|
|
*/
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_RW));
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pte_t pte_mkdirty(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_DIRTY | _PAGE_SOFT_DIRTY));
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pte_t pte_mkyoung(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_ACCESSED));
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pte_t pte_mkspecial(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SPECIAL));
|
2016-04-29 23:25:48 +10:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pte_t pte_mkhuge(pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
return pte;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
|
|
|
|
|
{
|
|
|
|
|
/* FIXME!! check whether this need to be a conditional */
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw((pte_raw(pte) & cpu_to_be64(_PAGE_CHG_MASK)) |
|
|
|
|
|
cpu_to_be64(pgprot_val(newprot)));
|
2016-04-29 23:25:51 +10:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Encode and de-code a swap entry */
|
|
|
|
|
#define MAX_SWAPFILES_CHECK() do { \
|
|
|
|
|
BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
|
|
|
|
|
/* \
|
|
|
|
|
* Don't have overlapping bits with _PAGE_HPTEFLAGS \
|
|
|
|
|
* We filter HPTEFLAGS on set_pte. \
|
|
|
|
|
*/ \
|
2022-05-09 18:20:46 -07:00
|
|
|
BUILD_BUG_ON(_PAGE_HPTEFLAGS & SWP_TYPE_MASK); \
|
2016-04-29 23:25:51 +10:00
|
|
|
BUILD_BUG_ON(_PAGE_HPTEFLAGS & _PAGE_SWP_SOFT_DIRTY); \
|
2022-05-09 18:20:47 -07:00
|
|
|
BUILD_BUG_ON(_PAGE_HPTEFLAGS & _PAGE_SWP_EXCLUSIVE); \
|
2016-04-29 23:25:51 +10:00
|
|
|
} while (0)
|
2017-11-03 13:30:42 -04:00
|
|
|
|
2016-04-29 23:25:51 +10:00
|
|
|
#define SWP_TYPE_BITS 5
|
2022-05-09 18:20:46 -07:00
|
|
|
#define SWP_TYPE_MASK ((1UL << SWP_TYPE_BITS) - 1)
|
|
|
|
|
#define __swp_type(x) ((x).val & SWP_TYPE_MASK)
|
2016-04-29 23:25:51 +10:00
|
|
|
#define __swp_offset(x) (((x).val & PTE_RPN_MASK) >> PAGE_SHIFT)
|
|
|
|
|
#define __swp_entry(type, offset) ((swp_entry_t) { \
|
2022-05-09 18:20:46 -07:00
|
|
|
(type) | (((offset) << PAGE_SHIFT) & PTE_RPN_MASK)})
|
2016-04-29 23:25:51 +10:00
|
|
|
/*
|
|
|
|
|
* swp_entry_t must be independent of pte bits. We build a swp_entry_t from
|
|
|
|
|
* swap type and offset we get from swap and convert that to pte to find a
|
|
|
|
|
* matching pte in linux page table.
|
|
|
|
|
* Clear bits not found in swap entries here.
|
|
|
|
|
*/
|
|
|
|
|
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) & ~_PAGE_PTE })
|
|
|
|
|
#define __swp_entry_to_pte(x) __pte((x).val | _PAGE_PTE)
|
2018-09-20 23:39:47 +05:30
|
|
|
#define __pmd_to_swp_entry(pmd) (__pte_to_swp_entry(pmd_pte(pmd)))
|
|
|
|
|
#define __swp_entry_to_pmd(x) (pte_pmd(__swp_entry_to_pte(x)))
|
2016-04-29 23:25:51 +10:00
|
|
|
|
|
|
|
|
#ifdef CONFIG_MEM_SOFT_DIRTY
|
2022-05-09 18:20:47 -07:00
|
|
|
#define _PAGE_SWP_SOFT_DIRTY _PAGE_SOFT_DIRTY
|
2016-04-29 23:25:51 +10:00
|
|
|
#else
|
|
|
|
|
#define _PAGE_SWP_SOFT_DIRTY 0UL
|
|
|
|
|
#endif /* CONFIG_MEM_SOFT_DIRTY */
|
|
|
|
|
|
2022-05-09 18:20:47 -07:00
|
|
|
#define _PAGE_SWP_EXCLUSIVE _PAGE_NON_IDEMPOTENT
|
|
|
|
|
|
2016-04-29 23:25:51 +10:00
|
|
|
#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
|
|
|
|
|
static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SWP_SOFT_DIRTY));
|
2016-04-29 23:25:51 +10:00
|
|
|
}
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
|
2016-04-29 23:25:51 +10:00
|
|
|
static inline bool pte_swp_soft_dirty(pte_t pte)
|
|
|
|
|
{
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SWP_SOFT_DIRTY));
|
2016-04-29 23:25:51 +10:00
|
|
|
}
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
|
2016-04-29 23:25:51 +10:00
|
|
|
static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_SWP_SOFT_DIRTY));
|
2016-04-29 23:25:51 +10:00
|
|
|
}
|
|
|
|
|
#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
|
|
|
|
|
|
2022-05-09 18:20:47 -07:00
|
|
|
static inline pte_t pte_swp_mkexclusive(pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
return __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_SWP_EXCLUSIVE));
|
|
|
|
|
}
|
|
|
|
|
|
2025-02-18 18:55:14 +01:00
|
|
|
static inline bool pte_swp_exclusive(pte_t pte)
|
2022-05-09 18:20:47 -07:00
|
|
|
{
|
|
|
|
|
return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SWP_EXCLUSIVE));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pte_t pte_swp_clear_exclusive(pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
return __pte_raw(pte_raw(pte) & cpu_to_be64(~_PAGE_SWP_EXCLUSIVE));
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-29 23:25:51 +10:00
|
|
|
static inline bool check_pte_access(unsigned long access, unsigned long ptev)
|
|
|
|
|
{
|
|
|
|
|
/*
|
|
|
|
|
* This check for _PAGE_RWX and _PAGE_PRESENT bits
|
|
|
|
|
*/
|
|
|
|
|
if (access & ~ptev)
|
|
|
|
|
return false;
|
|
|
|
|
/*
|
|
|
|
|
* This check for access to privilege space
|
|
|
|
|
*/
|
|
|
|
|
if ((access & _PAGE_PRIVILEGED) != (ptev & _PAGE_PRIVILEGED))
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
return true;
|
|
|
|
|
}
|
2016-04-29 23:25:54 +10:00
|
|
|
/*
|
|
|
|
|
* Generic functions with hash/radix callbacks
|
|
|
|
|
*/
|
|
|
|
|
|
2018-05-29 19:58:40 +05:30
|
|
|
static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
|
2016-11-28 11:47:02 +05:30
|
|
|
pte_t *ptep, pte_t entry,
|
2018-05-29 19:58:40 +05:30
|
|
|
unsigned long address,
|
|
|
|
|
int psize)
|
2016-04-29 23:25:54 +10:00
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
2018-05-29 19:58:40 +05:30
|
|
|
return radix__ptep_set_access_flags(vma, ptep, entry,
|
|
|
|
|
address, psize);
|
2016-04-29 23:25:54 +10:00
|
|
|
return hash__ptep_set_access_flags(ptep, entry);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define __HAVE_ARCH_PTE_SAME
|
|
|
|
|
static inline int pte_same(pte_t pte_a, pte_t pte_b)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pte_same(pte_a, pte_b);
|
|
|
|
|
return hash__pte_same(pte_a, pte_b);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int pte_none(pte_t pte)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pte_none(pte);
|
|
|
|
|
return hash__pte_none(pte);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
|
|
|
|
|
pte_t *ptep, pte_t pte, int percpu)
|
|
|
|
|
{
|
2020-10-15 20:04:29 -07:00
|
|
|
|
|
|
|
|
VM_WARN_ON(!(pte_raw(pte) & cpu_to_be64(_PAGE_PTE)));
|
|
|
|
|
/*
|
|
|
|
|
* Keep the _PAGE_PTE added till we are sure we handle _PAGE_PTE
|
|
|
|
|
* in all the callers.
|
|
|
|
|
*/
|
|
|
|
|
pte = __pte_raw(pte_raw(pte) | cpu_to_be64(_PAGE_PTE));
|
|
|
|
|
|
2016-04-29 23:25:54 +10:00
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__set_pte_at(mm, addr, ptep, pte, percpu);
|
|
|
|
|
return hash__set_pte_at(mm, addr, ptep, pte, percpu);
|
|
|
|
|
}
|
2016-04-29 23:25:51 +10:00
|
|
|
|
2020-08-21 13:55:56 -05:00
|
|
|
#define _PAGE_CACHE_CTL (_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT)
|
|
|
|
|
|
2016-04-29 23:25:48 +10:00
|
|
|
#define pgprot_noncached pgprot_noncached
|
|
|
|
|
static inline pgprot_t pgprot_noncached(pgprot_t prot)
|
|
|
|
|
{
|
|
|
|
|
return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
|
|
|
|
|
_PAGE_NON_IDEMPOTENT);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define pgprot_noncached_wc pgprot_noncached_wc
|
|
|
|
|
static inline pgprot_t pgprot_noncached_wc(pgprot_t prot)
|
|
|
|
|
{
|
|
|
|
|
return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
|
|
|
|
|
_PAGE_TOLERANT);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define pgprot_cached pgprot_cached
|
|
|
|
|
static inline pgprot_t pgprot_cached(pgprot_t prot)
|
|
|
|
|
{
|
|
|
|
|
return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define pgprot_writecombine pgprot_writecombine
|
|
|
|
|
static inline pgprot_t pgprot_writecombine(pgprot_t prot)
|
|
|
|
|
{
|
|
|
|
|
return pgprot_noncached_wc(prot);
|
|
|
|
|
}
|
|
|
|
|
/*
|
|
|
|
|
* check a pte mapping have cache inhibited property
|
|
|
|
|
*/
|
|
|
|
|
static inline bool pte_ci(pte_t pte)
|
|
|
|
|
{
|
2018-10-09 13:52:20 +00:00
|
|
|
__be64 pte_v = pte_raw(pte);
|
2016-04-29 23:25:48 +10:00
|
|
|
|
2018-10-09 13:52:20 +00:00
|
|
|
if (((pte_v & cpu_to_be64(_PAGE_CACHE_CTL)) == cpu_to_be64(_PAGE_TOLERANT)) ||
|
|
|
|
|
((pte_v & cpu_to_be64(_PAGE_CACHE_CTL)) == cpu_to_be64(_PAGE_NON_IDEMPOTENT)))
|
2016-04-29 23:25:48 +10:00
|
|
|
return true;
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2015-12-01 09:06:35 +05:30
|
|
|
static inline void pmd_clear(pmd_t *pmdp)
|
|
|
|
|
{
|
2020-10-15 20:04:26 -07:00
|
|
|
if (IS_ENABLED(CONFIG_DEBUG_VM) && !radix_enabled()) {
|
|
|
|
|
/*
|
|
|
|
|
* Don't use this if we can possibly have a hash page table
|
|
|
|
|
* entry mapping this.
|
|
|
|
|
*/
|
|
|
|
|
WARN_ON((pmd_val(*pmdp) & (H_PAGE_HASHPTE | _PAGE_PTE)) == (H_PAGE_HASHPTE | _PAGE_PTE));
|
|
|
|
|
}
|
2015-12-01 09:06:35 +05:30
|
|
|
*pmdp = __pmd(0);
|
|
|
|
|
}
|
|
|
|
|
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
static inline int pmd_none(pmd_t pmd)
|
|
|
|
|
{
|
|
|
|
|
return !pmd_raw(pmd);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int pmd_present(pmd_t pmd)
|
|
|
|
|
{
|
2018-09-20 23:39:42 +05:30
|
|
|
/*
|
|
|
|
|
* A pmd is considerent present if _PAGE_PRESENT is set.
|
|
|
|
|
* We also need to consider the pmd present which is marked
|
|
|
|
|
* invalid during a split. Hence we look for _PAGE_INVALID
|
|
|
|
|
* if we find _PAGE_PRESENT cleared.
|
|
|
|
|
*/
|
|
|
|
|
if (pmd_raw(pmd) & cpu_to_be64(_PAGE_PRESENT | _PAGE_INVALID))
|
|
|
|
|
return true;
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
|
2018-09-20 23:39:42 +05:30
|
|
|
return false;
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
}
|
2015-12-01 09:06:28 +05:30
|
|
|
|
2019-06-07 13:56:35 +10:00
|
|
|
static inline int pmd_is_serializing(pmd_t pmd)
|
|
|
|
|
{
|
|
|
|
|
/*
|
|
|
|
|
* If the pmd is undergoing a split, the _PAGE_PRESENT bit is clear
|
|
|
|
|
* and _PAGE_INVALID is set (see pmd_present, pmdp_invalidate).
|
|
|
|
|
*
|
|
|
|
|
* This condition may also occur when flushing a pmd while flushing
|
|
|
|
|
* it (see ptep_modify_prot_start), so callers must ensure this
|
|
|
|
|
* case is fine as well.
|
|
|
|
|
*/
|
|
|
|
|
if ((pmd_raw(pmd) & cpu_to_be64(_PAGE_PRESENT | _PAGE_INVALID)) ==
|
|
|
|
|
cpu_to_be64(_PAGE_INVALID))
|
|
|
|
|
return true;
|
|
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-29 23:25:54 +10:00
|
|
|
static inline int pmd_bad(pmd_t pmd)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pmd_bad(pmd);
|
|
|
|
|
return hash__pmd_bad(pmd);
|
|
|
|
|
}
|
|
|
|
|
|
2015-12-01 09:06:35 +05:30
|
|
|
static inline void pud_clear(pud_t *pudp)
|
|
|
|
|
{
|
2020-10-15 20:04:26 -07:00
|
|
|
if (IS_ENABLED(CONFIG_DEBUG_VM) && !radix_enabled()) {
|
|
|
|
|
/*
|
|
|
|
|
* Don't use this if we can possibly have a hash page table
|
|
|
|
|
* entry mapping this.
|
|
|
|
|
*/
|
|
|
|
|
WARN_ON((pud_val(*pudp) & (H_PAGE_HASHPTE | _PAGE_PTE)) == (H_PAGE_HASHPTE | _PAGE_PTE));
|
|
|
|
|
}
|
2015-12-01 09:06:35 +05:30
|
|
|
*pudp = __pud(0);
|
|
|
|
|
}
|
|
|
|
|
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
static inline int pud_none(pud_t pud)
|
|
|
|
|
{
|
|
|
|
|
return !pud_raw(pud);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline int pud_present(pud_t pud)
|
|
|
|
|
{
|
2019-02-14 15:00:36 +11:00
|
|
|
return !!(pud_raw(pud) & cpu_to_be64(_PAGE_PRESENT));
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
}
|
2015-12-01 09:06:28 +05:30
|
|
|
|
|
|
|
|
extern struct page *pud_page(pud_t pud);
|
2015-12-01 09:06:36 +05:30
|
|
|
extern struct page *pmd_page(pmd_t pmd);
|
2015-12-01 09:06:28 +05:30
|
|
|
static inline pte_t pud_pte(pud_t pud)
|
|
|
|
|
{
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
return __pte_raw(pud_raw(pud));
|
2015-12-01 09:06:28 +05:30
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pud_t pte_pud(pte_t pte)
|
|
|
|
|
{
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
return __pud_raw(pte_raw(pte));
|
2015-12-01 09:06:28 +05:30
|
|
|
}
|
2023-07-25 00:37:55 +05:30
|
|
|
|
|
|
|
|
static inline pte_t *pudp_ptep(pud_t *pud)
|
|
|
|
|
{
|
|
|
|
|
return (pte_t *)pud;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define pud_pfn(pud) pte_pfn(pud_pte(pud))
|
|
|
|
|
#define pud_dirty(pud) pte_dirty(pud_pte(pud))
|
|
|
|
|
#define pud_young(pud) pte_young(pud_pte(pud))
|
|
|
|
|
#define pud_mkold(pud) pte_pud(pte_mkold(pud_pte(pud)))
|
|
|
|
|
#define pud_wrprotect(pud) pte_pud(pte_wrprotect(pud_pte(pud)))
|
|
|
|
|
#define pud_mkdirty(pud) pte_pud(pte_mkdirty(pud_pte(pud)))
|
|
|
|
|
#define pud_mkclean(pud) pte_pud(pte_mkclean(pud_pte(pud)))
|
|
|
|
|
#define pud_mkyoung(pud) pte_pud(pte_mkyoung(pud_pte(pud)))
|
2023-08-31 23:27:31 +02:00
|
|
|
#define pud_mkwrite(pud) pte_pud(pte_mkwrite_novma(pud_pte(pud)))
|
2015-12-01 09:06:28 +05:30
|
|
|
#define pud_write(pud) pte_write(pud_pte(pud))
|
2016-04-29 23:25:54 +10:00
|
|
|
|
2023-07-25 00:37:55 +05:30
|
|
|
#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
|
|
|
|
|
#define pud_soft_dirty(pmd) pte_soft_dirty(pud_pte(pud))
|
|
|
|
|
#define pud_mksoft_dirty(pmd) pte_pud(pte_mksoft_dirty(pud_pte(pud)))
|
|
|
|
|
#define pud_clear_soft_dirty(pmd) pte_pud(pte_clear_soft_dirty(pud_pte(pud)))
|
|
|
|
|
#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
|
|
|
|
|
|
2016-04-29 23:25:54 +10:00
|
|
|
static inline int pud_bad(pud_t pud)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pud_bad(pud);
|
|
|
|
|
return hash__pud_bad(pud);
|
|
|
|
|
}
|
|
|
|
|
|
2017-12-04 07:49:11 +05:30
|
|
|
#define pud_access_permitted pud_access_permitted
|
|
|
|
|
static inline bool pud_access_permitted(pud_t pud, bool write)
|
|
|
|
|
{
|
|
|
|
|
return pte_access_permitted(pud_pte(pud), write);
|
|
|
|
|
}
|
2016-04-29 23:25:54 +10:00
|
|
|
|
2020-06-04 16:46:44 -07:00
|
|
|
#define __p4d_raw(x) ((p4d_t) { __pgd_raw(x) })
|
|
|
|
|
static inline __be64 p4d_raw(p4d_t x)
|
|
|
|
|
{
|
|
|
|
|
return pgd_raw(x.pgd);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define p4d_write(p4d) pte_write(p4d_pte(p4d))
|
2015-12-01 09:06:28 +05:30
|
|
|
|
2020-06-04 16:46:44 -07:00
|
|
|
static inline void p4d_clear(p4d_t *p4dp)
|
2016-03-01 09:45:13 +05:30
|
|
|
{
|
2020-06-04 16:46:44 -07:00
|
|
|
*p4dp = __p4d(0);
|
2016-03-01 09:45:13 +05:30
|
|
|
}
|
|
|
|
|
|
2020-06-04 16:46:44 -07:00
|
|
|
static inline int p4d_none(p4d_t p4d)
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
{
|
2020-06-04 16:46:44 -07:00
|
|
|
return !p4d_raw(p4d);
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
}
|
|
|
|
|
|
2020-06-04 16:46:44 -07:00
|
|
|
static inline int p4d_present(p4d_t p4d)
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
{
|
2020-06-04 16:46:44 -07:00
|
|
|
return !!(p4d_raw(p4d) & cpu_to_be64(_PAGE_PRESENT));
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
}
|
2016-03-01 09:45:13 +05:30
|
|
|
|
2020-06-04 16:46:44 -07:00
|
|
|
static inline pte_t p4d_pte(p4d_t p4d)
|
2016-03-01 09:45:13 +05:30
|
|
|
{
|
2020-06-04 16:46:44 -07:00
|
|
|
return __pte_raw(p4d_raw(p4d));
|
2016-03-01 09:45:13 +05:30
|
|
|
}
|
|
|
|
|
|
2020-06-04 16:46:44 -07:00
|
|
|
static inline p4d_t pte_p4d(pte_t pte)
|
2016-03-01 09:45:13 +05:30
|
|
|
{
|
2020-06-04 16:46:44 -07:00
|
|
|
return __p4d_raw(pte_raw(pte));
|
2016-03-01 09:45:13 +05:30
|
|
|
}
|
|
|
|
|
|
2020-06-04 16:46:44 -07:00
|
|
|
static inline int p4d_bad(p4d_t p4d)
|
2016-04-29 23:25:54 +10:00
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
2020-06-04 16:46:44 -07:00
|
|
|
return radix__p4d_bad(p4d);
|
|
|
|
|
return hash__p4d_bad(p4d);
|
2016-04-29 23:25:54 +10:00
|
|
|
}
|
|
|
|
|
|
2020-06-04 16:46:44 -07:00
|
|
|
#define p4d_access_permitted p4d_access_permitted
|
|
|
|
|
static inline bool p4d_access_permitted(p4d_t p4d, bool write)
|
2017-12-04 07:49:11 +05:30
|
|
|
{
|
2020-06-04 16:46:44 -07:00
|
|
|
return pte_access_permitted(p4d_pte(p4d), write);
|
2017-12-04 07:49:11 +05:30
|
|
|
}
|
|
|
|
|
|
2020-06-04 16:46:44 -07:00
|
|
|
extern struct page *p4d_page(p4d_t p4d);
|
2016-03-01 09:45:13 +05:30
|
|
|
|
2016-04-29 23:25:50 +10:00
|
|
|
/* Pointers in the page table tree are physical addresses */
|
|
|
|
|
#define __pgtable_ptr_val(ptr) __pa(ptr)
|
|
|
|
|
|
2021-07-07 18:09:56 -07:00
|
|
|
static inline pud_t *p4d_pgtable(p4d_t p4d)
|
|
|
|
|
{
|
|
|
|
|
return (pud_t *)__va(p4d_val(p4d) & ~P4D_MASKED_BITS);
|
|
|
|
|
}
|
2016-04-29 23:25:50 +10:00
|
|
|
|
2021-07-07 18:09:53 -07:00
|
|
|
static inline pmd_t *pud_pgtable(pud_t pud)
|
|
|
|
|
{
|
|
|
|
|
return (pmd_t *)__va(pud_val(pud) & ~PUD_MASKED_BITS);
|
|
|
|
|
}
|
|
|
|
|
|
2015-12-01 09:06:28 +05:30
|
|
|
#define pmd_ERROR(e) \
|
|
|
|
|
pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
|
2016-03-01 09:45:13 +05:30
|
|
|
#define pud_ERROR(e) \
|
|
|
|
|
pr_err("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
|
2015-12-01 09:06:28 +05:30
|
|
|
#define pgd_ERROR(e) \
|
|
|
|
|
pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
|
|
|
|
|
|
2018-10-09 13:51:45 +00:00
|
|
|
static inline int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot)
|
2015-12-03 11:29:19 +01:00
|
|
|
{
|
2016-04-29 23:26:00 +10:00
|
|
|
if (radix_enabled()) {
|
|
|
|
|
#if defined(CONFIG_PPC_RADIX_MMU) && defined(DEBUG_VM)
|
|
|
|
|
unsigned long page_size = 1 << mmu_psize_defs[mmu_io_psize].shift;
|
|
|
|
|
WARN((page_size != PAGE_SIZE), "I/O page size != PAGE_SIZE");
|
|
|
|
|
#endif
|
2018-10-09 13:51:45 +00:00
|
|
|
return radix__map_kernel_page(ea, pa, prot, PAGE_SIZE);
|
2016-04-29 23:26:00 +10:00
|
|
|
}
|
2018-10-09 13:51:45 +00:00
|
|
|
return hash__map_kernel_page(ea, pa, prot);
|
2015-12-03 11:29:19 +01:00
|
|
|
}
|
2016-04-29 23:25:59 +10:00
|
|
|
|
2021-12-06 11:11:51 +00:00
|
|
|
void unmap_kernel_page(unsigned long va);
|
|
|
|
|
|
2016-04-29 23:25:59 +10:00
|
|
|
static inline int __meminit vmemmap_create_mapping(unsigned long start,
|
|
|
|
|
unsigned long page_size,
|
|
|
|
|
unsigned long phys)
|
2015-12-03 11:29:19 +01:00
|
|
|
{
|
2016-04-29 23:26:00 +10:00
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__vmemmap_create_mapping(start, page_size, phys);
|
2016-04-29 23:25:59 +10:00
|
|
|
return hash__vmemmap_create_mapping(start, page_size, phys);
|
2015-12-03 11:29:19 +01:00
|
|
|
}
|
2016-04-29 23:25:59 +10:00
|
|
|
|
|
|
|
|
#ifdef CONFIG_MEMORY_HOTPLUG
|
|
|
|
|
static inline void vmemmap_remove_mapping(unsigned long start,
|
|
|
|
|
unsigned long page_size)
|
2015-12-03 11:29:19 +01:00
|
|
|
{
|
2016-04-29 23:26:00 +10:00
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__vmemmap_remove_mapping(start, page_size);
|
2016-04-29 23:25:59 +10:00
|
|
|
return hash__vmemmap_remove_mapping(start, page_size);
|
2015-12-03 11:29:19 +01:00
|
|
|
}
|
2016-04-29 23:25:59 +10:00
|
|
|
#endif
|
2015-12-01 09:06:28 +05:30
|
|
|
|
|
|
|
|
static inline pte_t pmd_pte(pmd_t pmd)
|
|
|
|
|
{
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
return __pte_raw(pmd_raw(pmd));
|
2015-12-01 09:06:28 +05:30
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pmd_t pte_pmd(pte_t pte)
|
|
|
|
|
{
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
return __pmd_raw(pte_raw(pte));
|
2015-12-01 09:06:28 +05:30
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static inline pte_t *pmdp_ptep(pmd_t *pmd)
|
|
|
|
|
{
|
|
|
|
|
return (pte_t *)pmd;
|
|
|
|
|
}
|
|
|
|
|
#define pmd_pfn(pmd) pte_pfn(pmd_pte(pmd))
|
|
|
|
|
#define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
|
|
|
|
|
#define pmd_young(pmd) pte_young(pmd_pte(pmd))
|
|
|
|
|
#define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
|
|
|
|
|
#define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
|
|
|
|
|
#define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
|
2016-01-15 16:55:29 -08:00
|
|
|
#define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
|
2015-12-01 09:06:28 +05:30
|
|
|
#define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
|
2023-06-12 17:10:27 -07:00
|
|
|
#define pmd_mkwrite_novma(pmd) pte_pmd(pte_mkwrite_novma(pmd_pte(pmd)))
|
2015-12-03 11:29:19 +01:00
|
|
|
|
|
|
|
|
#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
|
|
|
|
|
#define pmd_soft_dirty(pmd) pte_soft_dirty(pmd_pte(pmd))
|
|
|
|
|
#define pmd_mksoft_dirty(pmd) pte_pmd(pte_mksoft_dirty(pmd_pte(pmd)))
|
|
|
|
|
#define pmd_clear_soft_dirty(pmd) pte_pmd(pte_clear_soft_dirty(pmd_pte(pmd)))
|
2018-09-20 23:39:47 +05:30
|
|
|
|
|
|
|
|
#ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
|
|
|
|
|
#define pmd_swp_mksoft_dirty(pmd) pte_pmd(pte_swp_mksoft_dirty(pmd_pte(pmd)))
|
|
|
|
|
#define pmd_swp_soft_dirty(pmd) pte_swp_soft_dirty(pmd_pte(pmd))
|
|
|
|
|
#define pmd_swp_clear_soft_dirty(pmd) pte_pmd(pte_swp_clear_soft_dirty(pmd_pte(pmd)))
|
|
|
|
|
#endif
|
2015-12-03 11:29:19 +01:00
|
|
|
#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
|
|
|
|
|
|
2015-12-01 09:06:37 +05:30
|
|
|
#ifdef CONFIG_NUMA_BALANCING
|
|
|
|
|
static inline int pmd_protnone(pmd_t pmd)
|
|
|
|
|
{
|
|
|
|
|
return pte_protnone(pmd_pte(pmd));
|
|
|
|
|
}
|
|
|
|
|
#endif /* CONFIG_NUMA_BALANCING */
|
2015-12-01 09:06:28 +05:30
|
|
|
|
|
|
|
|
#define pmd_write(pmd) pte_write(pmd_pte(pmd))
|
|
|
|
|
|
2017-12-04 07:49:11 +05:30
|
|
|
#define pmd_access_permitted pmd_access_permitted
|
|
|
|
|
static inline bool pmd_access_permitted(pmd_t pmd, bool write)
|
|
|
|
|
{
|
2019-06-07 13:56:35 +10:00
|
|
|
/*
|
|
|
|
|
* pmdp_invalidate sets this combination (which is not caught by
|
|
|
|
|
* !pte_present() check in pte_access_permitted), to prevent
|
|
|
|
|
* lock-free lookups, as part of the serialize_against_pte_lookup()
|
|
|
|
|
* synchronisation.
|
|
|
|
|
*
|
|
|
|
|
* This also catches the case where the PTE's hardware PRESENT bit is
|
|
|
|
|
* cleared while TLB is flushed, which is suboptimal but should not
|
|
|
|
|
* be frequent.
|
|
|
|
|
*/
|
|
|
|
|
if (pmd_is_serializing(pmd))
|
|
|
|
|
return false;
|
|
|
|
|
|
2017-12-04 07:49:11 +05:30
|
|
|
return pte_access_permitted(pmd_pte(pmd), write);
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-29 23:26:28 +10:00
|
|
|
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
|
|
|
|
|
extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
|
2023-07-25 00:37:55 +05:30
|
|
|
extern pud_t pfn_pud(unsigned long pfn, pgprot_t pgprot);
|
2016-04-29 23:26:28 +10:00
|
|
|
extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
|
2024-08-12 14:12:21 -04:00
|
|
|
extern pud_t pud_modify(pud_t pud, pgprot_t newprot);
|
2016-04-29 23:26:28 +10:00
|
|
|
extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
|
|
|
|
pmd_t *pmdp, pmd_t pmd);
|
2023-07-25 00:37:55 +05:30
|
|
|
extern void set_pud_at(struct mm_struct *mm, unsigned long addr,
|
|
|
|
|
pud_t *pudp, pud_t pud);
|
|
|
|
|
|
2020-05-04 22:29:07 +10:00
|
|
|
static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
|
|
|
|
|
unsigned long addr, pmd_t *pmd)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
2023-07-25 00:37:55 +05:30
|
|
|
static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
|
|
|
|
|
unsigned long addr, pud_t *pud)
|
|
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-29 23:26:29 +10:00
|
|
|
extern int hash__has_transparent_hugepage(void);
|
|
|
|
|
static inline int has_transparent_hugepage(void)
|
|
|
|
|
{
|
2016-04-29 23:26:30 +10:00
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__has_transparent_hugepage();
|
2016-04-29 23:26:29 +10:00
|
|
|
return hash__has_transparent_hugepage();
|
|
|
|
|
}
|
powerpc updates for 4.7
Highlights:
- Support for Power ISA 3.0 (Power9) Radix Tree MMU from Aneesh Kumar K.V
- Live patching support for ppc64le (also merged via livepatching.git)
Various cleanups & minor fixes from:
- Aaro Koskinen, Alexey Kardashevskiy, Andrew Donnellan, Aneesh Kumar K.V,
Chris Smart, Daniel Axtens, Frederic Barrat, Gavin Shan, Ian Munsie, Lennart
Sorensen, Madhavan Srinivasan, Mahesh Salgaonkar, Markus Elfring, Michael
Ellerman, Oliver O'Halloran, Paul Gortmaker, Paul Mackerras, Rashmica Gupta,
Russell Currey, Suraj Jitindar Singh, Thiago Jung Bauermann, Valentin
Rothberg, Vipin K Parashar.
General:
- Update LMB associativity index during DLPAR add/remove from Nathan Fontenot
- Fix branching to OOL handlers in relocatable kernel from Hari Bathini
- Add support for userspace Power9 copy/paste from Chris Smart
- Always use STRICT_MM_TYPECHECKS from Michael Ellerman
- Add mask of possible MMU features from Michael Ellerman
PCI:
- Enable pass through of NVLink to guests from Alexey Kardashevskiy
- Cleanups in preparation for powernv PCI hotplug from Gavin Shan
- Don't report error in eeh_pe_reset_and_recover() from Gavin Shan
- Restore initial state in eeh_pe_reset_and_recover() from Gavin Shan
- Revert "powerpc/eeh: Fix crash in eeh_add_device_early() on Cell" from Guilherme G. Piccoli
- Remove the dependency on EEH struct in DDW mechanism from Guilherme G. Piccoli
selftests:
- Test cp_abort during context switch from Chris Smart
- Add several tests for transactional memory support from Rashmica Gupta
perf:
- Add support for sampling interrupt register state from Anju T
- Add support for unwinding perf-stackdump from Chandan Kumar
cxl:
- Configure the PSL for two CAPI ports on POWER8NVL from Philippe Bergheaud
- Allow initialization on timebase sync failures from Frederic Barrat
- Increase timeout for detection of AFU mmio hang from Frederic Barrat
- Handle num_of_processes larger than can fit in the SPA from Ian Munsie
- Ensure PSL interrupt is configured for contexts with no AFU IRQs from Ian Munsie
- Add kernel API to allow a context to operate with relocate disabled from Ian Munsie
- Check periodically the coherent platform function's state from Christophe Lombard
Freescale:
- Updates from Scott: "Contains 86xx fixes, minor device tree fixes, an erratum
workaround, and a kconfig dependency fix."
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tyCKzWnX9Rwvd3meHu/o/SQ29TNLm/PbPyyRqpj5QPbJ8XCXkAXR7ZZZqjvcMsJW
/AgIr7Cgf53tl9oZzzl/c7CnNHhMq+NBdA71vhWtUx+T97wfJEGyKW6HhZyHDbEU
iAki7fu77ZpEqC/Fh9swf0dCGBJ+a132NoMVo0AdV7EQLznUYlQpQEqa+1PyHZOP
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YSljEt1bHyXmiJ+dBya40qARsWUkCVN7ZgEzdxckq0KI3w7g2tqpqIbO2lClWT6t
B3GpqQ4jp34+d1M14FB91fIGK7tMvOhSInE0Mv9+tPvRsepXqiiU/SwdAtRlr3m2
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19pX4WbBjKq8zK+YutrySncBIrbnI6VjW51vtRhgVKZliPFO/6zKagyU6FbxM+E5
udQES+t3F/9gvtxgxtDe
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Merge tag 'powerpc-4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
"Highlights:
- Support for Power ISA 3.0 (Power9) Radix Tree MMU from Aneesh Kumar K.V
- Live patching support for ppc64le (also merged via livepatching.git)
Various cleanups & minor fixes from:
- Aaro Koskinen, Alexey Kardashevskiy, Andrew Donnellan, Aneesh Kumar K.V,
Chris Smart, Daniel Axtens, Frederic Barrat, Gavin Shan, Ian Munsie,
Lennart Sorensen, Madhavan Srinivasan, Mahesh Salgaonkar, Markus Elfring,
Michael Ellerman, Oliver O'Halloran, Paul Gortmaker, Paul Mackerras,
Rashmica Gupta, Russell Currey, Suraj Jitindar Singh, Thiago Jung
Bauermann, Valentin Rothberg, Vipin K Parashar.
General:
- Update LMB associativity index during DLPAR add/remove from Nathan
Fontenot
- Fix branching to OOL handlers in relocatable kernel from Hari Bathini
- Add support for userspace Power9 copy/paste from Chris Smart
- Always use STRICT_MM_TYPECHECKS from Michael Ellerman
- Add mask of possible MMU features from Michael Ellerman
PCI:
- Enable pass through of NVLink to guests from Alexey Kardashevskiy
- Cleanups in preparation for powernv PCI hotplug from Gavin Shan
- Don't report error in eeh_pe_reset_and_recover() from Gavin Shan
- Restore initial state in eeh_pe_reset_and_recover() from Gavin Shan
- Revert "powerpc/eeh: Fix crash in eeh_add_device_early() on Cell"
from Guilherme G Piccoli
- Remove the dependency on EEH struct in DDW mechanism from Guilherme
G Piccoli
selftests:
- Test cp_abort during context switch from Chris Smart
- Add several tests for transactional memory support from Rashmica
Gupta
perf:
- Add support for sampling interrupt register state from Anju T
- Add support for unwinding perf-stackdump from Chandan Kumar
cxl:
- Configure the PSL for two CAPI ports on POWER8NVL from Philippe
Bergheaud
- Allow initialization on timebase sync failures from Frederic Barrat
- Increase timeout for detection of AFU mmio hang from Frederic
Barrat
- Handle num_of_processes larger than can fit in the SPA from Ian
Munsie
- Ensure PSL interrupt is configured for contexts with no AFU IRQs
from Ian Munsie
- Add kernel API to allow a context to operate with relocate disabled
from Ian Munsie
- Check periodically the coherent platform function's state from
Christophe Lombard
Freescale:
- Updates from Scott: "Contains 86xx fixes, minor device tree fixes,
an erratum workaround, and a kconfig dependency fix."
* tag 'powerpc-4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (192 commits)
powerpc/86xx: Fix PCI interrupt map definition
powerpc/86xx: Move pci1 definition to the include file
powerpc/fsl: Fix build of the dtb embedded kernel images
powerpc/fsl: Fix rcpm compatible string
powerpc/fsl: Remove FSL_SOC dependency from FSL_LBC
powerpc/fsl-pci: Add a workaround for PCI 5 errata
powerpc/fsl: Fix SPI compatible on t208xrdb and t1040rdb
powerpc/powernv/npu: Add PE to PHB's list
powerpc/powernv: Fix insufficient memory allocation
powerpc/iommu: Remove the dependency on EEH struct in DDW mechanism
Revert "powerpc/eeh: Fix crash in eeh_add_device_early() on Cell"
powerpc/eeh: Drop unnecessary label in eeh_pe_change_owner()
powerpc/eeh: Ignore handlers in eeh_pe_reset_and_recover()
powerpc/eeh: Restore initial state in eeh_pe_reset_and_recover()
powerpc/eeh: Don't report error in eeh_pe_reset_and_recover()
Revert "powerpc/powernv: Exclude root bus in pnv_pci_reset_secondary_bus()"
powerpc/powernv/npu: Enable NVLink pass through
powerpc/powernv/npu: Rework TCE Kill handling
powerpc/powernv/npu: Add set/unset window helpers
powerpc/powernv/ioda2: Export debug helper pe_level_printk()
...
2016-05-20 10:12:41 -07:00
|
|
|
#define has_transparent_hugepage has_transparent_hugepage
|
2016-04-29 23:26:28 +10:00
|
|
|
|
2023-07-25 00:37:55 +05:30
|
|
|
static inline int has_transparent_pud_hugepage(void)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__has_transparent_pud_hugepage();
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
#define has_transparent_pud_hugepage has_transparent_pud_hugepage
|
|
|
|
|
|
2016-04-29 23:26:29 +10:00
|
|
|
static inline unsigned long
|
|
|
|
|
pmd_hugepage_update(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp,
|
|
|
|
|
unsigned long clr, unsigned long set)
|
2015-12-01 09:06:28 +05:30
|
|
|
{
|
2016-04-29 23:26:30 +10:00
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pmd_hugepage_update(mm, addr, pmdp, clr, set);
|
2016-04-29 23:26:29 +10:00
|
|
|
return hash__pmd_hugepage_update(mm, addr, pmdp, clr, set);
|
|
|
|
|
}
|
|
|
|
|
|
2023-07-25 00:37:55 +05:30
|
|
|
static inline unsigned long
|
|
|
|
|
pud_hugepage_update(struct mm_struct *mm, unsigned long addr, pud_t *pudp,
|
|
|
|
|
unsigned long clr, unsigned long set)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pud_hugepage_update(mm, addr, pudp, clr, set);
|
|
|
|
|
BUG();
|
|
|
|
|
return pud_val(*pudp);
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-29 23:26:29 +10:00
|
|
|
/*
|
|
|
|
|
* For radix we should always find H_PAGE_HASHPTE zero. Hence
|
|
|
|
|
* the below will work for radix too
|
|
|
|
|
*/
|
|
|
|
|
static inline int __pmdp_test_and_clear_young(struct mm_struct *mm,
|
|
|
|
|
unsigned long addr, pmd_t *pmdp)
|
|
|
|
|
{
|
|
|
|
|
unsigned long old;
|
|
|
|
|
|
powerpc/mm: use _raw variant of page table accessors
This switch few of the page table accessor to use the __raw variant
and does the cpu to big endian conversion of constants. This helps in
generating better code.
For ex: a pgd_none(pgd) check with and without fix is listed below
Without fix:
------------
2240: 20 00 61 eb ld r27,32(r1)
/* PGD level */
typedef struct { __be64 pgd; } pgd_t;
static inline unsigned long pgd_val(pgd_t x)
{
return be64_to_cpu(x.pgd);
2244: 22 00 66 78 rldicl r6,r3,32,32
2248: 3e 40 7d 54 rotlwi r29,r3,8
224c: 0e c0 7d 50 rlwimi r29,r3,24,0,7
2250: 3e 40 c5 54 rotlwi r5,r6,8
2254: 2e c4 7d 50 rlwimi r29,r3,24,16,23
2258: 0e c0 c5 50 rlwimi r5,r6,24,0,7
225c: 2e c4 c5 50 rlwimi r5,r6,24,16,23
2260: c6 07 bd 7b rldicr r29,r29,32,31
2264: 78 2b bd 7f or r29,r29,r5
if (pgd_none(pgd))
2268: 00 00 bd 2f cmpdi cr7,r29,0
226c: 54 03 9e 41 beq cr7,25c0 <__get_user_pages_fast+0x500>
With fix:
---------
2370: 20 00 61 eb ld r27,32(r1)
if (pgd_none(pgd))
2374: 00 00 bd 2f cmpdi cr7,r29,0
2378: a8 03 9e 41 beq cr7,2720 <__get_user_pages_fast+0x530>
break;
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: Balbir Singh <bsingharora@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2016-07-13 15:05:22 +05:30
|
|
|
if ((pmd_raw(*pmdp) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
|
2016-04-29 23:26:29 +10:00
|
|
|
return 0;
|
|
|
|
|
old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED, 0);
|
|
|
|
|
return ((old & _PAGE_ACCESSED) != 0);
|
|
|
|
|
}
|
|
|
|
|
|
2023-07-25 00:37:55 +05:30
|
|
|
static inline int __pudp_test_and_clear_young(struct mm_struct *mm,
|
|
|
|
|
unsigned long addr, pud_t *pudp)
|
|
|
|
|
{
|
|
|
|
|
unsigned long old;
|
|
|
|
|
|
|
|
|
|
if ((pud_raw(*pudp) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
|
|
|
|
|
return 0;
|
|
|
|
|
old = pud_hugepage_update(mm, addr, pudp, _PAGE_ACCESSED, 0);
|
|
|
|
|
return ((old & _PAGE_ACCESSED) != 0);
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-29 23:26:29 +10:00
|
|
|
#define __HAVE_ARCH_PMDP_SET_WRPROTECT
|
|
|
|
|
static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr,
|
|
|
|
|
pmd_t *pmdp)
|
|
|
|
|
{
|
2022-11-08 18:46:51 +01:00
|
|
|
if (pmd_write(*pmdp))
|
2017-03-09 16:16:36 -08:00
|
|
|
pmd_hugepage_update(mm, addr, pmdp, _PAGE_WRITE, 0);
|
2015-12-01 09:06:28 +05:30
|
|
|
}
|
|
|
|
|
|
2023-07-25 00:37:55 +05:30
|
|
|
#define __HAVE_ARCH_PUDP_SET_WRPROTECT
|
|
|
|
|
static inline void pudp_set_wrprotect(struct mm_struct *mm, unsigned long addr,
|
|
|
|
|
pud_t *pudp)
|
|
|
|
|
{
|
|
|
|
|
if (pud_write(*pudp))
|
|
|
|
|
pud_hugepage_update(mm, addr, pudp, _PAGE_WRITE, 0);
|
|
|
|
|
}
|
|
|
|
|
|
2018-09-20 23:39:46 +05:30
|
|
|
/*
|
|
|
|
|
* Only returns true for a THP. False for pmd migration entry.
|
|
|
|
|
* We also need to return true when we come across a pte that
|
|
|
|
|
* in between a thp split. While splitting THP, we mark the pmd
|
|
|
|
|
* invalid (pmdp_invalidate()) before we set it with pte page
|
|
|
|
|
* address. A pmd_trans_huge() check against a pmd entry during that time
|
|
|
|
|
* should return true.
|
|
|
|
|
* We should not call this on a hugetlb entry. We should check for HugeTLB
|
|
|
|
|
* entry using vma->vm_flags
|
2022-06-27 09:00:26 +03:00
|
|
|
* The page table walk rule is explained in Documentation/mm/transhuge.rst
|
2018-09-20 23:39:46 +05:30
|
|
|
*/
|
2016-04-29 23:26:31 +10:00
|
|
|
static inline int pmd_trans_huge(pmd_t pmd)
|
|
|
|
|
{
|
2018-09-20 23:39:46 +05:30
|
|
|
if (!pmd_present(pmd))
|
|
|
|
|
return false;
|
|
|
|
|
|
2016-04-29 23:26:31 +10:00
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pmd_trans_huge(pmd);
|
|
|
|
|
return hash__pmd_trans_huge(pmd);
|
|
|
|
|
}
|
|
|
|
|
|
2023-07-25 00:37:55 +05:30
|
|
|
static inline int pud_trans_huge(pud_t pud)
|
|
|
|
|
{
|
|
|
|
|
if (!pud_present(pud))
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pud_trans_huge(pud);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2016-04-29 23:26:31 +10:00
|
|
|
#define __HAVE_ARCH_PMD_SAME
|
|
|
|
|
static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pmd_same(pmd_a, pmd_b);
|
|
|
|
|
return hash__pmd_same(pmd_a, pmd_b);
|
|
|
|
|
}
|
|
|
|
|
|
2023-07-25 00:37:55 +05:30
|
|
|
#define pud_same pud_same
|
|
|
|
|
static inline int pud_same(pud_t pud_a, pud_t pud_b)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pud_same(pud_a, pud_b);
|
|
|
|
|
return hash__pud_same(pud_a, pud_b);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2020-10-22 14:41:15 +05:30
|
|
|
static inline pmd_t __pmd_mkhuge(pmd_t pmd)
|
2015-12-01 09:06:28 +05:30
|
|
|
{
|
2016-04-29 23:26:31 +10:00
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pmd_mkhuge(pmd);
|
|
|
|
|
return hash__pmd_mkhuge(pmd);
|
2015-12-01 09:06:28 +05:30
|
|
|
}
|
|
|
|
|
|
2023-07-25 00:37:55 +05:30
|
|
|
static inline pud_t __pud_mkhuge(pud_t pud)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pud_mkhuge(pud);
|
|
|
|
|
BUG();
|
|
|
|
|
return pud;
|
|
|
|
|
}
|
|
|
|
|
|
2020-10-22 14:41:15 +05:30
|
|
|
/*
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|
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|
|
* pfn_pmd return a pmd_t that can be used as pmd pte entry.
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*/
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|
static inline pmd_t pmd_mkhuge(pmd_t pmd)
|
|
|
|
|
{
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|
|
#ifdef CONFIG_DEBUG_VM
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|
if (radix_enabled())
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WARN_ON((pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE)) == 0);
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|
else
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|
|
WARN_ON((pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE | H_PAGE_THP_HUGE)) !=
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|
|
cpu_to_be64(_PAGE_PTE | H_PAGE_THP_HUGE));
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#endif
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return pmd;
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|
}
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|
2023-07-25 00:37:55 +05:30
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static inline pud_t pud_mkhuge(pud_t pud)
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|
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|
{
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|
#ifdef CONFIG_DEBUG_VM
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|
|
if (radix_enabled())
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|
|
WARN_ON((pud_raw(pud) & cpu_to_be64(_PAGE_PTE)) == 0);
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|
else
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|
|
WARN_ON(1);
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|
#endif
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|
return pud;
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|
}
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|
2015-12-01 09:06:28 +05:30
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|
|
#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
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|
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|
extern int pmdp_set_access_flags(struct vm_area_struct *vma,
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|
|
|
unsigned long address, pmd_t *pmdp,
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|
|
|
pmd_t entry, int dirty);
|
2023-07-25 00:37:55 +05:30
|
|
|
#define __HAVE_ARCH_PUDP_SET_ACCESS_FLAGS
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|
|
|
extern int pudp_set_access_flags(struct vm_area_struct *vma,
|
|
|
|
|
unsigned long address, pud_t *pudp,
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|
|
|
|
pud_t entry, int dirty);
|
2015-12-01 09:06:28 +05:30
|
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|
|
|
#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
|
|
|
|
|
extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
|
|
|
|
|
unsigned long address, pmd_t *pmdp);
|
2023-07-25 00:37:55 +05:30
|
|
|
#define __HAVE_ARCH_PUDP_TEST_AND_CLEAR_YOUNG
|
|
|
|
|
extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
|
|
|
|
|
unsigned long address, pud_t *pudp);
|
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|
|
|
|
2015-12-01 09:06:28 +05:30
|
|
|
|
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|
|
|
#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
|
2016-04-29 23:26:29 +10:00
|
|
|
static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
|
|
|
|
|
unsigned long addr, pmd_t *pmdp)
|
|
|
|
|
{
|
2016-04-29 23:26:30 +10:00
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pmdp_huge_get_and_clear(mm, addr, pmdp);
|
2016-04-29 23:26:29 +10:00
|
|
|
return hash__pmdp_huge_get_and_clear(mm, addr, pmdp);
|
|
|
|
|
}
|
2015-12-01 09:06:28 +05:30
|
|
|
|
2023-07-25 00:37:55 +05:30
|
|
|
#define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
|
|
|
|
|
static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
|
|
|
|
|
unsigned long addr, pud_t *pudp)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pudp_huge_get_and_clear(mm, addr, pudp);
|
|
|
|
|
BUG();
|
|
|
|
|
return *pudp;
|
|
|
|
|
}
|
|
|
|
|
|
2016-04-29 23:26:29 +10:00
|
|
|
static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
|
|
|
|
|
unsigned long address, pmd_t *pmdp)
|
|
|
|
|
{
|
2016-04-29 23:26:30 +10:00
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pmdp_collapse_flush(vma, address, pmdp);
|
2016-04-29 23:26:29 +10:00
|
|
|
return hash__pmdp_collapse_flush(vma, address, pmdp);
|
|
|
|
|
}
|
2015-12-01 09:06:28 +05:30
|
|
|
#define pmdp_collapse_flush pmdp_collapse_flush
|
|
|
|
|
|
2020-05-05 12:47:29 +05:30
|
|
|
#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
|
|
|
|
|
pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
|
|
|
|
|
unsigned long addr,
|
|
|
|
|
pmd_t *pmdp, int full);
|
|
|
|
|
|
2023-07-25 00:37:55 +05:30
|
|
|
#define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
|
|
|
|
|
pud_t pudp_huge_get_and_clear_full(struct vm_area_struct *vma,
|
|
|
|
|
unsigned long addr,
|
|
|
|
|
pud_t *pudp, int full);
|
|
|
|
|
|
2015-12-01 09:06:28 +05:30
|
|
|
#define __HAVE_ARCH_PGTABLE_DEPOSIT
|
2016-04-29 23:26:29 +10:00
|
|
|
static inline void pgtable_trans_huge_deposit(struct mm_struct *mm,
|
|
|
|
|
pmd_t *pmdp, pgtable_t pgtable)
|
|
|
|
|
{
|
2016-04-29 23:26:30 +10:00
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pgtable_trans_huge_deposit(mm, pmdp, pgtable);
|
2016-04-29 23:26:29 +10:00
|
|
|
return hash__pgtable_trans_huge_deposit(mm, pmdp, pgtable);
|
|
|
|
|
}
|
|
|
|
|
|
2015-12-01 09:06:28 +05:30
|
|
|
#define __HAVE_ARCH_PGTABLE_WITHDRAW
|
2016-04-29 23:26:29 +10:00
|
|
|
static inline pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm,
|
|
|
|
|
pmd_t *pmdp)
|
|
|
|
|
{
|
2016-04-29 23:26:30 +10:00
|
|
|
if (radix_enabled())
|
|
|
|
|
return radix__pgtable_trans_huge_withdraw(mm, pmdp);
|
2016-04-29 23:26:29 +10:00
|
|
|
return hash__pgtable_trans_huge_withdraw(mm, pmdp);
|
|
|
|
|
}
|
2015-12-01 09:06:28 +05:30
|
|
|
|
|
|
|
|
#define __HAVE_ARCH_PMDP_INVALIDATE
|
2018-01-31 16:18:02 -08:00
|
|
|
extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
|
|
|
|
|
pmd_t *pmdp);
|
2024-08-12 14:12:21 -04:00
|
|
|
extern pud_t pudp_invalidate(struct vm_area_struct *vma, unsigned long address,
|
|
|
|
|
pud_t *pudp);
|
2015-12-01 09:06:28 +05:30
|
|
|
|
|
|
|
|
#define pmd_move_must_withdraw pmd_move_must_withdraw
|
|
|
|
|
struct spinlock;
|
2019-01-23 11:51:38 +05:30
|
|
|
extern int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
|
|
|
|
|
struct spinlock *old_pmd_ptl,
|
|
|
|
|
struct vm_area_struct *vma);
|
|
|
|
|
/*
|
|
|
|
|
* Hash translation mode use the deposited table to store hash pte
|
|
|
|
|
* slot information.
|
|
|
|
|
*/
|
2016-12-12 16:44:32 -08:00
|
|
|
#define arch_needs_pgtable_deposit arch_needs_pgtable_deposit
|
|
|
|
|
static inline bool arch_needs_pgtable_deposit(void)
|
|
|
|
|
{
|
|
|
|
|
if (radix_enabled())
|
|
|
|
|
return false;
|
|
|
|
|
return true;
|
|
|
|
|
}
|
2017-07-27 11:54:54 +05:30
|
|
|
extern void serialize_against_pte_lookup(struct mm_struct *mm);
|
2016-12-12 16:44:32 -08:00
|
|
|
|
2016-04-29 23:26:28 +10:00
|
|
|
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
|
2017-06-28 11:32:34 +10:00
|
|
|
|
2019-03-05 15:46:33 -08:00
|
|
|
#define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
|
|
|
|
|
pte_t ptep_modify_prot_start(struct vm_area_struct *, unsigned long, pte_t *);
|
|
|
|
|
void ptep_modify_prot_commit(struct vm_area_struct *, unsigned long,
|
|
|
|
|
pte_t *, pte_t, pte_t);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Returns true for a R -> RW upgrade of pte
|
|
|
|
|
*/
|
|
|
|
|
static inline bool is_pte_rw_upgrade(unsigned long old_val, unsigned long new_val)
|
|
|
|
|
{
|
|
|
|
|
if (!(old_val & _PAGE_READ))
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
if ((!(old_val & _PAGE_WRITE)) && (new_val & _PAGE_WRITE))
|
|
|
|
|
return true;
|
|
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
}
|
2017-07-14 16:51:23 +10:00
|
|
|
|
2015-12-01 09:06:28 +05:30
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
|
#endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */
|