2022-11-17 00:32:30 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2022, Linaro Ltd.
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*/
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/dts-v1/;
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2024-10-25 16:43:24 +01:00
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/plugin/;
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2022-11-17 00:32:30 +00:00
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2024-10-25 16:43:24 +01:00
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#include <dt-bindings/clock/qcom,camcc-sdm845.h>
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#include <dt-bindings/gpio/gpio.h>
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2022-11-17 00:32:30 +00:00
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&camss {
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vdda-phy-supply = <&vreg_l1a_0p875>;
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vdda-pll-supply = <&vreg_l26a_1p2>;
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status = "okay";
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ports {
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port@0 {
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csiphy0_ep: endpoint {
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data-lanes = <0 1 2 3>;
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remote-endpoint = <&ov8856_ep>;
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};
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};
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};
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};
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&cci {
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status = "okay";
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};
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&cci_i2c0 {
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2024-10-25 16:43:24 +01:00
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#address-cells = <1>;
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#size-cells = <0>;
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2022-11-17 00:32:30 +00:00
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camera@10 {
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compatible = "ovti,ov8856";
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reg = <0x10>;
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/* CAM0_RST_N */
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reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&cam0_default>;
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clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
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clock-names = "xvclk";
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clock-frequency = <19200000>;
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/*
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* The &vreg_s4a_1p8 trace is powered on as a,
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* so it is represented by a fixed regulator.
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*
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* The 2.8V vdda-supply and 1.2V vddd-supply regulators
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* both have to be enabled through the power management
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* gpios.
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*/
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dovdd-supply = <&vreg_lvs1a_1p8>;
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avdd-supply = <&cam0_avdd_2v8>;
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dvdd-supply = <&cam0_dvdd_1v2>;
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port {
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ov8856_ep: endpoint {
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link-frequencies = /bits/ 64
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<360000000 180000000>;
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data-lanes = <1 2 3 4>;
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remote-endpoint = <&csiphy0_ep>;
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};
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};
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};
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};
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