linux/arch/arm64/boot/dts/qcom/sc7180-idp.dts

768 lines
15 KiB
Text
Raw Permalink Normal View History

// SPDX-License-Identifier: BSD-3-Clause
/*
* SC7180 IDP board device tree source
*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include "sc7180.dtsi"
#include "sc7180-firmware-tfa.dtsi"
#include "pm6150.dtsi"
#include "pm6150l.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SC7180 IDP";
compatible = "qcom,sc7180-idp", "qcom,sc7180";
aliases {
bluetooth0 = &bluetooth;
hsuart0 = &uart3;
serial0 = &uart8;
wifi0 = &wifi;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
/*
* Reserved memory changes
*
* Delete all unused memory nodes and define the peripheral memory regions
* required by the board dts.
*
*/
/delete-node/ &hyp_mem;
/delete-node/ &xbl_mem;
/delete-node/ &aop_mem;
/delete-node/ &sec_apps_mem;
/delete-node/ &tz_mem;
/* Increase the size from 2MB to 8MB */
&rmtfs_mem {
reg = <0x0 0x94600000 0x0 0x800000>;
};
/ {
reserved-memory {
atf_mem: memory@80b00000 {
reg = <0x0 0x80b00000 0x0 0x100000>;
no-map;
};
mpss_mem: memory@86000000 {
reg = <0x0 0x86000000 0x0 0x8c00000>;
no-map;
};
camera_mem: memory@8ec00000 {
reg = <0x0 0x8ec00000 0x0 0x500000>;
no-map;
};
venus_mem: memory@8f600000 {
reg = <0 0x8f600000 0 0x500000>;
no-map;
};
wlan_mem: memory@94100000 {
reg = <0x0 0x94100000 0x0 0x200000>;
no-map;
};
mba_mem: memory@94400000 {
reg = <0x0 0x94400000 0x0 0x200000>;
no-map;
};
mdata_mem: mpss-metadata {
alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
size = <0x0 0x4000>;
no-map;
};
};
};
&apps_rsc {
regulators-0 {
compatible = "qcom,pm6150-rpmh-regulators";
qcom,pmic-id = "a";
vreg_s1a_1p1: smps1 {
regulator-min-microvolt = <1128000>;
regulator-max-microvolt = <1128000>;
};
vreg_s4a_1p0: smps4 {
regulator-min-microvolt = <824000>;
regulator-max-microvolt = <1120000>;
};
vreg_s5a_2p0: smps5 {
regulator-min-microvolt = <1744000>;
regulator-max-microvolt = <2040000>;
};
vreg_l1a_1p2: ldo1 {
regulator-min-microvolt = <1178000>;
regulator-max-microvolt = <1256000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l2a_1p0: ldo2 {
regulator-min-microvolt = <944000>;
regulator-max-microvolt = <1056000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l3a_1p0: ldo3 {
regulator-min-microvolt = <968000>;
regulator-max-microvolt = <1064000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l4a_0p8: ldo4 {
regulator-min-microvolt = <824000>;
regulator-max-microvolt = <928000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l5a_2p7: ldo5 {
regulator-min-microvolt = <2496000>;
regulator-max-microvolt = <3000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l6a_0p6: ldo6 {
regulator-min-microvolt = <568000>;
regulator-max-microvolt = <648000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l9a_0p6: ldo9 {
regulator-min-microvolt = <488000>;
regulator-max-microvolt = <800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l10a_1p8: ldo10 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1832000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l11a_1p8: ldo11 {
regulator-min-microvolt = <1696000>;
regulator-max-microvolt = <1904000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l12a_1p8: ldo12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l13a_1p8: ldo13 {
regulator-min-microvolt = <1696000>;
regulator-max-microvolt = <1904000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l14a_1p8: ldo14 {
regulator-min-microvolt = <1728000>;
regulator-max-microvolt = <1832000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l15a_1p8: ldo15 {
regulator-min-microvolt = <1696000>;
regulator-max-microvolt = <1904000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l16a_2p7: ldo16 {
regulator-min-microvolt = <2496000>;
regulator-max-microvolt = <3304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l17a_3p0: ldo17 {
regulator-min-microvolt = <2920000>;
regulator-max-microvolt = <3232000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l18a_2p8: ldo18 {
regulator-min-microvolt = <2496000>;
regulator-max-microvolt = <3304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l19a_2p9: ldo19 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
regulators-1 {
compatible = "qcom,pm6150l-rpmh-regulators";
qcom,pmic-id = "c";
vreg_s8c_1p3: smps8 {
regulator-min-microvolt = <1120000>;
regulator-max-microvolt = <1408000>;
};
vreg_l1c_1p8: ldo1 {
regulator-min-microvolt = <1616000>;
regulator-max-microvolt = <1984000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l2c_1p3: ldo2 {
regulator-min-microvolt = <1168000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l3c_1p2: ldo3 {
regulator-min-microvolt = <1144000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l4c_1p8: ldo4 {
regulator-min-microvolt = <1648000>;
regulator-max-microvolt = <3304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l5c_1p8: ldo5 {
regulator-min-microvolt = <1648000>;
regulator-max-microvolt = <3304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l6c_2p9: ldo6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7c_3p0: ldo7 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3312000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l8c_1p8: ldo8 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1904000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l9c_2p9: ldo9 {
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10c_3p3: ldo10 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3400000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_l11c_3p3: ldo11 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3400000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
};
vreg_bob: bob {
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
};
};
};
&mdss {
status = "okay";
};
&mdss_dsi0 {
status = "okay";
vdda-supply = <&vreg_l3c_1p2>;
panel@0 {
compatible = "visionox,rm69299-1080p-display";
reg = <0>;
vdda-supply = <&vreg_l8c_1p8>;
vdd3p3-supply = <&vreg_l18a_2p8>;
pinctrl-names = "default";
pinctrl-0 = <&disp_pins>;
reset-gpios = <&pm6150l_gpios 3 GPIO_ACTIVE_HIGH>;
port {
panel0_in: endpoint {
remote-endpoint = <&mdss_dsi0_out>;
};
};
};
ports {
port@1 {
endpoint {
remote-endpoint = <&panel0_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
&mdss_dsi0_phy {
status = "okay";
vdds-supply = <&vreg_l4a_0p8>;
};
&qfprom {
vcc-supply = <&vreg_l11a_1p8>;
};
&qspi {
status = "okay";
pinctrl-names = "default";
arm64: dts: qcom: sc7180: Fix trogdor qspi pin config In commit 7ec3e67307f8 ("arm64: dts: qcom: sc7180-trogdor: add initial trogdor and lazor dt") we specified the pull settings on the boot SPI (the qspi) data lines as pullups to "park" the lines. This seemed like the right thing to do, but I never really probed the lines to confirm. Since that time, I've done A LOT of research, experiements and poking of the lines with a voltmeter. A first batch of discoveries: - There is an external pullup on CS (clearly shown on schematics) - There are weak external pulldowns on CLK/MOSI (believed to be Cr50's internal pulldowns) - There is no pull on MISO. - When qspi isn't actively transferring it still drives CS, CLK, and MOSI. CS and MOSI are driven high and CLK is driven low. It does not drive MISO and (if no internal pulls are enabled) the line floats. The above means that it's good to have some sort of pull on MISO, at the very least. The pullup that we had before was actually fine (and my voltmeter confirms that it actually affected the state of the pin) but a pulldown would work equally well (and would match MOSI and CLK better). The above also means that we could save a tiny bit of power (not measurable by my setup) by setting up a sleep state for these pins. If nothing else this prevents us from driving high against Cr50's internal pulldown on MOSI. However, Qualcomm has also asserted in the past that it burns a little extra power to drive a pin, especially since these are configured with a slightly higher drive strength Let's fix all this. Since the external pulls are different for the two data lines, we'll split them into separate configs. Then we'll change the MISO pin to a pulldown and add a sleep state. On a slightly tangental (but not totally unrelated note), I also discovered some interesting things with these pins in suspend. First, I found that if we don't switch the pins to GPIO that the qspi peripheral continues to drive them in suspend. That'll be solved by what we're already doing above. Second, I found that something in the system suspend path (after Linux stops running) reconfigures these pins so that they don't have their normal pulls enabled but instead change to "keepers" (bias-bus-hold in DT speak). If a pin was floating before we entered suspend then it would stop floating. I found that I could manually pull a pin to a different level and then probe it and it would stay there. This is exactly keeper behavior. With the solution we have the switch to "keeper" doesn't matter too much but it's good to document. While talking about "keepers", it can also be noted that I found that the "keepers" on these pins were at least enough to win a fight against Cr50's internal pulls. That means it's best to make sure that the state of the pins are already correct before the mysterious transition to a keeper. Otherwise we'll burn (a small amount of) power in S3 via this fight. Luckily with the current solution we don't hit this case. NOTE: I've left "sc7180-idp" behavior totally alone in this patch. I didn't add a sleep state and I didn't change any pulls--I just adapted it to the fact that the data lines have separate configs. Qualcomm doesn't provide me with schematics for IDP and thus I don't actually know how the pulls are configured. Since this is just a development platform and worked well enough, it seems safer to leave it alone. Dependencies: - This patch has a hard dependency on ("pinctrl: qcom: Support OUTPUT_ENABLE; deprecate INPUT_ENABLE"). Something in the boot code seemed to have been confused and thought it needed to set the "OUTPUT ENABLE" bit for these pins even though it was using them as SPI. Thus if we don't honor the "output-disable" property we could end up driving the SPI pins while in sleep mode. - In general, it's probably best not to backport this to a kernel that doesn't have commit d21f4b7ffc22 ("pinctrl: qcom: Avoid glitching lines when we first mux to output"). That landed a while ago, but it's still good to be explicit in case someone was backporting. If we don't have that then there might be a glitch when we first switch over to GPIO before we disable the output. - This patch _doesn't_ really have any dependency on the qspi driver patch that supports setting the pinctrl sleep state--they can go in either order. If we define the sleep state and the driver never selects it that's fine. If the driver tries to select a sleep state that we don't define that's fine. Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230323102605.12.I6f03f86546e6ce9abb1d24fd9ece663c3a5b950c@changeid
2023-03-23 10:30:16 -07:00
pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0>, <&qspi_data1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
spi-tx-bus-width = <2>;
spi-rx-bus-width = <2>;
};
};
&qupv3_id_0 {
status = "okay";
};
&qupv3_id_1 {
status = "okay";
};
&remoteproc_mpss {
status = "okay";
compatible = "qcom,sc7180-mss-pil";
reg = <0 0x04080000 0 0x4040>, <0 0x04180000 0 0x48>;
reg-names = "qdsp6", "rmb";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
<&gcc GCC_MSS_NAV_AXI_CLK>,
<&gcc GCC_MSS_SNOC_AXI_CLK>,
<&gcc GCC_MSS_MFAB_AXIS_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "bus", "nav", "snoc_axi", "mnoc_axi", "xo";
iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>;
memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>;
resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
<&pdc_reset PDC_MODEM_SYNC_RESET>;
reset-names = "mss_restart", "pdc_reset";
qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>;
qcom,spare-regs = <&tcsr_regs_2 0xb3e4>;
};
&scm {
/* TF-A firmware maps memory cached so mark dma-coherent to match. */
dma-coherent;
};
&sdhc_1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sdc1_on>;
pinctrl-1 = <&sdc1_off>;
vmmc-supply = <&vreg_l19a_2p9>;
vqmmc-supply = <&vreg_l12a_1p8>;
};
&sdhc_2 {
status = "okay";
pinctrl-names = "default","sleep";
pinctrl-0 = <&sdc2_on>;
pinctrl-1 = <&sdc2_off>;
vmmc-supply = <&vreg_l9c_2p9>;
vqmmc-supply = <&vreg_l6c_2p9>;
cd-gpios = <&tlmm 69 GPIO_ACTIVE_LOW>;
};
&uart3 {
status = "okay";
/delete-property/interrupts;
interrupts-extended = <&intc GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>,
<&tlmm 41 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default", "sleep";
pinctrl-1 = <&qup_uart3_sleep>;
bluetooth: bluetooth {
compatible = "qcom,wcn3990-bt";
vddio-supply = <&vreg_l10a_1p8>;
vddxo-supply = <&vreg_l1c_1p8>;
vddrf-supply = <&vreg_l2c_1p3>;
vddch0-supply = <&vreg_l10c_3p3>;
max-speed = <3200000>;
};
};
&uart8 {
status = "okay";
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "host";
};
&usb_1_hsphy {
status = "okay";
vdd-supply = <&vreg_l4a_0p8>;
vdda-pll-supply = <&vreg_l11a_1p8>;
vdda-phy-dpdm-supply = <&vreg_l17a_3p0>;
qcom,imp-res-offset-value = <8>;
qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_15_PERCENT>;
qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
qcom,bias-ctrl-value = <0x22>;
qcom,charge-ctrl-value = <3>;
qcom,hsdisc-trim-value = <0>;
};
&usb_1_qmpphy {
status = "okay";
vdda-phy-supply = <&vreg_l3c_1p2>;
vdda-pll-supply = <&vreg_l4a_0p8>;
};
&venus {
video-firmware {
iommus = <&apps_smmu 0x0c42 0x0>;
};
};
&wifi {
status = "okay";
vdd-0.8-cx-mx-supply = <&vreg_l9a_0p6>;
vdd-1.8-xo-supply = <&vreg_l1c_1p8>;
vdd-1.3-rfa-supply = <&vreg_l2c_1p3>;
vdd-3.3-ch0-supply = <&vreg_l10c_3p3>;
vdd-3.3-ch1-supply = <&vreg_l11c_3p3>;
wifi-firmware {
iommus = <&apps_smmu 0xc2 0x1>;
};
};
/* PINCTRL - additions to nodes defined in sc7180.dtsi */
&pm6150l_gpios {
disp_pins: disp-state {
pinconf {
pins = "gpio3";
function = PMIC_GPIO_FUNC_FUNC1;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_MED>;
power-source = <0>;
bias-disable;
output-low;
};
};
};
&qspi_clk {
bias-disable;
};
&qspi_cs0 {
bias-disable;
};
arm64: dts: qcom: sc7180: Fix trogdor qspi pin config In commit 7ec3e67307f8 ("arm64: dts: qcom: sc7180-trogdor: add initial trogdor and lazor dt") we specified the pull settings on the boot SPI (the qspi) data lines as pullups to "park" the lines. This seemed like the right thing to do, but I never really probed the lines to confirm. Since that time, I've done A LOT of research, experiements and poking of the lines with a voltmeter. A first batch of discoveries: - There is an external pullup on CS (clearly shown on schematics) - There are weak external pulldowns on CLK/MOSI (believed to be Cr50's internal pulldowns) - There is no pull on MISO. - When qspi isn't actively transferring it still drives CS, CLK, and MOSI. CS and MOSI are driven high and CLK is driven low. It does not drive MISO and (if no internal pulls are enabled) the line floats. The above means that it's good to have some sort of pull on MISO, at the very least. The pullup that we had before was actually fine (and my voltmeter confirms that it actually affected the state of the pin) but a pulldown would work equally well (and would match MOSI and CLK better). The above also means that we could save a tiny bit of power (not measurable by my setup) by setting up a sleep state for these pins. If nothing else this prevents us from driving high against Cr50's internal pulldown on MOSI. However, Qualcomm has also asserted in the past that it burns a little extra power to drive a pin, especially since these are configured with a slightly higher drive strength Let's fix all this. Since the external pulls are different for the two data lines, we'll split them into separate configs. Then we'll change the MISO pin to a pulldown and add a sleep state. On a slightly tangental (but not totally unrelated note), I also discovered some interesting things with these pins in suspend. First, I found that if we don't switch the pins to GPIO that the qspi peripheral continues to drive them in suspend. That'll be solved by what we're already doing above. Second, I found that something in the system suspend path (after Linux stops running) reconfigures these pins so that they don't have their normal pulls enabled but instead change to "keepers" (bias-bus-hold in DT speak). If a pin was floating before we entered suspend then it would stop floating. I found that I could manually pull a pin to a different level and then probe it and it would stay there. This is exactly keeper behavior. With the solution we have the switch to "keeper" doesn't matter too much but it's good to document. While talking about "keepers", it can also be noted that I found that the "keepers" on these pins were at least enough to win a fight against Cr50's internal pulls. That means it's best to make sure that the state of the pins are already correct before the mysterious transition to a keeper. Otherwise we'll burn (a small amount of) power in S3 via this fight. Luckily with the current solution we don't hit this case. NOTE: I've left "sc7180-idp" behavior totally alone in this patch. I didn't add a sleep state and I didn't change any pulls--I just adapted it to the fact that the data lines have separate configs. Qualcomm doesn't provide me with schematics for IDP and thus I don't actually know how the pulls are configured. Since this is just a development platform and worked well enough, it seems safer to leave it alone. Dependencies: - This patch has a hard dependency on ("pinctrl: qcom: Support OUTPUT_ENABLE; deprecate INPUT_ENABLE"). Something in the boot code seemed to have been confused and thought it needed to set the "OUTPUT ENABLE" bit for these pins even though it was using them as SPI. Thus if we don't honor the "output-disable" property we could end up driving the SPI pins while in sleep mode. - In general, it's probably best not to backport this to a kernel that doesn't have commit d21f4b7ffc22 ("pinctrl: qcom: Avoid glitching lines when we first mux to output"). That landed a while ago, but it's still good to be explicit in case someone was backporting. If we don't have that then there might be a glitch when we first switch over to GPIO before we disable the output. - This patch _doesn't_ really have any dependency on the qspi driver patch that supports setting the pinctrl sleep state--they can go in either order. If we define the sleep state and the driver never selects it that's fine. If the driver tries to select a sleep state that we don't define that's fine. Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230323102605.12.I6f03f86546e6ce9abb1d24fd9ece663c3a5b950c@changeid
2023-03-23 10:30:16 -07:00
&qspi_data0 {
bias-pull-up;
};
&qspi_data1 {
bias-pull-up;
};
&qup_i2c2_default {
drive-strength = <2>;
/* Has external pullup */
bias-disable;
};
&qup_i2c4_default {
drive-strength = <2>;
/* Has external pullup */
bias-disable;
};
&qup_i2c7_default {
drive-strength = <2>;
/* Has external pullup */
bias-disable;
};
&qup_i2c9_default {
drive-strength = <2>;
/* Has external pullup */
bias-disable;
};
&qup_uart3_cts {
/*
* Configure a pull-down on CTS to match the pull of
* the Bluetooth module.
*/
bias-pull-down;
};
&qup_uart3_rts {
/* We'll drive RTS, so no pull */
drive-strength = <2>;
bias-disable;
};
&qup_uart3_tx {
/* We'll drive TX, so no pull */
drive-strength = <2>;
bias-disable;
};
&qup_uart3_rx {
/*
* Configure a pull-up on RX. This is needed to avoid
* garbage data when the TX pin of the Bluetooth module is
* in tri-state (module powered off or not driving the
* signal yet).
*/
bias-pull-up;
};
&qup_uart8_tx {
drive-strength = <2>;
bias-disable;
};
&qup_uart8_rx {
drive-strength = <2>;
bias-pull-up;
};
&qup_spi0_spi {
drive-strength = <2>;
bias-disable;
};
&qup_spi0_cs {
drive-strength = <2>;
bias-disable;
};
&qup_spi6_spi {
drive-strength = <2>;
bias-disable;
};
&qup_spi6_cs {
drive-strength = <2>;
bias-disable;
};
&qup_spi10_spi {
drive-strength = <2>;
bias-disable;
};
&qup_spi10_cs {
drive-strength = <2>;
bias-disable;
};
&tlmm {
qup_uart3_sleep: qup-uart3-sleep-state {
cts-pins {
/*
* Configure a pull-down on CTS to match the pull of
* the Bluetooth module.
*/
pins = "gpio38";
function = "gpio";
bias-pull-down;
};
rts-pins {
/*
* Configure pull-down on RTS. As RTS is active low
* signal, pull it low to indicate the BT SoC that it
* can wakeup the system anytime from suspend state by
* pulling RX low (by sending wakeup bytes).
*/
pins = "gpio39";
function = "gpio";
bias-pull-down;
};
tx-pins {
/*
* Configure pull-up on TX when it isn't actively driven
* to prevent BT SoC from receiving garbage during sleep.
*/
pins = "gpio40";
function = "gpio";
bias-pull-up;
};
rx-pins {
/*
* Configure a pull-up on RX. This is needed to avoid
* garbage data when the TX pin of the Bluetooth module
* is floating which may cause spurious wakeups.
*/
pins = "gpio41";
function = "gpio";
bias-pull-up;
};
};
sdc1_on: sdc1-on-state {
clk-pins {
pins = "sdc1_clk";
bias-disable;
drive-strength = <16>;
};
cmd-pins {
pins = "sdc1_cmd";
bias-pull-up;
drive-strength = <10>;
};
data-pins {
pins = "sdc1_data";
bias-pull-up;
drive-strength = <10>;
};
rclk-pins {
pins = "sdc1_rclk";
bias-pull-down;
};
};
sdc1_off: sdc1-off-state {
clk-pins {
pins = "sdc1_clk";
bias-disable;
drive-strength = <2>;
};
cmd-pins {
pins = "sdc1_cmd";
bias-pull-up;
drive-strength = <2>;
};
data-pins {
pins = "sdc1_data";
bias-pull-up;
drive-strength = <2>;
};
rclk-pins {
pins = "sdc1_rclk";
bias-pull-down;
};
};
sdc2_on: sdc2-on-state {
clk-pins {
pins = "sdc2_clk";
bias-disable;
drive-strength = <16>;
};
cmd-pins {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <10>;
};
data-pins {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <10>;
};
sd-cd-pins {
pins = "gpio69";
function = "gpio";
bias-pull-up;
drive-strength = <2>;
};
};
sdc2_off: sdc2-off-state {
clk-pins {
pins = "sdc2_clk";
bias-disable;
drive-strength = <2>;
};
cmd-pins {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <2>;
};
data-pins {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <2>;
};
sd-cd-pins {
pins = "gpio69";
function = "gpio";
bias-pull-up;
drive-strength = <2>;
};
};
};