linux/arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts

// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
 * IPQ5018 MP03.1-C2 board device tree source
 *
 * Copyright (c) 2023 The Linux Foundation. All rights reserved.
 */

/dts-v1/;

#include "ipq5018.dtsi"

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Qualcomm Technologies, Inc. IPQ5018/AP-RDP432.1-C2";
	compatible = "qcom,ipq5018-rdp432-c2", "qcom,ipq5018";

	aliases {
		serial0 = &blsp1_uart1;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&blsp1_uart1 {
	pinctrl-0 = <&uart1_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&pcie0 {
	pinctrl-0 = <&pcie0_default>;
	pinctrl-names = "default";

	perst-gpios = <&tlmm 15 GPIO_ACTIVE_LOW>;
	wake-gpios = <&tlmm 16 GPIO_ACTIVE_LOW>;

	status = "okay";
};

&pcie0_phy {
	status = "okay";
};

&sdhc_1 {
	pinctrl-0 = <&sdc_default_state>;
	pinctrl-names = "default";
	mmc-ddr-1_8v;
	mmc-hs200-1_8v;
	max-frequency = <192000000>;
	bus-width = <4>;
	status = "okay";
};

&sleep_clk {
	clock-frequency = <32000>;
};

&tlmm {
	pcie0_default: pcie0-default-state {
		clkreq-n-pins {
			pins = "gpio14";
			function = "pcie0_clk";
			drive-strength = <8>;
			bias-pull-up;
		};

		perst-n-pins {
			pins = "gpio15";
			function = "gpio";
			drive-strength = <8>;
			bias-pull-up;
			output-low;
		};

		wake-n-pins {
			pins = "gpio16";
			function = "pcie0_wake";
			drive-strength = <8>;
			bias-pull-up;
		};
	};

	sdc_default_state: sdc-default-state {
		clk-pins {
			pins = "gpio9";
			function = "sdc1_clk";
			drive-strength = <8>;
			bias-disable;
		};

		cmd-pins {
			pins = "gpio8";
			function = "sdc1_cmd";
			drive-strength = <8>;
			bias-pull-up;
		};

		data-pins {
			pins = "gpio4", "gpio5", "gpio6", "gpio7";
			function = "sdc1_data";
			drive-strength = <8>;
			bias-disable;
		};
	};
};

&usb {
	status = "okay";
};

&usb_dwc {
	dr_mode = "host";
};

&usbphy0 {
	status = "okay";
};

&xo_board_clk {
	clock-frequency = <24000000>;
};