linux/arch/arm64/boot/dts/exynos/exynos2200-g0s.dts

// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/*
 * Samsung Galaxy S22+ (g0s/SM-S906B) device tree source
 *
 * Copyright (c) 2025, Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
 */

/dts-v1/;
#include "exynos2200.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	model = "Samsung Galaxy S22+ (SM-S906B)";
	compatible = "samsung,g0s", "samsung,exynos2200";
	chassis-type = "handset";

	chosen {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		framebuffer: framebuffer {
			compatible = "simple-framebuffer";
			memory-region = <&cont_splash_mem>;
			width = <1080>;
			height = <2340>;
			stride = <(1080 * 4)>;
			format = "a8r8g8b8";
		};
	};

	/*
	 * RTC clock (XrtcXTI); external, must be 32.768 kHz.
	 *
	 * TODO: Remove this once RTC clock is implemented properly as part of
	 *       PMIC driver.
	 */
	rtcclk: clock-rtcclk {
		compatible = "fixed-clock";
		clock-output-names = "rtcclk";
		#clock-cells = <0>;
		clock-frequency = <32768>;
	};

	gpio-keys {
		compatible = "gpio-keys";

		pinctrl-0 = <&key_volup>;
		pinctrl-names = "default";

		volup-key {
			label = "Volume Up";
			linux,code = <KEY_VOLUMEUP>;
			gpios = <&gpa3 0 GPIO_ACTIVE_LOW>;
			wakeup-source;
		};
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x80000000>,
		      <0x8 0x80000000 0x1 0x7e000000>;
	};

	/* TODO: Remove this once PMIC is implemented  */
	reg_dummy: regulator-0 {
		compatible = "regulator-fixed";
		regulator-name = "dummy_reg";
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		cont_splash_mem: framebuffer@f6200000 {
			reg = <0x0 0xf6200000 0x0 (1080 * 2340 * 4)>;
			no-map;
		};

		debug_kinfo_reserved: debug-kinfo-reserved@fcfff000 {
			reg = <0x0 0xfcfff000 0x0 0x1000>;
			no-map;
		};

		log_itmon: log-itmon@fffe0000 {
			reg = <0x0 0xfffe0000 0x0 0x20000>;
			no-map;
		};
	};
};

&cmu_hsi0 {
	clocks = <&xtcxo>,
		 <&rtcclk>,
		 <&cmu_top CLK_DOUT_CMU_HSI0_NOC>,
		 <&cmu_top CLK_DOUT_CMU_HSI0_DPGTC>,
		 <&cmu_top CLK_DOUT_CMU_HSI0_DPOSC>,
		 <&cmu_top CLK_DOUT_CMU_HSI0_USB32DRD>;
	clock-names = "oscclk", "rtcclk", "noc", "dpgtc", "dposc", "usb";
};

/*
 * cpu2 and cpu3 fail to come up consistently, which leads to a hang later
 * in the boot process. Disable them until the issue is figured out.
 */
&cpu2 {
	status = "fail";
};

&cpu3 {
	status = "fail";
};

&ext_26m {
	clock-frequency = <26000000>;
};

&ext_200m {
	clock-frequency = <200000000>;
};

&mct_peris {
	status = "okay";
};

&pinctrl_alive {
	key_volup: key-volup-pins {
		samsung,pins = "gpa3-0";
		samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
		samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
		samsung,pin-drv = <EXYNOS7_PIN_DRV_LV4>;
	};
};

&ppi_cluster0 {
	affinity = <&cpu0 &cpu1>;
};

&usb {
	/* TODO: Replace these once PMIC is implemented  */
	vdd10-supply = <&reg_dummy>;
	vdd33-supply = <&reg_dummy>;
	status = "okay";
};

&usb32drd {
	status = "okay";
};

&usb_dwc3 {
	dr_mode = "otg";
	usb-role-switch;
	role-switch-default-mode = "peripheral";
	maximum-speed = "high-speed";
};

&usb_hsphy {
	/* TODO: Replace these once PMIC is implemented  */
	vdda12-supply = <&reg_dummy>;
	vdd-supply = <&reg_dummy>;
	status = "okay";
};

&xtcxo {
	clock-frequency = <76800000>;
};