2025-03-24 15:50:44 +01:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the RZN1D-EB Board
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*
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* Copyright (C) 2023 Schneider-Electric
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*
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*/
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#include <dt-bindings/leds/common.h>
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#include "r9a06g032-rzn1d400-db.dts"
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/ {
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model = "RZN1D-EB Board";
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compatible = "renesas,rzn1d400-eb", "renesas,rzn1d400-db",
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"renesas,r9a06g032";
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};
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2025-04-14 12:01:13 +02:00
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&gmac1 {
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pinctrl-0 = <&pins_eth0>, <&pins_mdio0>;
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pinctrl-names = "default";
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <&phy_mii0>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy_mii0: ethernet-phy@8 {
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reg = <8>;
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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default-state = "keep";
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};
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led@1 {
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reg = <1>;
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color = <LED_COLOR_ID_ORANGE>;
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function = LED_FUNCTION_ACTIVITY;
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default-state = "keep";
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};
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};
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};
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};
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};
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2025-03-28 16:31:36 +01:00
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&i2c2 {
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/* Sensors are different across revisions. All are LM75B compatible */
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sensor@49 {
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compatible = "national,lm75b";
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reg = <0x49>;
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};
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};
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2025-04-14 12:01:13 +02:00
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&mii_conv1 {
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renesas,miic-input = <MIIC_GMAC1_PORT>;
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status = "okay";
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};
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2025-03-24 15:50:44 +01:00
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&mii_conv2 {
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renesas,miic-input = <MIIC_SWITCH_PORTD>;
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status = "okay";
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};
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&mii_conv3 {
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renesas,miic-input = <MIIC_SWITCH_PORTC>;
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status = "okay";
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};
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2025-05-08 09:43:14 +02:00
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&pci_usb {
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status = "okay";
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};
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2025-03-24 15:50:44 +01:00
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&pinctrl {
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2025-04-14 12:01:13 +02:00
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pins_eth0: pins-eth0 {
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pinmux = <RZN1_PINMUX(0, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(1, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(2, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(3, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(4, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(5, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(6, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(7, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(8, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(9, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(10, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(11, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
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drive-strength = <6>;
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bias-disable;
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};
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2025-03-24 15:50:44 +01:00
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pins_eth1: pins-eth1 {
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pinmux = <RZN1_PINMUX(12, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(13, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(14, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(15, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(16, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(17, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(18, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(19, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(20, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(21, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(22, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(23, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
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drive-strength = <6>;
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bias-disable;
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};
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pins_eth2: pins-eth2 {
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pinmux = <RZN1_PINMUX(24, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(25, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(26, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(27, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(28, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(29, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(30, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(31, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(32, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(33, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(34, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
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<RZN1_PINMUX(35, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
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drive-strength = <6>;
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bias-disable;
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};
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2025-04-10 09:14:09 +02:00
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2025-04-14 12:01:13 +02:00
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pins_mdio0: pins-mdio0 {
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pinmux = <RZN1_PINMUX(150, RZN1_FUNC_MDIO0_GMAC0)>,
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<RZN1_PINMUX(151, RZN1_FUNC_MDIO0_GMAC0)>;
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};
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2025-04-10 09:14:09 +02:00
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pins_sdio1: pins-sdio1 {
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pinmux = <RZN1_PINMUX(95, RZN1_FUNC_SDIO)>,
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<RZN1_PINMUX(97, RZN1_FUNC_SDIO)>,
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<RZN1_PINMUX(98, RZN1_FUNC_SDIO)>,
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<RZN1_PINMUX(99, RZN1_FUNC_SDIO)>,
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<RZN1_PINMUX(100, RZN1_FUNC_SDIO)>,
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<RZN1_PINMUX(101, RZN1_FUNC_SDIO_E)>,
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<RZN1_PINMUX(102, RZN1_FUNC_SDIO_E)>;
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};
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pins_sdio1_clk: pins-sdio1-clk {
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pinmux = <RZN1_PINMUX(96, RZN1_FUNC_SDIO)>;
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drive-strength = <12>;
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};
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2025-04-24 12:27:30 +02:00
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pins_uart2: pins-uart2 {
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pinmux = <RZN1_PINMUX(105, RZN1_FUNC_UART2)>,
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<RZN1_PINMUX(106, RZN1_FUNC_UART2)>,
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<RZN1_PINMUX(107, RZN1_FUNC_UART2)>,
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<RZN1_PINMUX(108, RZN1_FUNC_UART2)>;
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bias-disable;
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};
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2025-04-10 09:14:09 +02:00
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};
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&sdio1 {
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pinctrl-0 = <&pins_sdio1>, <&pins_sdio1_clk>;
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pinctrl-names = "default";
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status = "okay";
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2025-03-24 15:50:44 +01:00
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};
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&switch {
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pinctrl-0 = <&pins_eth1>, <&pins_eth2>, <&pins_eth3>, <&pins_eth4>,
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<&pins_mdio1>;
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mdio {
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/* CN15 and CN16 switches must be configured in MDIO2 mode */
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switch0phy1: ethernet-phy@1 {
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reg = <1>;
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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default-state = "keep";
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};
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led@1 {
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reg = <1>;
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color = <LED_COLOR_ID_ORANGE>;
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function = LED_FUNCTION_ACTIVITY;
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default-state = "keep";
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};
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};
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};
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switch0phy10: ethernet-phy@10 {
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reg = <10>;
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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default-state = "keep";
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};
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led@1 {
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reg = <1>;
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color = <LED_COLOR_ID_ORANGE>;
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function = LED_FUNCTION_ACTIVITY;
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default-state = "keep";
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};
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};
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};
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};
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};
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&switch_port2 {
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label = "lan2";
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phy-mode = "rgmii-id";
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phy-handle = <&switch0phy10>;
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status = "okay";
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};
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&switch_port3 {
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label = "lan3";
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phy-mode = "rgmii-id";
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phy-handle = <&switch0phy1>;
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status = "okay";
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};
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2025-04-24 12:27:30 +02:00
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&uart2 {
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pinctrl-0 = <&pins_uart2>;
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pinctrl-names = "default";
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status = "okay";
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uart-has-rtscts;
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};
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