linux/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts

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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the RZN1D-EB Board
*
* Copyright (C) 2023 Schneider-Electric
*
*/
#include <dt-bindings/leds/common.h>
#include "r9a06g032-rzn1d400-db.dts"
/ {
model = "RZN1D-EB Board";
compatible = "renesas,rzn1d400-eb", "renesas,rzn1d400-db",
"renesas,r9a06g032";
};
&gmac1 {
pinctrl-0 = <&pins_eth0>, <&pins_mdio0>;
pinctrl-names = "default";
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&phy_mii0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy_mii0: ethernet-phy@8 {
reg = <8>;
leds {
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
default-state = "keep";
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_ORANGE>;
function = LED_FUNCTION_ACTIVITY;
default-state = "keep";
};
};
};
};
};
&i2c2 {
/* Sensors are different across revisions. All are LM75B compatible */
sensor@49 {
compatible = "national,lm75b";
reg = <0x49>;
};
};
&mii_conv1 {
renesas,miic-input = <MIIC_GMAC1_PORT>;
status = "okay";
};
&mii_conv2 {
renesas,miic-input = <MIIC_SWITCH_PORTD>;
status = "okay";
};
&mii_conv3 {
renesas,miic-input = <MIIC_SWITCH_PORTC>;
status = "okay";
};
&pci_usb {
status = "okay";
};
&pinctrl {
pins_eth0: pins-eth0 {
pinmux = <RZN1_PINMUX(0, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(1, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(2, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(3, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(4, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(5, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(6, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(7, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(8, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(9, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(10, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(11, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
drive-strength = <6>;
bias-disable;
};
pins_eth1: pins-eth1 {
pinmux = <RZN1_PINMUX(12, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(13, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(14, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(15, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(16, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(17, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(18, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(19, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(20, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(21, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(22, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(23, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
drive-strength = <6>;
bias-disable;
};
pins_eth2: pins-eth2 {
pinmux = <RZN1_PINMUX(24, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(25, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(26, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(27, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(28, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(29, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(30, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(31, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(32, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(33, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(34, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(35, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
drive-strength = <6>;
bias-disable;
};
pins_mdio0: pins-mdio0 {
pinmux = <RZN1_PINMUX(150, RZN1_FUNC_MDIO0_GMAC0)>,
<RZN1_PINMUX(151, RZN1_FUNC_MDIO0_GMAC0)>;
};
pins_sdio1: pins-sdio1 {
pinmux = <RZN1_PINMUX(95, RZN1_FUNC_SDIO)>,
<RZN1_PINMUX(97, RZN1_FUNC_SDIO)>,
<RZN1_PINMUX(98, RZN1_FUNC_SDIO)>,
<RZN1_PINMUX(99, RZN1_FUNC_SDIO)>,
<RZN1_PINMUX(100, RZN1_FUNC_SDIO)>,
<RZN1_PINMUX(101, RZN1_FUNC_SDIO_E)>,
<RZN1_PINMUX(102, RZN1_FUNC_SDIO_E)>;
};
pins_sdio1_clk: pins-sdio1-clk {
pinmux = <RZN1_PINMUX(96, RZN1_FUNC_SDIO)>;
drive-strength = <12>;
};
pins_uart2: pins-uart2 {
pinmux = <RZN1_PINMUX(105, RZN1_FUNC_UART2)>,
<RZN1_PINMUX(106, RZN1_FUNC_UART2)>,
<RZN1_PINMUX(107, RZN1_FUNC_UART2)>,
<RZN1_PINMUX(108, RZN1_FUNC_UART2)>;
bias-disable;
};
};
&sdio1 {
pinctrl-0 = <&pins_sdio1>, <&pins_sdio1_clk>;
pinctrl-names = "default";
status = "okay";
};
&switch {
pinctrl-0 = <&pins_eth1>, <&pins_eth2>, <&pins_eth3>, <&pins_eth4>,
<&pins_mdio1>;
mdio {
/* CN15 and CN16 switches must be configured in MDIO2 mode */
switch0phy1: ethernet-phy@1 {
reg = <1>;
leds {
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
default-state = "keep";
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_ORANGE>;
function = LED_FUNCTION_ACTIVITY;
default-state = "keep";
};
};
};
switch0phy10: ethernet-phy@10 {
reg = <10>;
leds {
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
default-state = "keep";
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_ORANGE>;
function = LED_FUNCTION_ACTIVITY;
default-state = "keep";
};
};
};
};
};
&switch_port2 {
label = "lan2";
phy-mode = "rgmii-id";
phy-handle = <&switch0phy10>;
status = "okay";
};
&switch_port3 {
label = "lan3";
phy-mode = "rgmii-id";
phy-handle = <&switch0phy1>;
status = "okay";
};
&uart2 {
pinctrl-0 = <&pins_uart2>;
pinctrl-names = "default";
status = "okay";
uart-has-rtscts;
};