2020-06-29 05:54:51 +03:00
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// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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2021-08-03 00:19:45 +03:00
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#include <dt-bindings/input/atmel-maxtouch.h>
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2020-06-29 05:54:51 +03:00
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#include <dt-bindings/input/gpio-keys.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/thermal/thermal.h>
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#include "tegra20.dtsi"
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#include "tegra20-cpu-opp.dtsi"
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#include "tegra20-cpu-opp-microvolt.dtsi"
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/ {
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model = "Acer Iconia Tab A500";
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compatible = "acer,picasso", "nvidia,tegra20";
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aliases {
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2020-09-06 22:00:07 +03:00
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mmc0 = &sdmmc4; /* eMMC */
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mmc1 = &sdmmc3; /* MicroSD */
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mmc2 = &sdmmc1; /* WiFi */
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2020-06-29 05:54:51 +03:00
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rtc0 = &pmic;
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rtc1 = "/rtc@7000e000";
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serial0 = &uartd; /* Docking station */
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serial1 = &uartc; /* Bluetooth */
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serial2 = &uartb; /* GPS */
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};
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/*
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* The decompressor and also some bootloaders rely on a
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* pre-existing /chosen node to be available to insert the
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* command line and merge other ATAGS info.
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*/
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chosen {};
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memory@0 {
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reg = <0x00000000 0x40000000>;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ramoops@2ffe0000 {
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compatible = "ramoops";
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reg = <0x2ffe0000 0x10000>; /* 64kB */
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console-size = <0x8000>; /* 32kB */
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record-size = <0x400>; /* 1kB */
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ecc-size = <16>;
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};
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linux,cma@30000000 {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x30000000 0x10000000>;
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size = <0x10000000>; /* 256MiB */
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linux,cma-default;
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reusable;
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};
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};
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host1x@50000000 {
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dc@54200000 {
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rgb {
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status = "okay";
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2023-08-07 17:35:11 +03:00
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port {
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2020-06-29 05:54:51 +03:00
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lcd_output: endpoint {
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remote-endpoint = <&lvds_encoder_input>;
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bus-width = <18>;
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};
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};
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};
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};
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hdmi@54280000 {
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status = "okay";
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vdd-supply = <&hdmi_vdd_reg>;
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pll-supply = <&hdmi_pll_reg>;
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hdmi-supply = <&vdd_5v0_sys>;
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nvidia,ddc-i2c-bus = <&hdmi_ddc>;
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nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
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GPIO_ACTIVE_HIGH>;
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};
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};
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pinmux@70000014 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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ata {
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nvidia,pins = "ata";
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nvidia,function = "ide";
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};
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atb {
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nvidia,pins = "atb", "gma", "gme";
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nvidia,function = "sdio4";
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};
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atc {
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nvidia,pins = "atc";
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nvidia,function = "nand";
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};
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atd {
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nvidia,pins = "atd", "ate", "gmb", "spia",
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"spib", "spic";
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nvidia,function = "gmi";
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};
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cdev1 {
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nvidia,pins = "cdev1";
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nvidia,function = "plla_out";
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};
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cdev2 {
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nvidia,pins = "cdev2";
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nvidia,function = "pllp_out4";
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};
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crtp {
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nvidia,pins = "crtp", "lm1";
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nvidia,function = "crt";
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};
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csus {
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nvidia,pins = "csus";
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nvidia,function = "vi_sensor_clk";
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};
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dap1 {
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nvidia,pins = "dap1";
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nvidia,function = "dap1";
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};
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dap2 {
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nvidia,pins = "dap2";
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nvidia,function = "dap2";
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};
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dap3 {
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nvidia,pins = "dap3";
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nvidia,function = "dap3";
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};
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dap4 {
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nvidia,pins = "dap4";
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nvidia,function = "dap4";
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};
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dta {
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nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
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nvidia,function = "vi";
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};
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dtf {
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nvidia,pins = "dtf";
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nvidia,function = "i2c3";
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};
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gmc {
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nvidia,pins = "gmc";
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nvidia,function = "uartd";
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};
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gmd {
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nvidia,pins = "gmd";
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nvidia,function = "sflash";
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};
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gpu {
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nvidia,pins = "gpu";
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nvidia,function = "pwm";
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};
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gpu7 {
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nvidia,pins = "gpu7";
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nvidia,function = "rtck";
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};
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gpv {
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nvidia,pins = "gpv", "slxa";
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nvidia,function = "pcie";
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};
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hdint {
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nvidia,pins = "hdint";
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nvidia,function = "hdmi";
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};
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i2cp {
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nvidia,pins = "i2cp";
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nvidia,function = "i2cp";
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};
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irrx {
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nvidia,pins = "irrx", "irtx";
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nvidia,function = "uartb";
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};
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kbca {
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nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
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"kbce", "kbcf";
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nvidia,function = "kbc";
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};
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lcsn {
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nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
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"lsdi", "lvp0";
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nvidia,function = "rsvd4";
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};
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ld0 {
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nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
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"ld5", "ld6", "ld7", "ld8", "ld9",
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"ld10", "ld11", "ld12", "ld13", "ld14",
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"ld15", "ld16", "ld17", "ldi", "lhp0",
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"lhp1", "lhp2", "lhs", "lpp", "lsc0",
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"lsc1", "lsck", "lsda", "lspi", "lvp1",
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"lvs";
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nvidia,function = "displaya";
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};
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owc {
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nvidia,pins = "owc", "spdi", "spdo", "uac";
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nvidia,function = "rsvd2";
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};
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pmc {
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nvidia,pins = "pmc";
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nvidia,function = "pwr_on";
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};
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rm {
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nvidia,pins = "rm";
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nvidia,function = "i2c1";
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};
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sdb {
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nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";
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nvidia,function = "sdio3";
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};
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sdio1 {
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nvidia,pins = "sdio1";
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nvidia,function = "sdio1";
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};
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slxd {
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nvidia,pins = "slxd";
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nvidia,function = "spdif";
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};
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spid {
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nvidia,pins = "spid", "spie", "spif";
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nvidia,function = "spi1";
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};
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spig {
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nvidia,pins = "spig", "spih";
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nvidia,function = "spi2_alt";
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};
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uaa {
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nvidia,pins = "uaa", "uab", "uda";
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nvidia,function = "ulpi";
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};
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uad {
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nvidia,pins = "uad";
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nvidia,function = "irda";
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};
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uca {
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nvidia,pins = "uca", "ucb";
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nvidia,function = "uartc";
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};
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conf_ata {
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nvidia,pins = "ata", "atb", "atc", "atd",
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"cdev1", "cdev2", "csus", "dap1",
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"dap4", "dte", "dtf", "gma", "gmc",
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"gme", "gpu", "gpu7", "gpv", "i2cp",
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"irrx", "irtx", "pta", "rm",
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"sdc", "sdd", "slxc", "slxd", "slxk",
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"spdi", "spdo", "uac", "uad", "uda";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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conf_ate {
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nvidia,pins = "ate", "dap2", "dap3",
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"gmd", "owc", "spia", "spib", "spic",
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"spid", "spie";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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conf_ck32 {
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nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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};
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conf_crtp {
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nvidia,pins = "crtp", "gmb", "slxa", "spig",
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"spih";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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conf_dta {
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nvidia,pins = "dta", "dtb", "dtc", "dtd", "kbcb";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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conf_dte {
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nvidia,pins = "spif";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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conf_hdint {
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nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
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"lpw1", "lsck", "lsda", "lsdi",
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"lvp0";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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conf_kbca {
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nvidia,pins = "kbca", "kbcc", "kbcd",
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"kbce", "kbcf", "sdio1", "uaa",
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"uab", "uca", "ucb";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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conf_lc {
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nvidia,pins = "lc", "ls";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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};
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conf_ld0 {
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nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
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"ld5", "ld6", "ld7", "ld8", "ld9",
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"ld10", "ld11", "ld12", "ld13", "ld14",
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"ld15", "ld16", "ld17", "ldi", "lhp0",
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"lhp1", "lhp2", "lhs", "lm0", "lpp",
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"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
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"lvp1", "lvs", "pmc", "sdb";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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conf_ld17_0 {
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nvidia,pins = "ld17_0";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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};
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drive_ddc {
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nvidia,pins = "drive_ddc",
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"drive_vi1",
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|
"drive_sdio1";
|
2020-08-23 17:47:22 +03:00
|
|
|
nvidia,pull-up-strength = <31>;
|
|
|
|
|
nvidia,pull-down-strength = <31>;
|
2020-06-29 05:54:51 +03:00
|
|
|
nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
2020-08-23 17:47:22 +03:00
|
|
|
nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
|
|
|
nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
|
|
|
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
|
|
|
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
drive_dbg {
|
|
|
|
|
nvidia,pins = "drive_dbg",
|
|
|
|
|
"drive_vi2",
|
|
|
|
|
"drive_at1",
|
|
|
|
|
"drive_ao1";
|
2020-08-23 17:47:22 +03:00
|
|
|
nvidia,pull-up-strength = <31>;
|
|
|
|
|
nvidia,pull-down-strength = <31>;
|
2020-06-29 05:54:51 +03:00
|
|
|
nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
2020-08-23 17:47:22 +03:00
|
|
|
nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
|
|
|
nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
2020-06-29 05:54:51 +03:00
|
|
|
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
|
|
|
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2022-11-04 13:18:37 +01:00
|
|
|
state_i2cmux_ddc: pinmux-i2cmux-ddc {
|
2020-06-29 05:54:51 +03:00
|
|
|
ddc {
|
|
|
|
|
nvidia,pins = "ddc";
|
|
|
|
|
nvidia,function = "i2c2";
|
|
|
|
|
};
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
|
2020-06-29 05:54:51 +03:00
|
|
|
pta {
|
|
|
|
|
nvidia,pins = "pta";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
state_i2cmux_idle: pinmux-i2cmux-idle {
|
2020-06-29 05:54:51 +03:00
|
|
|
ddc {
|
|
|
|
|
nvidia,pins = "ddc";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
|
2020-06-29 05:54:51 +03:00
|
|
|
pta {
|
|
|
|
|
nvidia,pins = "pta";
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
nvidia,function = "rsvd4";
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
state_i2cmux_pta: pinmux-i2cmux-pta {
|
2020-06-29 05:54:51 +03:00
|
|
|
ddc {
|
|
|
|
|
nvidia,pins = "ddc";
|
|
|
|
|
nvidia,function = "rsvd4";
|
|
|
|
|
};
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
|
2020-06-29 05:54:51 +03:00
|
|
|
pta {
|
|
|
|
|
nvidia,pins = "pta";
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
nvidia,function = "i2c2";
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2021-12-04 17:37:24 +03:00
|
|
|
tegra_spdif: spdif@70002400 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
nvidia,fixed-parent-rate;
|
|
|
|
|
};
|
|
|
|
|
|
2020-06-29 05:54:51 +03:00
|
|
|
tegra_i2s1: i2s@70002800 {
|
|
|
|
|
status = "okay";
|
2021-12-04 17:37:24 +03:00
|
|
|
|
|
|
|
|
nvidia,fixed-parent-rate;
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
uartb: serial@70006040 {
|
|
|
|
|
compatible = "nvidia,tegra20-hsuart";
|
2023-07-17 18:33:29 +02:00
|
|
|
reset-names = "serial";
|
2021-12-07 11:11:33 +01:00
|
|
|
/delete-property/ reg-shift;
|
2020-06-29 05:54:51 +03:00
|
|
|
/* GPS BCM4751 */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
uartc: serial@70006200 {
|
|
|
|
|
compatible = "nvidia,tegra20-hsuart";
|
2023-07-17 18:33:29 +02:00
|
|
|
reset-names = "serial";
|
2021-12-07 11:11:33 +01:00
|
|
|
/delete-property/ reg-shift;
|
2020-06-29 05:54:51 +03:00
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
/* Azurewave AW-NH665 BCM4329B1 */
|
|
|
|
|
bluetooth {
|
|
|
|
|
compatible = "brcm,bcm4329-bt";
|
|
|
|
|
|
2021-09-27 02:37:04 +03:00
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
|
|
|
|
|
interrupt-names = "host-wakeup";
|
|
|
|
|
|
2020-06-29 05:54:51 +03:00
|
|
|
/* PLLP 216MHz / 16 / 4 */
|
|
|
|
|
max-speed = <3375000>;
|
|
|
|
|
|
|
|
|
|
clocks = <&rtc_32k_wifi>;
|
|
|
|
|
clock-names = "txco";
|
|
|
|
|
|
|
|
|
|
vbat-supply = <&vdd_3v3_sys>;
|
|
|
|
|
vddio-supply = <&vdd_1v8_sys>;
|
|
|
|
|
|
|
|
|
|
device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
|
2022-05-26 22:35:16 +02:00
|
|
|
shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
uartd: serial@70006300 {
|
|
|
|
|
/* Docking station */
|
|
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
pwm: pwm@7000a000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
2020-06-29 05:54:51 +03:00
|
|
|
i2c@7000c000 {
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
wm8903: audio-codec@1a {
|
|
|
|
|
compatible = "wlf,wm8903";
|
|
|
|
|
reg = <0x1a>;
|
|
|
|
|
|
|
|
|
|
interrupt-parent = <&gpio>;
|
2021-05-10 23:25:51 +03:00
|
|
|
interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_EDGE_BOTH>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
|
|
|
|
gpio-controller;
|
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
|
2021-05-10 23:25:51 +03:00
|
|
|
micdet-cfg = <0>;
|
|
|
|
|
micdet-delay = <100>;
|
|
|
|
|
|
2020-06-29 05:54:51 +03:00
|
|
|
gpio-cfg = <
|
|
|
|
|
0x0000 /* MIC_LR_OUT# GPIO, output, low */
|
|
|
|
|
0x0000 /* FM2018-enable GPIO, output, low */
|
|
|
|
|
0x0000 /* Speaker-enable GPIO, output, low */
|
|
|
|
|
0x0200 /* Interrupt, output */
|
|
|
|
|
0x01a0 /* BCLK, input, active high */
|
|
|
|
|
>;
|
|
|
|
|
|
|
|
|
|
AVDD-supply = <&vdd_1v8_sys>;
|
|
|
|
|
CPVDD-supply = <&vdd_1v8_sys>;
|
|
|
|
|
DBVDD-supply = <&vdd_1v8_sys>;
|
|
|
|
|
DCVDD-supply = <&vdd_1v8_sys>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
touchscreen@4c {
|
|
|
|
|
compatible = "atmel,maxtouch";
|
|
|
|
|
reg = <0x4c>;
|
|
|
|
|
|
|
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <TEGRA_GPIO(V, 6) IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
|
|
2020-11-09 18:00:06 -08:00
|
|
|
reset-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
2021-03-02 15:09:58 +03:00
|
|
|
vdda-supply = <&vdd_3v3_sys>;
|
2020-06-29 05:54:51 +03:00
|
|
|
vdd-supply = <&vdd_3v3_sys>;
|
2021-03-02 13:21:58 +03:00
|
|
|
|
2021-08-03 00:19:45 +03:00
|
|
|
atmel,wakeup-method = <ATMEL_MXT_WAKEUP_I2C_SCL>;
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gyroscope@68 {
|
|
|
|
|
compatible = "invensense,mpu3050";
|
|
|
|
|
reg = <0x68>;
|
|
|
|
|
|
|
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING>;
|
|
|
|
|
|
|
|
|
|
vdd-supply = <&vdd_3v3_sys>;
|
|
|
|
|
vlogic-supply = <&vdd_1v8_sys>;
|
|
|
|
|
|
|
|
|
|
mount-matrix = "0", "1", "0",
|
|
|
|
|
"1", "0", "0",
|
|
|
|
|
"0", "0", "-1";
|
|
|
|
|
|
|
|
|
|
i2c-gate {
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
accelerometer@f {
|
|
|
|
|
compatible = "kionix,kxtf9";
|
|
|
|
|
reg = <0x0f>;
|
|
|
|
|
|
|
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
|
|
|
|
|
|
2021-08-03 00:19:44 +03:00
|
|
|
vdd-supply = <&vdd_1v8_sys>;
|
|
|
|
|
vddio-supply = <&vdd_1v8_sys>;
|
|
|
|
|
|
2020-06-29 05:54:51 +03:00
|
|
|
mount-matrix = "0", "1", "0",
|
|
|
|
|
"1", "0", "0",
|
|
|
|
|
"0", "0", "-1";
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000c400 {
|
|
|
|
|
clock-frequency = <10000>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000d000 {
|
|
|
|
|
clock-frequency = <100000>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
magnetometer@c {
|
2021-09-27 02:37:02 +03:00
|
|
|
compatible = "asahi-kasei,ak8975";
|
2020-06-29 05:54:51 +03:00
|
|
|
reg = <0x0c>;
|
|
|
|
|
|
|
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_EDGE_RISING>;
|
|
|
|
|
|
|
|
|
|
vdd-supply = <&vdd_3v3_sys>;
|
|
|
|
|
vid-supply = <&vdd_1v8_sys>;
|
|
|
|
|
|
|
|
|
|
mount-matrix = "1", "0", "0",
|
|
|
|
|
"0", "-1", "0",
|
|
|
|
|
"0", "0", "-1";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pmic: pmic@34 {
|
|
|
|
|
compatible = "ti,tps6586x";
|
|
|
|
|
reg = <0x34>;
|
|
|
|
|
|
|
|
|
|
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
|
|
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
|
|
|
|
|
sys-supply = <&vdd_5v0_sys>;
|
|
|
|
|
vin-sm0-supply = <&sys_reg>;
|
|
|
|
|
vin-sm1-supply = <&sys_reg>;
|
|
|
|
|
vin-sm2-supply = <&sys_reg>;
|
|
|
|
|
vinldo01-supply = <&sm2_reg>;
|
|
|
|
|
vinldo23-supply = <&sm2_reg>;
|
|
|
|
|
vinldo4-supply = <&sm2_reg>;
|
|
|
|
|
vinldo678-supply = <&sm2_reg>;
|
|
|
|
|
vinldo9-supply = <&sm2_reg>;
|
|
|
|
|
|
|
|
|
|
regulators {
|
|
|
|
|
sys_reg: sys {
|
|
|
|
|
regulator-name = "vdd_sys";
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_core: sm0 {
|
|
|
|
|
regulator-name = "vdd_sm0,vdd_core";
|
2021-03-02 15:09:55 +03:00
|
|
|
regulator-min-microvolt = <950000>;
|
2020-06-29 05:54:51 +03:00
|
|
|
regulator-max-microvolt = <1300000>;
|
|
|
|
|
regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
|
|
|
|
|
regulator-coupled-max-spread = <170000 550000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
|
|
|
|
|
nvidia,tegra-core-regulator;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vdd_cpu: sm1 {
|
|
|
|
|
regulator-name = "vdd_sm1,vdd_cpu";
|
|
|
|
|
regulator-min-microvolt = <750000>;
|
|
|
|
|
regulator-max-microvolt = <1125000>;
|
|
|
|
|
regulator-coupled-with = <&vdd_core &rtc_vdd>;
|
|
|
|
|
regulator-coupled-max-spread = <550000 550000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
|
|
|
|
|
nvidia,tegra-cpu-regulator;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sm2_reg: sm2 {
|
|
|
|
|
regulator-name = "vdd_sm2,vin_ldo*";
|
|
|
|
|
regulator-min-microvolt = <3700000>;
|
|
|
|
|
regulator-max-microvolt = <3700000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* LDO0 is not connected to anything */
|
|
|
|
|
|
|
|
|
|
ldo1 {
|
|
|
|
|
regulator-name = "vdd_ldo1,avdd_pll*";
|
|
|
|
|
regulator-min-microvolt = <1100000>;
|
|
|
|
|
regulator-max-microvolt = <1100000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
rtc_vdd: ldo2 {
|
|
|
|
|
regulator-name = "vdd_ldo2,vdd_rtc";
|
2021-03-02 15:09:55 +03:00
|
|
|
regulator-min-microvolt = <950000>;
|
2020-06-29 05:54:51 +03:00
|
|
|
regulator-max-microvolt = <1300000>;
|
|
|
|
|
regulator-coupled-with = <&vdd_core &vdd_cpu>;
|
|
|
|
|
regulator-coupled-max-spread = <170000 550000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
|
|
|
|
|
nvidia,tegra-rtc-regulator;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo3 {
|
|
|
|
|
regulator-name = "vdd_ldo3,avdd_usb*";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo4 {
|
|
|
|
|
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
vcore_emmc: ldo5 {
|
|
|
|
|
regulator-name = "vdd_ldo5,vcore_mmc";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
avdd_vdac_reg: ldo6 {
|
|
|
|
|
regulator-name = "vdd_ldo6,avdd_vdac";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
hdmi_vdd_reg: ldo7 {
|
|
|
|
|
regulator-name = "vdd_ldo7,avdd_hdmi";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
hdmi_pll_reg: ldo8 {
|
|
|
|
|
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo9 {
|
|
|
|
|
regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
ldo_rtc {
|
|
|
|
|
regulator-name = "vdd_rtc_out,vdd_cell";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
regulator-boot-on;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
nct1008: temperature-sensor@4c {
|
|
|
|
|
compatible = "onnn,nct1008";
|
|
|
|
|
reg = <0x4c>;
|
|
|
|
|
vcc-supply = <&vdd_3v3_sys>;
|
2021-08-03 00:19:37 +03:00
|
|
|
|
|
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
|
|
|
|
|
|
2020-06-29 05:54:51 +03:00
|
|
|
#thermal-sensor-cells = <1>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pmc@7000e400 {
|
|
|
|
|
nvidia,invert-interrupt;
|
|
|
|
|
nvidia,suspend-mode = <1>;
|
|
|
|
|
nvidia,cpu-pwr-good-time = <2000>;
|
|
|
|
|
nvidia,cpu-pwr-off-time = <100>;
|
|
|
|
|
nvidia,core-pwr-good-time = <3845 3845>;
|
|
|
|
|
nvidia,core-pwr-off-time = <458>;
|
|
|
|
|
nvidia,sys-clock-req-active-high;
|
2021-12-01 02:23:43 +03:00
|
|
|
core-supply = <&vdd_core>;
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
memory-controller@7000f400 {
|
|
|
|
|
nvidia,use-ram-code;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
emc-tables@0 {
|
|
|
|
|
nvidia,ram-code = <0>; /* elpida-8gb */
|
|
|
|
|
reg = <0>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
emc-table@25000 {
|
|
|
|
|
reg = <25000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <25000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000002 0x00000006
|
|
|
|
|
0x00000003 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000004
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000004d
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000004
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000068 0x00000000 0x00000003
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x00070000 0x00000000 0x00000000 0x00000003
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
emc-table@50000 {
|
|
|
|
|
reg = <50000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <50000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000003 0x00000007
|
|
|
|
|
0x00000003 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000009f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000007
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x000000d0 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x00070000 0x00000000 0x00000000 0x00000005
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
emc-table@75000 {
|
|
|
|
|
reg = <75000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <75000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000005 0x0000000a
|
|
|
|
|
0x00000004 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x000000ff
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x0000000b
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000138 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x00070000 0x00000000 0x00000000 0x00000007
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
emc-table@150000 {
|
|
|
|
|
reg = <150000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <150000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000009 0x00000014
|
|
|
|
|
0x00000007 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000021f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000015
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000270 0x00000000 0x00000001
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa07c04ae
|
|
|
|
|
0x007dd510 0x00000000 0x00000000 0x0000000e
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
emc-table@300000 {
|
|
|
|
|
reg = <300000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <300000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000012 0x00000027
|
|
|
|
|
0x0000000d 0x00000006 0x00000007 0x00000005
|
|
|
|
|
0x00000003 0x00000009 0x00000006 0x00000006
|
|
|
|
|
0x00000003 0x00000003 0x00000002 0x00000006
|
|
|
|
|
0x00000003 0x00000009 0x0000000c 0x0000045f
|
|
|
|
|
0x00000000 0x00000004 0x00000004 0x00000006
|
|
|
|
|
0x00000008 0x00000001 0x0000000e 0x0000002a
|
|
|
|
|
0x00000003 0x0000000f 0x00000007 0x00000005
|
|
|
|
|
0x00000002 0x000004e1 0x00000005 0x00000002
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xe059048b
|
|
|
|
|
0x007e1510 0x00000000 0x00000000 0x0000001b
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
emc-tables@1 {
|
|
|
|
|
nvidia,ram-code = <1>; /* elpida-4gb */
|
|
|
|
|
reg = <1>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
2020-08-23 17:47:24 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
emc-table@25000 {
|
|
|
|
|
reg = <25000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <25000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000002 0x00000006
|
|
|
|
|
0x00000003 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000004
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000004d
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000004
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000068 0x00000000 0x00000003
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x0007c000 0x00000000 0x00000000 0x00000003
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
emc-table@50000 {
|
|
|
|
|
reg = <50000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <50000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000003 0x00000007
|
|
|
|
|
0x00000003 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000009f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000007
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x000000d0 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x0007c000 0x00000000 0x00000000 0x00000005
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
emc-table@75000 {
|
|
|
|
|
reg = <75000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <75000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000005 0x0000000a
|
|
|
|
|
0x00000004 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x000000ff
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x0000000b
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000138 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x0007c000 0x00000000 0x00000000 0x00000007
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-table@150000 {
|
|
|
|
|
reg = <150000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <150000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000009 0x00000014
|
|
|
|
|
0x00000007 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000021f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000015
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000270 0x00000000 0x00000001
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa07c04ae
|
|
|
|
|
0x007e4010 0x00000000 0x00000000 0x0000000e
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-table@300000 {
|
|
|
|
|
reg = <300000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <300000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000012 0x00000027
|
|
|
|
|
0x0000000d 0x00000006 0x00000007 0x00000005
|
|
|
|
|
0x00000003 0x00000009 0x00000006 0x00000006
|
|
|
|
|
0x00000003 0x00000003 0x00000002 0x00000006
|
|
|
|
|
0x00000003 0x00000009 0x0000000c 0x0000045f
|
|
|
|
|
0x00000000 0x00000004 0x00000004 0x00000006
|
|
|
|
|
0x00000008 0x00000001 0x0000000e 0x0000002a
|
|
|
|
|
0x00000003 0x0000000f 0x00000007 0x00000005
|
|
|
|
|
0x00000002 0x000004e1 0x00000005 0x00000002
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xe059048b
|
|
|
|
|
0x007e0010 0x00000000 0x00000000 0x0000001b
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-tables@2 {
|
|
|
|
|
nvidia,ram-code = <2>; /* hynix-8gb */
|
|
|
|
|
reg = <2>;
|
|
|
|
|
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
emc-table@25000 {
|
|
|
|
|
reg = <25000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <25000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000002 0x00000006
|
|
|
|
|
0x00000003 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000004
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000004d
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000004
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000068 0x00000000 0x00000003
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x00070000 0x00000000 0x00000000 0x00000003
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-table@50000 {
|
|
|
|
|
reg = <50000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <50000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000003 0x00000007
|
|
|
|
|
0x00000003 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000009f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000007
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x000000d0 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x00070000 0x00000000 0x00000000 0x00000005
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-table@75000 {
|
|
|
|
|
reg = <75000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <75000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000005 0x0000000a
|
|
|
|
|
0x00000004 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x000000ff
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x0000000b
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000138 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x00070000 0x00000000 0x00000000 0x00000007
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-table@150000 {
|
|
|
|
|
reg = <150000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <150000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000009 0x00000014
|
|
|
|
|
0x00000007 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000021f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000015
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000270 0x00000000 0x00000001
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa07c04ae
|
|
|
|
|
0x007dd010 0x00000000 0x00000000 0x0000000e
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-table@300000 {
|
|
|
|
|
reg = <300000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <300000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000012 0x00000027
|
|
|
|
|
0x0000000d 0x00000006 0x00000007 0x00000005
|
|
|
|
|
0x00000003 0x00000009 0x00000006 0x00000006
|
|
|
|
|
0x00000003 0x00000003 0x00000002 0x00000006
|
|
|
|
|
0x00000003 0x00000009 0x0000000c 0x0000045f
|
|
|
|
|
0x00000000 0x00000004 0x00000004 0x00000006
|
|
|
|
|
0x00000008 0x00000001 0x0000000e 0x0000002a
|
|
|
|
|
0x00000003 0x0000000f 0x00000007 0x00000005
|
|
|
|
|
0x00000002 0x000004e1 0x00000005 0x00000002
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xe059048b
|
|
|
|
|
0x007e2010 0x00000000 0x00000000 0x0000001b
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-tables@3 {
|
|
|
|
|
nvidia,ram-code = <3>; /* hynix-4gb */
|
|
|
|
|
reg = <3>;
|
|
|
|
|
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
emc-table@25000 {
|
|
|
|
|
reg = <25000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <25000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000002 0x00000006
|
|
|
|
|
0x00000003 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000004
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000004d
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000004
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000068 0x00000000 0x00000003
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x0007c000 0x00000000 0x00000000 0x00000003
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-table@50000 {
|
|
|
|
|
reg = <50000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <50000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000003 0x00000007
|
|
|
|
|
0x00000003 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000009f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000007
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x000000d0 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x0007c000 0x00078000 0x00000000 0x00000005
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-table@75000 {
|
|
|
|
|
reg = <75000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <75000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000005 0x0000000a
|
|
|
|
|
0x00000004 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x000000ff
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x0000000b
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000138 0x00000000 0x00000000
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa0ae04ae
|
|
|
|
|
0x0007c000 0x00000000 0x00000000 0x00000007
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-table@150000 {
|
|
|
|
|
reg = <150000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <150000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000009 0x00000014
|
|
|
|
|
0x00000007 0x00000003 0x00000006 0x00000004
|
|
|
|
|
0x00000002 0x00000009 0x00000003 0x00000003
|
|
|
|
|
0x00000002 0x00000002 0x00000002 0x00000005
|
|
|
|
|
0x00000003 0x00000008 0x0000000b 0x0000021f
|
|
|
|
|
0x00000000 0x00000003 0x00000003 0x00000003
|
|
|
|
|
0x00000008 0x00000001 0x0000000a 0x00000015
|
|
|
|
|
0x00000003 0x00000008 0x00000004 0x00000006
|
|
|
|
|
0x00000002 0x00000270 0x00000000 0x00000001
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xa07c04ae
|
|
|
|
|
0x007e4010 0x00000000 0x00000000 0x0000000e
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
emc-table@300000 {
|
|
|
|
|
reg = <300000>;
|
|
|
|
|
compatible = "nvidia,tegra20-emc-table";
|
|
|
|
|
clock-frequency = <300000>;
|
|
|
|
|
nvidia,emc-registers = <0x00000012 0x00000027
|
|
|
|
|
0x0000000d 0x00000006 0x00000007 0x00000005
|
|
|
|
|
0x00000003 0x00000009 0x00000006 0x00000006
|
|
|
|
|
0x00000003 0x00000003 0x00000002 0x00000006
|
|
|
|
|
0x00000003 0x00000009 0x0000000c 0x0000045f
|
|
|
|
|
0x00000000 0x00000004 0x00000004 0x00000006
|
|
|
|
|
0x00000008 0x00000001 0x0000000e 0x0000002a
|
|
|
|
|
0x00000003 0x0000000f 0x00000007 0x00000005
|
|
|
|
|
0x00000002 0x000004e1 0x00000005 0x00000002
|
|
|
|
|
0x00000000 0x00000000 0x00000282 0xe059048b
|
|
|
|
|
0x007e0010 0x00000000 0x00000000 0x0000001b
|
|
|
|
|
0x00000000 0x00000000 0x00000000 0x00000000>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb@c5000000 {
|
|
|
|
|
compatible = "nvidia,tegra20-udc";
|
|
|
|
|
status = "okay";
|
|
|
|
|
dr_mode = "peripheral";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb-phy@c5000000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
dr_mode = "peripheral";
|
|
|
|
|
nvidia,xcvr-setup-use-fuses;
|
|
|
|
|
nvidia,xcvr-lsfslew = <2>;
|
|
|
|
|
nvidia,xcvr-lsrslew = <2>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb@c5008000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
usb-phy@c5008000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
nvidia,xcvr-setup-use-fuses;
|
|
|
|
|
nvidia,xcvr-lsfslew = <2>;
|
|
|
|
|
nvidia,xcvr-lsrslew = <2>;
|
|
|
|
|
vbus-supply = <&vdd_5v0_sys>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sdmmc1: mmc@c8000000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
|
|
|
|
|
assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
|
|
|
|
|
assigned-clock-rates = <50000000>;
|
|
|
|
|
|
|
|
|
|
max-frequency = <50000000>;
|
|
|
|
|
keep-power-in-suspend;
|
|
|
|
|
bus-width = <4>;
|
|
|
|
|
non-removable;
|
|
|
|
|
|
|
|
|
|
mmc-pwrseq = <&brcm_wifi_pwrseq>;
|
|
|
|
|
vmmc-supply = <&vdd_3v3_sys>;
|
|
|
|
|
vqmmc-supply = <&vdd_1v8_sys>;
|
|
|
|
|
|
|
|
|
|
/* Azurewave AW-NH611 BCM4329 */
|
|
|
|
|
wifi@1 {
|
|
|
|
|
reg = <1>;
|
|
|
|
|
compatible = "brcm,bcm4329-fmac";
|
|
|
|
|
interrupt-parent = <&gpio>;
|
|
|
|
|
interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
|
interrupt-names = "host-wake";
|
|
|
|
|
};
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
2020-09-06 22:00:07 +03:00
|
|
|
sdmmc3: mmc@c8000400 {
|
2020-06-29 05:54:51 +03:00
|
|
|
status = "okay";
|
|
|
|
|
bus-width = <4>;
|
|
|
|
|
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
|
|
|
|
|
power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
vmmc-supply = <&vdd_3v3_sys>;
|
|
|
|
|
vqmmc-supply = <&vdd_3v3_sys>;
|
|
|
|
|
};
|
|
|
|
|
|
2020-09-06 22:00:07 +03:00
|
|
|
sdmmc4: mmc@c8000600 {
|
2020-06-29 05:54:51 +03:00
|
|
|
status = "okay";
|
|
|
|
|
bus-width = <8>;
|
|
|
|
|
vmmc-supply = <&vcore_emmc>;
|
|
|
|
|
vqmmc-supply = <&vdd_3v3_sys>;
|
|
|
|
|
non-removable;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
mains: ac-adapter-detect {
|
|
|
|
|
compatible = "gpio-charger";
|
|
|
|
|
charger-type = "mains";
|
|
|
|
|
gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
backlight: backlight {
|
|
|
|
|
compatible = "pwm-backlight";
|
|
|
|
|
|
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
power-supply = <&vdd_3v3_sys>;
|
|
|
|
|
pwms = <&pwm 2 41667>;
|
|
|
|
|
|
|
|
|
|
brightness-levels = <7 255>;
|
|
|
|
|
num-interpolated-steps = <248>;
|
|
|
|
|
default-brightness-level = <20>;
|
|
|
|
|
};
|
|
|
|
|
|
2020-11-16 22:48:27 +03:00
|
|
|
bat1010: battery-2s1p {
|
|
|
|
|
compatible = "simple-battery";
|
|
|
|
|
charge-full-design-microamp-hours = <3260000>;
|
|
|
|
|
energy-full-design-microwatt-hours = <24000000>;
|
|
|
|
|
operating-range-celsius = <0 40>;
|
|
|
|
|
};
|
|
|
|
|
|
2020-06-29 05:54:51 +03:00
|
|
|
/* PMIC has a built-in 32KHz oscillator which is used by PMC */
|
2021-12-12 00:14:03 +03:00
|
|
|
clk32k_in: clock-32k-in {
|
2020-06-29 05:54:51 +03:00
|
|
|
compatible = "fixed-clock";
|
|
|
|
|
#clock-cells = <0>;
|
|
|
|
|
clock-frequency = <32768>;
|
|
|
|
|
clock-output-names = "tps658621-out32k";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* This standalone onboard fixed-clock always-ON 32KHz
|
|
|
|
|
* oscillator is used as a reference clock-source by the
|
|
|
|
|
* Azurewave WiFi/BT module.
|
|
|
|
|
*/
|
2021-12-12 00:14:03 +03:00
|
|
|
rtc_32k_wifi: clock-32k-wifi {
|
2020-06-29 05:54:51 +03:00
|
|
|
compatible = "fixed-clock";
|
|
|
|
|
#clock-cells = <0>;
|
|
|
|
|
clock-frequency = <32768>;
|
|
|
|
|
clock-output-names = "kk3270032";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
cpus {
|
|
|
|
|
cpu0: cpu@0 {
|
|
|
|
|
cpu-supply = <&vdd_cpu>;
|
|
|
|
|
operating-points-v2 = <&cpu0_opp_table>;
|
|
|
|
|
#cooling-cells = <2>;
|
|
|
|
|
};
|
|
|
|
|
|
2021-03-02 15:09:57 +03:00
|
|
|
cpu1: cpu@1 {
|
2020-06-29 05:54:51 +03:00
|
|
|
cpu-supply = <&vdd_cpu>;
|
|
|
|
|
operating-points-v2 = <&cpu0_opp_table>;
|
2021-03-02 15:09:57 +03:00
|
|
|
#cooling-cells = <2>;
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
display-panel {
|
|
|
|
|
compatible = "auo,b101ew05", "panel-lvds";
|
|
|
|
|
|
|
|
|
|
ddc-i2c-bus = <&panel_ddc>;
|
|
|
|
|
power-supply = <&vdd_pnl>;
|
|
|
|
|
backlight = <&backlight>;
|
|
|
|
|
|
|
|
|
|
width-mm = <218>;
|
|
|
|
|
height-mm = <135>;
|
|
|
|
|
|
|
|
|
|
data-mapping = "jeida-18";
|
|
|
|
|
|
|
|
|
|
panel-timing {
|
|
|
|
|
clock-frequency = <71200000>;
|
|
|
|
|
hactive = <1280>;
|
|
|
|
|
vactive = <800>;
|
|
|
|
|
hfront-porch = <8>;
|
|
|
|
|
hback-porch = <18>;
|
|
|
|
|
hsync-len = <184>;
|
|
|
|
|
vsync-len = <3>;
|
|
|
|
|
vfront-porch = <4>;
|
|
|
|
|
vback-porch = <8>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
port {
|
|
|
|
|
panel_input: endpoint {
|
|
|
|
|
remote-endpoint = <&lvds_encoder_output>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
gpio-keys {
|
|
|
|
|
compatible = "gpio-keys";
|
|
|
|
|
|
2022-06-15 17:53:13 -07:00
|
|
|
key-power {
|
2020-06-29 05:54:51 +03:00
|
|
|
label = "Power";
|
|
|
|
|
gpios = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
linux,code = <KEY_POWER>;
|
|
|
|
|
debounce-interval = <10>;
|
|
|
|
|
wakeup-event-action = <EV_ACT_ASSERTED>;
|
|
|
|
|
wakeup-source;
|
|
|
|
|
};
|
|
|
|
|
|
2022-06-15 17:53:13 -07:00
|
|
|
key-rotation-lock {
|
2020-06-29 05:54:51 +03:00
|
|
|
label = "Rotate-lock";
|
|
|
|
|
gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
linux,code = <SW_ROTATE_LOCK>;
|
|
|
|
|
linux,input-type = <EV_SW>;
|
|
|
|
|
debounce-interval = <10>;
|
|
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
key-volume-down {
|
|
|
|
|
label = "Volume Down";
|
|
|
|
|
gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
|
|
|
|
|
linux,code = <KEY_VOLUMEDOWN>;
|
2020-06-29 05:54:51 +03:00
|
|
|
debounce-interval = <10>;
|
|
|
|
|
wakeup-event-action = <EV_ACT_ASSERTED>;
|
|
|
|
|
wakeup-source;
|
|
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
key-volume-up {
|
|
|
|
|
label = "Volume Up";
|
|
|
|
|
gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
|
|
|
|
|
linux,code = <KEY_VOLUMEUP>;
|
2020-06-29 05:54:51 +03:00
|
|
|
debounce-interval = <10>;
|
|
|
|
|
wakeup-event-action = <EV_ACT_ASSERTED>;
|
|
|
|
|
wakeup-source;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
haptic-feedback {
|
|
|
|
|
compatible = "gpio-vibrator";
|
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
vcc-supply = <&vdd_3v3_sys>;
|
|
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
i2cmux {
|
|
|
|
|
compatible = "i2c-mux-pinctrl";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
i2c-parent = <&{/i2c@7000c400}>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
pinctrl-names = "ddc", "pta", "idle";
|
|
|
|
|
pinctrl-0 = <&state_i2cmux_ddc>;
|
|
|
|
|
pinctrl-1 = <&state_i2cmux_pta>;
|
|
|
|
|
pinctrl-2 = <&state_i2cmux_idle>;
|
|
|
|
|
|
|
|
|
|
hdmi_ddc: i2c@0 {
|
|
|
|
|
reg = <0>;
|
2020-06-29 05:54:51 +03:00
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
panel_ddc: i2c@1 {
|
|
|
|
|
reg = <1>;
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
embedded-controller@58 {
|
|
|
|
|
compatible = "acer,a500-iconia-ec", "ene,kb930";
|
|
|
|
|
reg = <0x58>;
|
|
|
|
|
|
|
|
|
|
system-power-controller;
|
|
|
|
|
|
|
|
|
|
monitored-battery = <&bat1010>;
|
|
|
|
|
power-supplies = <&mains>;
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
lvds-encoder {
|
|
|
|
|
compatible = "ti,sn75lvds83", "lvds-encoder";
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
|
|
|
|
|
power-supply = <&vdd_3v3_sys>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
ports {
|
2020-06-29 05:54:51 +03:00
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
port@0 {
|
|
|
|
|
reg = <0>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
lvds_encoder_input: endpoint {
|
|
|
|
|
remote-endpoint = <&lcd_output>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
port@1 {
|
|
|
|
|
reg = <1>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
lvds_encoder_output: endpoint {
|
|
|
|
|
remote-endpoint = <&panel_input>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
};
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
opp-table-emc {
|
|
|
|
|
/delete-node/ opp-666000000;
|
|
|
|
|
/delete-node/ opp-760000000;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
vdd_5v0_sys: regulator-5v0 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "vdd_5v0";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
vdd_3v3_sys: regulator-3v3 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "vdd_3v3_vs";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
vin-supply = <&vdd_5v0_sys>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
vdd_1v8_sys: regulator-1v8 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "vdd_1v8_vs";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
vin-supply = <&vdd_5v0_sys>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
vdd_pnl: regulator-panel {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
regulator-name = "vdd_panel";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-enable-ramp-delay = <300000>;
|
|
|
|
|
gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
vin-supply = <&vdd_5v0_sys>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
sound {
|
|
|
|
|
compatible = "nvidia,tegra-audio-wm8903-picasso",
|
|
|
|
|
"nvidia,tegra-audio-wm8903";
|
|
|
|
|
nvidia,model = "Acer Iconia Tab A500 WM8903";
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
nvidia,audio-routing =
|
|
|
|
|
"Headphone Jack", "HPOUTR",
|
|
|
|
|
"Headphone Jack", "HPOUTL",
|
|
|
|
|
"Int Spk", "LINEOUTL",
|
|
|
|
|
"Int Spk", "LINEOUTR",
|
|
|
|
|
"Mic Jack", "MICBIAS",
|
|
|
|
|
"IN2L", "Mic Jack",
|
|
|
|
|
"IN2R", "Mic Jack",
|
|
|
|
|
"IN1L", "Int Mic",
|
|
|
|
|
"IN1R", "Int Mic";
|
|
|
|
|
|
|
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
|
|
|
nvidia,audio-codec = <&wm8903>;
|
|
|
|
|
|
|
|
|
|
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
|
|
|
|
|
nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>;
|
|
|
|
|
nvidia,headset;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
|
|
|
|
|
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
|
|
|
|
|
<&tegra_car TEGRA20_CLK_CDEV1>;
|
|
|
|
|
clock-names = "pll_a", "pll_a_out0", "mclk";
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
thermal-zones {
|
|
|
|
|
/*
|
|
|
|
|
* NCT1008 has two sensors:
|
|
|
|
|
*
|
|
|
|
|
* 0: internal that monitors ambient/skin temperature
|
|
|
|
|
* 1: external that is connected to the CPU's diode
|
|
|
|
|
*
|
|
|
|
|
* Ideally we should use userspace thermal governor,
|
|
|
|
|
* but it's a much more complex solution. The "skin"
|
|
|
|
|
* zone is a simpler solution which prevents A500 from
|
|
|
|
|
* getting too hot from a user's tactile perspective.
|
|
|
|
|
* The CPU zone is intended to protect silicon from damage.
|
|
|
|
|
*/
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
skin-thermal {
|
|
|
|
|
polling-delay-passive = <1000>; /* milliseconds */
|
|
|
|
|
polling-delay = <5000>; /* milliseconds */
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
thermal-sensors = <&nct1008 0>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
trips {
|
|
|
|
|
trip0: skin-alert {
|
|
|
|
|
/* start throttling at 60C */
|
|
|
|
|
temperature = <60000>;
|
|
|
|
|
hysteresis = <200>;
|
|
|
|
|
type = "passive";
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
trip1: skin-crit {
|
|
|
|
|
/* shut down at 70C */
|
|
|
|
|
temperature = <70000>;
|
|
|
|
|
hysteresis = <2000>;
|
|
|
|
|
type = "critical";
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
cooling-maps {
|
|
|
|
|
map0 {
|
|
|
|
|
trip = <&trip0>;
|
|
|
|
|
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
|
|
|
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
cpu-thermal {
|
|
|
|
|
polling-delay-passive = <1000>; /* milliseconds */
|
|
|
|
|
polling-delay = <5000>; /* milliseconds */
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
thermal-sensors = <&nct1008 1>;
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
trips {
|
|
|
|
|
trip2: cpu-alert {
|
|
|
|
|
/* throttle at 85C until temperature drops to 84.8C */
|
|
|
|
|
temperature = <85000>;
|
|
|
|
|
hysteresis = <200>;
|
|
|
|
|
type = "passive";
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
trip3: cpu-crit {
|
|
|
|
|
/* shut down at 90C */
|
|
|
|
|
temperature = <90000>;
|
|
|
|
|
hysteresis = <2000>;
|
|
|
|
|
type = "critical";
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
cooling-maps {
|
|
|
|
|
map1 {
|
|
|
|
|
trip = <&trip2>;
|
|
|
|
|
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
|
|
|
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
|
|
|
|
};
|
2020-06-29 05:54:51 +03:00
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
2020-11-23 03:27:21 +03:00
|
|
|
|
ARM: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.
These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").
While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-11-22 11:21:18 +01:00
|
|
|
brcm_wifi_pwrseq: wifi-pwrseq {
|
|
|
|
|
compatible = "mmc-pwrseq-simple";
|
|
|
|
|
|
|
|
|
|
clocks = <&rtc_32k_wifi>;
|
|
|
|
|
clock-names = "ext_clock";
|
|
|
|
|
|
|
|
|
|
reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
|
|
|
|
|
post-power-on-delay-ms = <300>;
|
|
|
|
|
power-off-delay-us = <300>;
|
|
|
|
|
};
|
2020-11-23 03:27:21 +03:00
|
|
|
};
|
