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36 lines
1.2 KiB
YAML
36 lines
1.2 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/samsung,exynos4210-srom-peripheral-props.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Peripheral Properties for Samsung Exynos SoC SROM Controller
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maintainers:
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- Krzysztof Kozlowski <krzk@kernel.org>
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properties:
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samsung,srom-page-mode:
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description:
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If page mode is set, 4 data page mode will be configured,
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else normal (1 data) page mode will be set.
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type: boolean
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samsung,srom-timing:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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minItems: 6
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maxItems: 6
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description: |
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Array of 6 integers, specifying bank timings in the following order:
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Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
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Each value is specified in cycles and has the following meaning
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and valid range:
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Tacp: Page mode access cycle at Page mode (0 - 15)
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Tcah: Address holding time after CSn (0 - 15)
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Tcoh: Chip selection hold on OEn (0 - 15)
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Tacc: Access cycle (0 - 31, the actual time is N + 1)
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Tcos: Chip selection set-up before OEn (0 - 15)
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Tacs: Address set-up before CSn (0 - 15)
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additionalProperties: true
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