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23 lines
512 B
Text
23 lines
512 B
Text
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2019 Marvell International Ltd.
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*
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* Device tree for the CN9132-DB board.
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*/
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#include "cn9132-db.dtsi"
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/ {
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model = "Marvell Armada CN9132-DB setup B";
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};
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/* Setup B has NAND flash as a boot device, while regular setup uses SPI flash.
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* Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
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* simultaneously. When NAND controller is enabled, SPI1 should be disabled.
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*/
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&cp0_nand_controller {
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status = "okay";
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};
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