linux/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2020 NXP
 */

&ddr_pmu0 {
	compatible = "fsl,imx8dxl-ddr-pmu", "fsl,imx8-ddr-pmu";
	interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
};
arm64: dts: freescale: add i.MX8DXL SoC support i.MX8DXL is a device targeting the automotive and industrial market segments. The chip is designed to achieve both high performance and low power consumption. It has a dual (2x) Cortex-A35 processor. This patch adds the basic support for i.MX8DXL SoC. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> 2022-09-14 08:58:47 -05:00			`// SPDX-License-Identifier: GPL-2.0+`
			`/*`
			`* Copyright 2020 NXP`
			`*/`

			`&ddr_pmu0 {`
arm64: dts: imx8dxl-ss-ddr: change ddr_pmu0 compatible i.MX8DXL's ddr pmu has port/channel filter capabilities, but it still is compatible with "fsl,imx8-ddr-pmu". This will change the compatible. Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> 2023-11-20 17:33:17 +08:00			`compatible = "fsl,imx8dxl-ddr-pmu", "fsl,imx8-ddr-pmu";`
arm64: dts: freescale: add i.MX8DXL SoC support i.MX8DXL is a device targeting the automotive and industrial market segments. The chip is designed to achieve both high performance and low power consumption. It has a dual (2x) Cortex-A35 processor. This patch adds the basic support for i.MX8DXL SoC. Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> 2022-09-14 08:58:47 -05:00			`interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;`
			`};`